1. Enable CACHE64 block used by FlexSPI.
2. LPCAC cache is already enabled by SystemInit which
is called earlier
3. Configure the FlexSPI clock when running in XIP mode
as we cannot rely on the driver setting this up as it
may not be enabled.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Updated the clocks that get initialized for the MCXN947
when using the LPTMR. The LPTMR allows the user to select
and Input clock, however said input clock must be
initialized before the user can select it.
Update description for clk-source in binding file.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Add support for USDHC0 controller on FRDM_MCXN947 board. This support
was verified using the `tests/subsys/sd/sdmmc` and
`tests/subsys/sd/sdio` testcases. Note that this board does not ship
with the SD header (J12) populated by default, so the user must populate
one.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The MEMC driver in memc_mcux_flexspi.c is initialized
before the FlexSPI driver (flash_mcux_flexspi_nor.c)
and hangs during FlexSPI init. Initialize the FlexSPI
clock to 50MHz before the speed is set to the optimum
speed by the FlexSPI driver.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Updated the frdm_mcxn947 with support for the
CTimer counter.
Signed-off-by: William Tang <william.tang@nxp.com>
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
