Commit graph

115350 commits

Author SHA1 Message Date
Riadh Ghaddab
dffdec18c2 tests: settings: add functional test for ZMS
Add the functional test for the new backend of ZMS

Signed-off-by: Riadh Ghaddab <rghaddab@baylibre.com>
2025-05-15 17:53:26 +02:00
Riadh Ghaddab
a903b4b0d1 tests: settings: add a functional test for settings_load_one
Add a test for the new API settings_load_one that loads only one path
from the persistent storage.

Signed-off-by: Riadh Ghaddab <rghaddab@baylibre.com>
2025-05-15 17:53:26 +02:00
Riadh Ghaddab
831da04247 settings: add an API function to load only one settings entry
Add a a function settings_load_one that allows to load only one settings
entry instead of a complete subtree.
Add as well its implementation for ZMS backend.
This will allow a faster return if the Settings entry doesn't exist in
the persistent storage.

Signed-off-by: Riadh Ghaddab <rghaddab@baylibre.com>
2025-05-15 17:53:26 +02:00
Riadh Ghaddab
bf20b78543 settings: zms: add cache for linked list hash
Increase the load performance by adding an optional cache for the linked
list hashes.
This is used only when the settings_load is called with NULL parameter
and we need to load all Settings that exist in the persistent storage.
Cache is enabled using SETTINGS_ZMS_LL_CACHE and the size of the cache
is set using SETTINGS_ZMS_LL_CACHE_SIZE.
Each cache entry will add 8 bytes of RAM usage.

Signed-off-by: Riadh Ghaddab <rghaddab@baylibre.com>
2025-05-15 17:53:26 +02:00
Riadh Ghaddab
ae461510a7 settings: zms: load only subtree in the argument
If the subtree argument is not NULL in the settings_load function, load
only the setting entry that corresponds to that subtree.
If the subtree argument is NULL or it is not found in the storage, load
all the existing entries in the storage.

Signed-off-by: Riadh Ghaddab <rghaddab@baylibre.com>
2025-05-15 17:53:26 +02:00
Riadh Ghaddab
5c38c58f0c zms: optimize cache for settings subsystem
Settings subsystem is storing the name ID and the linked list node ID
with only one bit difference at BIT(0).
Settings subsystem is also storing the name ID and the data ID in two
different ZMS entries at an exact offset of ZMS_DATA_ID_OFFSET.
Using the regular lookup function could result in many cache misses.

Therefore, to assure the least number of collisions in the lookup cache,
the BIT(0) of the hash indicates whether the given ZMS ID represents a
linked list entry or not, the BIT(1) indicates whether the ZMS ID is a
name or data and the remaining bits of the hash are set to a truncated
part of the original hash generated by Settings.

Signed-off-by: Riadh Ghaddab <rghaddab@baylibre.com>
2025-05-15 17:53:26 +02:00
Riadh Ghaddab
42b9b5a9d7 zms: remove non needed lookup cache before writing
When the CONFIG_ZMS_NO_DOUBLE_WRITE is not enabled there is no need to
search in the cache for matching ID

Signed-off-by: Riadh Ghaddab <rghaddab@baylibre.com>
2025-05-15 17:53:26 +02:00
Riadh Ghaddab
c0a75da084 settings: zms: add option to disable updating linked list
When deleting a settings entry the linked list is updated by removing
the deleted node. This operation is time consuming and add some delays.
For applications that use almost the same set of Setting entries, add an
option to make this operation faster at a cost of having some empty
nodes in the linked list.
These empty nodes can be used later when the deleted entry is written
again.
Each empty node occupies 16B of storage.

Signed-off-by: Riadh Ghaddab <rghaddab@baylibre.com>
2025-05-15 17:53:26 +02:00
Shrek Wang
6ee55e4211 net: tcp: Remove NULL-pkt support for tcp_in()
The NULL-pkt parameter for tcp_in() was designed for generating
a SYN packet to start the 1st TCP handshake. It is only used
in net_tcp_connect() and tp_input().
To simplify the tcp_in() code logic and make it better under-
standable, a tcp_start_handshake() is added for net_tcp_connect()
and tp_input() to use. Thus, the tcp_in() only handles the in-
coming TCP packets.

Signed-off-by: Shrek Wang <inet_eman@outlook.com>
2025-05-15 16:17:18 +02:00
Benjamin Cabé
336be1d4fb dts: vendor-prefixes: remove duplicate entry for ovti
Removed the duplicate 'ovti' entry and updated the full name to
company's current official name.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-05-15 16:17:11 +02:00
Vinayak Kariappa Chettimada
bebf59f9a0 Bluetooth: Controller: Fix MIC failure when 2 CISes in Peripheral
Fix MIC failure when 2 or more CISes in Peripheral is active
and any CIS before the last CIS does not have reception that
lead to the event count and payload count being incorrect.
Add the missing flush implementation when switching between
CISes in the CIG event.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2025-05-15 16:16:59 +02:00
Muzaffar Ahmed
a73f20214a drivers: wifi: siwx91x: Fix boot_config
Enable and rearrange some features in the boot config.

Signed-off-by: Muzaffar Ahmed <muzaffar.ahmed@silabs.com>
2025-05-15 16:16:54 +02:00
Muzaffar Ahmed
2a1b754779 drivers: wifi: siwx91x: Enable roaming by default
Set the default value for WIFI_SILABS_SIWX91X_ENABLE_ROAMING to y in
Kconfig.siwx91x

Signed-off-by: Muzaffar Ahmed <muzaffar.ahmed@silabs.com>
2025-05-15 16:16:54 +02:00
Muzaffar Ahmed
d6e106b5f0 drivers: wifi: siwx91x: Introduce flag for LIMIT_PACKET_BUF_PER_STA
Introduced WIFI_SILABS_SIWX91X_LIMIT_PACKET_BUF_PER_STA.
This flag limits packet queues in AP mode.

Signed-off-by: Muzaffar Ahmed <muzaffar.ahmed@silabs.com>
2025-05-15 16:16:54 +02:00
Tomas Barak
699fc6dbe8 drivers: i2s: mcux_sai: add MCLK direction control in the initialization
Add support for configuring the master clock (MCLK) direction in the
I2S MCUX SAI driver. This allows controlling whether the MCLK pin acts
as an input or output based on device tree configuration, improving
flexibility when interfacing with external audio codecs.

The change leverages the mclk_output property from device tree to
properly set the direction of the MCLK pin during initialization.

Signed-off-by: Tomas Barak <tomas.barak@nxp.com>
2025-05-15 16:16:28 +02:00
Tomas Barak
0b7527cbb8 samples: drivers: i2s: Support mimxrt1170_evkb platform in i2s output
- mimxrt1170_evkb needs CONFIG_DMA_TCD_QUEUE_SIZE=4 which is required
  by the I2S SAI driver
- add test harness for i2s_output

Signed-off-by: Tomas Barak <tomas.barak@nxp.com>
2025-05-15 16:16:28 +02:00
Tomas Barak
79f31384c5 samples: drivers: i2s: Format i2s_codec sample main.c
- format code according to the coding rules

Signed-off-by: Tomas Barak <tomas.barak@nxp.com>
2025-05-15 16:16:28 +02:00
Tomas Barak
3b74862032 samples: drivers: i2s: Support mimxrt1170 evkb and wm8962 in i2s_codec
- not using DMIC on this board, just play sine wave
- enable sai1 mclk-ouptut for codec init

Signed-off-by: Tomas Barak <tomas.barak@nxp.com>
2025-05-15 16:16:28 +02:00
Tomas Barak
d0042d60d5 samples: drivers: i2s: Support sine wave playback in i2s_codec sample
- when not using DMIC, play a 16kHz stereo sine wave using codec

Signed-off-by: Tomas Barak <tomas.barak@nxp.com>
2025-05-15 16:16:28 +02:00
Tomas Barak
31fff0801a dts: arm: nxp: Change audio-PLL clock settings on rt11xx
- change SAI clock to 24,576 MHz
  to be compatible with 48kHz sample rate and its derivatives

Signed-off-by: Tomas Barak <tomas.barak@nxp.com>
2025-05-15 16:16:28 +02:00
Tomas Barak
7a3ebc9d19 boards: nxp: mimxrt1170_evk_cm7_B: Add wm8962 codec support
- update mimxrt1170 evkb overlay
- add wm8962 codec on lpi2c5
- add aliases for i2s samples

Signed-off-by: Tomas Barak <tomas.barak@nxp.com>
2025-05-15 16:16:28 +02:00
Tomas Barak
9dd494f966 drivers: audio: wm8962: Add wm8962 codec support
- create driver for codec wm8962
- add Kconfig, Cmakelist references
- create dts binding

Signed-off-by: Tomas Barak <tomas.barak@nxp.com>
2025-05-15 16:16:28 +02:00
Robert Lubos
4512cbf509 tests: net: sockets: tls_configurations: Use fixture for openssl
Currently, creating and killing openssl process was part of the test. In
result, if the test case failed for whatever reason, the openssl process
would remain open, causing disruptions in consecutive test executions.

Fix that by defining openssl server instance as a pytest fixture. That
way, openssl process will be terminated regardless of the test
result.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-05-15 14:10:05 +02:00
Jamie McCrae
7619592bdd mgmt: mcumgr: grp: img_mgmt: Fix wrong alignment
Fixes a line that was wrongly aligned

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-05-15 14:09:55 +02:00
Jamie McCrae
e249596faf mgmt: mcumgr: grp: img_mgmt: Add support for firmware loader mode
Adds support for using img mgmt in firmware loader mode, to allow
for loading an update image to a device

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-05-15 14:09:55 +02:00
Tomasz Leman
750821547a pm: Return false if pm_state_force fails to set state
Ensure `pm_state_force` returns `false` when it fails to retrieve or set
the desired power state. This change improves error handling and ensures
the function's behavior aligns with its intended purpose.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2025-05-15 14:09:46 +02:00
Chris Friedt
ee874b346d tests: posix: xsi_realtime: add integration platforms to testsuite
Use qemu_x86, qemu_cortex_a53, and qemu_riscv64 as integration
test platforms for this testsuite, since both qemu_x86 and
qemu_cortex_a53 both have an MMU available, and qemu_riscv64
can execute quickly that mmu-less systems can also use a subset
of the option group (minus `mmap()`).

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-05-15 14:09:33 +02:00
Chris Friedt
ab4616856e tests: posix: xsi_realtime: bump min_ram to 96k
The xsi_realtime testsuite now includes tests for fsync() and
fdatasync() which require a ram-based fat filesystem.

Technically speaking, it would probably not be 100% necessary
to use a ramdisk to test these functions, but then the test
would be limited to running on platforms with some file-system
based storage.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-05-15 14:09:33 +02:00
Jérôme Pouiller
182e69095b tests: drivers: pwm: Fix build
Commit a1f48216bc ("soc: silabs: siwx91x: Rename pins") broke the test
for pwm_api.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-05-15 14:09:23 +02:00
Martin Hoff
744c70bef8 tests: drivers: rtc: add siwg917_rb4338a board overlay and add rtc tag
Add rtc tag to the siwg917_rb4338a board to activate testing on the
board.
Also add an overlay for the board in order to run the test correctly.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-05-15 14:09:23 +02:00
Martin Hoff
d7deac712e dts: arm: silabs: add rtc node for siwg917
Add rtc node that was present on siwx91x baords.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-05-15 14:09:23 +02:00
Martin Hoff
742261ddaa drivers: rtc: add silabs siwx91x rtc driver
Add the support of silabs siwx91x basic rtc driver.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-05-15 14:09:23 +02:00
Iuliana Prodan
53d21f6d3d samples: add support for i.MX8ULP DSP in openamp_rsc_table
Add the dts and config overlay for imx8ulp_evk//adsp
to have the openamp_rsc_table sample working on
HiFi4 DSP from i.MX8ULP.

Since openamp_rsc_table sample uses IPM API and i.MX8ULP
has a mbox driver for messaging unit, we need a mailbox node.
This will load the ipm_mbox driver that exposes the IPM
interface while using a MBOX driver in the back-end.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2025-05-15 14:09:10 +02:00
Muzaffar Ahmed
951d60dcbc drivers: wifi: siwx91x: Add support for TWT
- Implemented `siwx91x_set_twt_setup` and `siwx91x_set_twt_teardown` for
  handling TWT setup and teardown requests.
- Added validation for TWT parameters, including negotiation type,
  device state, and operation type.
- Integrated TWT functionality into the `wifi_mgmt_ops` structure for
  seamless management via the Zephyr Wi-Fi API.

Signed-off-by: Muzaffar Ahmed <muzaffar.ahmed@silabs.com>
2025-05-15 14:08:37 +02:00
Jeppe Odgaard
8b934dc1fa drivers: eeprom: tmp11x: remove redundant build assert
Initialization priority is already check by `check_init_priorities.py`

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2025-05-15 11:18:41 +02:00
Jordan Yates
81c4e80420 wifi: nrf_wifi: don't block workqueue in RPU recovery
Don't block the system workqueue for 2 seconds (default value) when
attempting to perform RPU recovery. The system workqueue is a shared
resource which should not be blocked for significant periods of time.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-05-15 11:18:37 +02:00
Benjamin Cabé
ef23562a19 doc: enhance accessibility guidelines in documentation
Add accessibility guidelines to the documentation guidelines

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-05-15 11:18:31 +02:00
Benjamin Cabé
67032314e5 doc: css: accessibility improvements
Minor tweaks to increase contrast as per WCAG AA guidelines.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-05-15 11:18:31 +02:00
Jhan BoChao
7450a5249d driver: flash: add flash driver for rts5912
add flash driver for rts5912.

Signed-off-by: Jhan BoChao <jhan_bo_chao@realtek.com>
2025-05-15 11:18:22 +02:00
Chris Friedt
393446108e samples: net: lwm2m: depend on xsi single process for gettimeofday()
https://github.com/zephyrproject-rtos/zephyr/actions/runs/\
15014534061/job/42189411225

We were seeing a linker error of the form

```
picolibc/x86_64-zephyr-elf/lib/32/libc.a(libc_time_time.c.o): \
  in function `time':
time.c:(.text.time+0x11): undefined reference to `gettimeofday'
```

Update the dependency from CONFIG_POSIX_TIMERS to
CONFIG_XSI_SINGLE_PROCESS for gettimeofday().

Note: this is really only a workaround. The proper solution would
be to have libc functions not depend on POSIX functions.

Specifically, here

https://github.com/zephyrproject-rtos/picolibc/blob/\
51a8b32857e75345c37652a80b5cda98b28d69e5/newlib/libc/time/\
time.c#L54

and here

https://github.com/zephyrproject-rtos/zephyr/blob/\
3a4e12899c2ae5962a64055f4739f774fb7262e5/lib/libc/common/\
source/time/time.c#L17

Also mentioned in #89068

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-05-15 09:04:08 +02:00
Anisetti Avinash Krishna
9b2e0a4b5b tests: drivers: rtc: rtc_api: boards: Enable ALARM and UPDATE testing
Enabled CONFIG_ALARM and CONFIG_UPDATE to enable these tests on intel
platforms.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2025-05-15 09:00:48 +02:00
Jérôme Pouiller
cfbab0eb4a boards: silabs: siwx91x: Add support for QSPI controller
Thanks to the bootloader, the memory controller is preconfigured when
Zephyr start on RB44342A.

However, this is the opportunity to show how to configure the PSRAM
controller on custom designs.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-05-15 09:00:39 +02:00
Jérôme Pouiller
1d4a0d78e3 drivers: memc: Add support for siwx91x QSPI controller
Silabs siwx91x includes a memory controller for (Quad-)SPI PSRAM. It
allows the application to use the PSRAM as if it was any other RAM.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-05-15 09:00:39 +02:00
Jérôme Pouiller
91e3f78837 drivers: memc: Sort inclusions
These are only cosmetics changes to prepare integration of the further
patches.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-05-15 09:00:39 +02:00
Jérôme Pouiller
60922a056c boards: silabs: siwx91x: Add support for PSRAM
Radio Board 4342A has 8MB of PSRAM connected to the Quad-SPI memory
controller.

The memory controller of the 4342A is preconfigured by the bootloader.
So, the PSRAM work out of the box without any manual configuration.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-05-15 09:00:39 +02:00
Jérôme Pouiller
12afcc880c boards: silabs: Add support for rb4342a
Radio Board 4342A is really similar to the 4338A. There are a few
difference on the pinmux, but most of the peripherals and the SoC are
the same.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-05-15 09:00:39 +02:00
Jérôme Pouiller
a1f48216bc soc: silabs: siwx91x: Rename pins
The reference manual and the schematics of the reference designs
numbers the pins from 0 to 57. So let's also apply this scheme to the
pinctrl.

Note while PIN are numbered between 0 and 64, the GPIOs are represented
with 4 block of 16 GPIOs. This is the way the GPIOs are documented in
the reference manual, so we don't change that (In addition,
gpio_port_pins_t is a uint32_t, so it won't be possible to represent 64
GPIOs in one gpio_port_pins_t anyway).

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-05-15 09:00:39 +02:00
Quang Le
2b2c5fc1c2 samples: drivers: spi: Add support for RZ/G3S-SMARC
Enable SPI driver samples for RZ/G3S-SMARC

Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-05-15 09:00:31 +02:00
Quang Le
66eb8a8c1d tests: drivers: spi: Add support for RZ/G3S-SMARC
Enable SPI driver tests for RZ/G3S-SMARC

Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-05-15 09:00:31 +02:00
Quang Le
81bd1f5ea6 boards: renesas: rzg3s_smarc: Add SPI support
Add SPI support for board RZ/G3S-SMARC

Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-05-15 09:00:31 +02:00