Commit graph

11 commits

Author SHA1 Message Date
Carlo Caione
9d563e8f74 cache: libmetal: Redirect sys_cache_flush()
Libmetal is still using the old sys_cache_flush(). Use an helper until
libmetal is properly fixed.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-01-19 14:31:02 -05:00
Carlo Caione
e77c841023 cache: Expand the APIs for cache flushing
The only two supported operations for data caches in the cache framework
are currently arch_dcache_flush() and arch_dcache_invd().

This is quite restrictive because for some architectures we also want to
control i-cache and in general we want a finer control over what can be
flushed, invalidated or cleaned. To address these needs this patch
expands the set of operations that can be performed on data and
instruction caches, adding hooks for the operations on the whole cache,
a specific level or a specific address range.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-01-19 14:31:02 -05:00
Carlo Caione
20f59c8f1e cache: Rename CACHE_FLUSHING to CACHE_MANAGEMENT
The new APIs are not only dealing with cache flushing. Rename the
Kconfig symbol to CACHE_MANAGEMENT to better reflect this change.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-01-19 14:31:02 -05:00
Aastha Grover
2d9b459f15 syscalls: Add system call for cache flush & invalidate
include/cache.h: System calls declaration and implementation
kernel/cache_handlers.c: Defination of verification functions

Signed-off-by: Aastha Grover <aastha.grover@intel.com>
2020-08-04 17:26:45 -04:00
Aastha Grover
97ecad69f0 include: Implement API's for cache flush and cache invalidate
arch: arc: core: Add Cache Implementation function & prototype for arc

Signed-off-by: Aastha Grover <aastha.grover@intel.com>
2020-07-15 15:53:26 -07:00
Flavio Ceolin
67ca176754 headers: Fix headers across the project
Any word started with underscore followed by and uppercase letter or a
second underscore is a reserved word according with C99.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-17 15:49:26 -04:00
David B. Kinder
ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Anas Nashif
ea8c6aad24 kernel: remove last nanokernel ocrrurances from include/
Jira: ZEP-1323
Change-Id: I32e2dc33406a74c2e592bb2df215bd9170bf286d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-12-25 14:34:43 -05:00
Benjamin Walsh
7b526e2447 cache: add implementation for cache-less systems
Add NOP functions to allow writing cache-availabiliy-agnostic code.

Change-Id: Id8e392271329095abad3db6856a4e621702d1dae
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Peter Mitsis
a0e4568760 c++: Add extern "C" { } block to header files
Adds extern "C" { } blocks to header files so that they can be
safely used by C++ source files.

Change-Id: Ia4db0c36a5dac5d3de351184a297d2af0df64532
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:25:22 -05:00
Benjamin Walsh
334c14e66e x86: CLFLUSH and cache line size detection
Detect the presence of CLFLUSH instruction and cache line size at
runtime. It is still possible to set them manually via kconfig options
if the values are known.

Change-Id: I00bda1de4c5c241826ead6f43b887b99a963cc7b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:41 -05:00