Add a missing newline between two groups in the pin control .dtsi
file for the ch32v003evt and the linkw board to comply with style
rules.
Signed-off-by: Miguel Gazquez <miguel.gazquez@bootlin.com>
When PM2 is enabled, it will disable many of the devices, so need to
enable PM policy constraints for this mode also so that device drivers
can work.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This driver doesn't need to do anything in its irq_update
implementation, but add a dummy one so that calls to uart_irq_update
don't fail with -ENOSYS.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
This driver previously caused an assertion error if non-NULL user_data
was passed to uart_irq_callback_set. Add support for this by storing the
user data and passing it back to the IRQ callback function.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Since #84446 it became necessary to enqueue a first video buffer before
performing the transfers. Apply this config change to the sample.
Signed-off-by: Josuah Demangeon <me@josuah.net>
The WCH CH32V006EVT is an evaluation board for the RISC-V based
CH32V006K8U6 SOC.
The board is equipped with a power LED, reset button, USB port for
power, and two user LEDs.
Add the board definition, documentation, and sample overlay.
Signed-off-by: Michael Hope <michaelh@juju.nz>
The flash latency needs to be configured before switching to the high
speed clock. Set the latency based on the CH32V003 and CH32V00x
reference manual.
Signed-off-by: Michael Hope <michaelh@juju.nz>
Expand the current systick compatibility to include the CH32V00x
series. Change the HAL compatibility to include all of the CH32V
family.
Signed-off-by: Michael Hope <michaelh@juju.nz>
Compared to the CH32V003, the CH32V00x series is an evolution that
uses a different microarchitecture (V2C instead of V2A) and different
pinctrl mappings.
Fork the current qingke_v2a and use the new proposed naming convention.
Signed-off-by: Michael Hope <michaelh@juju.nz>
The CH32V006 is part of the CH32V00x series of 32 bit RISC-V
microcontrollers. This series is an evolution of the CH32V003 which
was used as a basis for this Devicetree definition.
Compared to the CH32V003, thie CH32V006 has an extra GPIO port (PB),
an extra UART (UART2), 8 KiB of RAM, 62 KiB of flash, and uses the
QingKe V2C core.
Signed-off-by: Michael Hope <michaelh@juju.nz>
The CH32V006 and others in the CH32V00x series are an evolution of the
CH32V003 and use different remap offsets for the various peripherals.
In the same way as the CH32V20x, fork the CH32V003 driver and add
CH32V00x support.
Signed-off-by: Michael Hope <michaelh@juju.nz>
The QingKe V2C has an integer multiplier but no divide. Add support
for the corresponding Zmmul extension and, as the extension was added
in GCC 13.0, add a test for the compiler version.
Signed-off-by: Michael Hope <michaelh@juju.nz>
Added 2 different revisions of RPL-s board with 2 PCH
options 600 series and 700 series.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
This commits follows the prior commit to update all the base
register which uses the Davinci driver as thier GPIO driver
Signed-off-by: Dhruv Menon <dhruvmenon1104@gmail.com>
This commit adds a padding of 0x10 bytes at the beginning of the
`gpio_davinci_regs` structure to correctly align the register
definitions with the actual register layout.
Previously, the DTS had to manually offset the base address by
0x10, introducing a special case in Zephyr's Davinci GPIO driver.
This change eliminates the need for that workaround
Adding the paddingi also help to maintain a similarly with also
to the linux counterpart.
Signed-off-by: Dhruv Menon <dhruvmenon1104@gmail.com>
Make sure to provide full paths when saving the intermediate files in
the YAML export, to prevent them from being saved in the source tree.
Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
This reverts commit 370e0882cb, the
condition is evaluated at workout creation time so this does not work at
all, plus some conditions don't have a label removal logic so pairing
this with the manifest run does not work anyway.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The building of cs.c based on the respective Kconfig option is already
taken care of CMakeLists.txt, so it's redundant to try to protect the code
through ifdefs in the c-file as well.
Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
Add an entry to the release note to inform about the new
CONFIG_OPENTHREAD_SYS_INIT Kconfig option.
Signed-off-by: Arkadiusz Balys <arkadiusz.balys@nordicsemi.no>
The new CONFIG_OPENTHREAD_SYS_INIT Kconfig option allows OpenThread
to be automatically initialised during the Zephyr POST_KERNEL
initialisation stage.
If Zephyr's L2 layer OpenThread implementation is enabled, the
IEEE802.15.4 shim layer initialises OpenThread in the POST_KERNEL
phase. However, since Openthread may work without Zephyr's L2
layer, in this case, no object can initialise it automatically.
This new Kconfig option may help start OpenThread automatically
if the L2 Layer is disabled.
Signed-off-by: Arkadiusz Balys <arkadiusz.balys@nordicsemi.no>
According to RFC 2131 Request message Exchange ID should be the same as
the one received in the Offer message from the server. Modify test to
verify that.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Add Pad option to the DHCP packets generated by the fake server, to
verify the client processes them correctly.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
According to RFC 2131, DHCP clients should use the same xid as
received in the Offer message when sending DHCP Requests. Therefore,
when generating DHCP Request message, the xid value should not be
incremented.
One vague topic is whether the xid value should be updated when
sending Requests from Renewing or Rebinding states, however RFC makes no
exception for those states, and other implementations (dhclient, lwip)
seem to reuse the same xid in such cases, so comply with this behavior.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Pad option (option code 0) can be present in between other options for
alignment. The option has a fixed 1-byte length (i. e. no length field),
therefore it did not fall under the common processing code for
unrecognized options (which include the length field at the second
byte). Therefore, not processing this option explicitly could disturb
other options processing, as the parser would wrongly interpret the next
option code as the length field. This commit adds Pad option handling to
fix the issue.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
In case the received DHCP message is malformed and contains invalid
message type, the code responsible for matching message type with a
string would assert. This shouldn't be the case that external conditions
(like receiving malformed packet) trigger asserts in the system.
Therefore modify that code, to return "invalid" string in such case
instead.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Move creation of last section id from ld linker script LONG() usage to
C code with last section attribute.
The use of `LONG()` works correctly with ld but lld emits a warning
because .last_section section is not allocated as there are no matching
input sections and discards the `LONG()` call, meaning the last section
identifier will not be present in the flash.
> ld.lld: warning: ignoring memory region assignment for
> non-allocatable section '.last_section'
Placing the last section id in `.last_section` in C code makes lld
allocate the memory for the id and thereby create the output section
with the correct output.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Discard the eh_frame section when C++ exceptions are disabled.
In principle the eh_frame may be used for other purposes such as
backtracing when linking C programs, then Zephyr compiles each source
file with '-fno-asynchronous-unwind-tables', thus keeping the eh_frame
in the elf output just takes up space.
When using gcc/ld, then the eh_frame is generally generally discarded
per default, however for clang/lld it will be included but give a
warning that the section is auto-placed.
Some platforms already discards the eh_frame, so unify this for all
targets.
As eh_frame is now discarded in linker scripts then post processing step
of removing the section during hex or bin conversion can also be
removed.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Response "data_len" field needs to be set with the size of the
received data before calling the parser as it's used inside the on_body
callback, this commit fixes it.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
With recent changes to the host stack and crypto subsystem, the actual
usage of the system and long workqueues has changed.
Here's the measured usage when doing LE SC pairing on a Cortex M0 target:
BT LW WQ : STACK: unused 360 usage 1040 / 1400 (74 %); CPU: 4 %
sysworkq : STACK: unused 0 usage 1024 / 1024 (100 %); CPU: 0 %
Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
Add a prompt to the long workqueue stack size, so that it can be easily
fine-tuned by the application. The exact usage will depend on many factors,
such as the chosen crypto backend and target architecture, so it's not
possible to have "one size fits all" solutions based on the default values.
Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
1. rework IOM cmdq buffer instantiation
2. rework spi and i2c cache handling as it is incorrect.
3. buffers need to be aligned with DCACHE on
Signed-off-by: Swift Tian <swift.tian@ambiq.com>
The previous implementation already reported a key-press event after
reading an ADC value close to the threshold for the first time.
This may lead to false events if the ADC takes a reading just during
the transition from one button state to another (especially if a
somewhat large capacitor is used to avoid noise).
A key-press state must be same for at least two samples in order to
avoid such issues, which is what this commit implements.
Signed-off-by: Martin Jäger <martin@libre.solar>
Current clock synchronization was always stepping clock. This was
causing large offset, and discontiguous ptp hardware clock time.
For TSN hardware, discontiguous ptp hardware clock time was not
able to be used for other TSN protocols.
This patch is to convert to frequency adjustment with a basic
PI control algorithm.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
At the starting of ptp syncrhonization, there may be not Sync frame
TX/RX timestamps in first time link delay calculation.
So, need a check for that in case of wrong link delay calculated.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
The Microchip CAP12xx series has a configurable sensitivity and
can drive an optional guard signal to reduce noise sensitivity.
Signed-off-by: Jeremy Dick <jdick@pivotint.com>
