The find_lsb_set is giving the position of the first '1' found,
starting from 1. "Bits are numbered starting at 1
from the least significant bit."
So that the find_lsb_set(64MBytes) is 27.
To get 64MBytes = 2^26, the value of the Init.DeviceSize must be 26.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Change the stm32_ospi_read_sfdp to have AddressSize
prepared in one single condition.
Add more debug msg.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Adaptation of the ospi nor flash driver for stm32l4 plus
where the peripheral is slighty different.
Configure the OSPIM peripheral for mcu embeddingthis peripheral
in front their octospi instances.
Add LOG for read access command like for write access.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When the SFDP table is provided by the DeviceTree with sfdp-bfp property
It is NOT read from the octoFlash.
If no table exists in the DTS and flash read SPDP fails,
the device init fails.
Availability of this sfdp_read API is conditional
on selecting CONFIG_FLASH_JESD216_API.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds the jedec216 read JEDEC ID function API.
The ospi commands are issued to the octo flash device or
by the DTS jedec-id property.
Availability of this API is conditional
on selecting CONFIG_FLASH_JESD216_API.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fixes command configuration to have samples/drivers/spi_flash
passed on stm32l562 and stm32u585 disco kits.
In OctoSPI STR/DTR and SPI/STR modes,
to determine the address_width, checking the jesd216_bfp_addrbytes
on JESD216_SFDP_BFP_DW1_ADDRBYTES_VAL_3B4B or _VAL_4B.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit set the stm32 octospi drivers for the stm32u5x
when DMA (GPDMA) is transferring.
Valid for octospi1 or octospi2.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Instead of calling __HAL_RCC_OSPIM_CLK_ENABLE() to enable the OSPI
manager clock, we now use a new clock binding in the dts.
In order to avoid confusion between the different clocks, the driver
is modified to select the clock based on their names instead of indexes.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fix the scope of some variables in various STM32 drivers including:
- SDMMC
- DMA
- OSPI/QSPI Flash
- Interrupt controller
The variables are set static instead of global and const if appropriate.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Introducing the dma transfer (also through dmamux)
to transfer data to/from the NOR octo-flash
With a DMAMUX, the DMA channel is given by the DTS.
Note that STM32U5X does not support DMA here.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
In case SFDP table is provided via device tree, take care not reading
more than expected by the function caller as the result is written
in a structure which size is predefined by one specific byte in the
table, and could be smaller than the table size.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When configuring the octo-flash in SPI/STR mode, the address size
must be on 24bits (and not on 32bits).
Despite the dev_data->address_width which is always seen as 4, the
erase command must reduce the AddressSize for this transfer mode.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fixes command configuration to have samples/drivers/spi_flash
passed on stm32l562 and stm32u585 disco kits.
In OctoSPI STR/DTR and SPI/STR modes
Signed-off-by: Francois Ramu <francois.ramu@st.com>
In the continuation of the previous commit, replace _OPT_ by _DOMAIN_
in macros relating to this feature.
hen, adapt drivers and tests to this new wording.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
With the introduction of the OSPI NOR flash controller
the stm32H7 serie requires the HAL MDMA in anycase.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The clock of the octospi peripheral is directly defined
by the DTS and configured by the clock_control_on function.
No specific stm32cube function is required then.
The clock control is taking this clock source to calculate
the clock rate.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Support writing to NOR-Flash over OSPI using
the following modes:
* 1-1-1
* 1-1-4
* 1-4-4
Supports 4-Byte opcodes conversion for write opcodes.
Allows users to set what write/program opcode is used
in the DTS (not for OPI mode).
Will use some default PP opcodes based on the mode.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds support to read and erase NOR-Flash over OSPI using
the following modes:
* 1-1-2
* 1-2-2
* 1-1-4
* 1-4-4
Supports 4-Byte opcodes conversion and gets address width
from the SFDP:BFP.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Simplifies the driver and Gives a generic function to prepare the Regular
commands for each instruction.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This is the stm32 octospi driver based on the exisitng quadspi
for stm32 devices and source code from the STM32Cube.
This drivers initialized the peripheral and the NOR memory
in SPI or OctoSPI mode with STR or DTR data Transfer rates.
The NOR-flash can provide the SDFP table directly (if supported)
or through the DeviceTree.
Limitation: no DMA transfer.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
