Commit graph

59240 commits

Author SHA1 Message Date
Jakub Rzeszutko
d4559f53fa lib: getopt: rework and extend getopt library
Getopt has been rework in this way that calling it does not require
extra state parameter and its execution is thread safe.
Global parameters describing the state of the getopt function have been
made available to ensure full API compatibility in using this library.
However, referencing these global variables directly is not thread
safe. In order to get the state of the getopt function for the thread
that is currently using it, call: getopt_state_get();

Extended the library with getopt_long and getopt_long_only functions.

Moved getopt libary from utils to posix.

Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
2022-01-06 21:26:59 +01:00
Aymeric Aillet
7f1f1229e1 soc: arm: renesas: r8a77951: fix defconfig
Fixed an error that could cause problems if
a driver reads "SOC" in the future.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2022-01-06 15:15:10 -05:00
Berend Ozceri
b208e5811e kernel/swap: Initialize dummy thread's resource pool
The resource pool of the short-lived dummy thread "stub" may be
inherited by other threads created during system initialization. This
commit initializes this resource pool to NULL or the system pool to
ensure that a well-defined resource pool propagates to other threads
that inherit it from the dummy thread.

Fixes #41482.

Signed-off-by: Berend Ozceri <berend@recogni.com>
2022-01-06 11:57:18 -05:00
Immo Birnbaum
beee999cf4 dts: arm: xilinx: Assign uniqe memory-region names for OCM
Assign unique memory-region attribute values for both OCM
memory areas so that the lower region starting at address 0
is identified as OCM_LOW, while the alternate location for
the OCM memory is identified as OCM_HIGH.

The updated linker command file will use those identifiers
for OCM section mapping based on which of the two OCM areas
is marked as 'chosen' at the board level.

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2022-01-06 11:56:48 -05:00
Immo Birnbaum
cd13e25bb3 arch: arm: aarch32: linker file fix for OCM
Fix the mapping of the sections to be located in the On-Chip
Memory so that the OCM memory region name always matches that
of the chosen OCM DT node's memory-region attribute.

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2022-01-06 11:56:48 -05:00
Immo Birnbaum
05b5a234bc dts: bindings: arm: YAML description for Zynq OCM
YAML description file for the On-Chip Memory of the Xilinx
Zynq-7000, DT identifier "xlnx,zynq-ocm".

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2022-01-06 11:56:48 -05:00
Jordan Yates
d336954d1c tests: remove manual CONFIG_GPIO_EMUL
Remove the manual selection of `CONFIG_GPIO_EMUL` as it is now enabled
by default when devicetree nodes exist.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2022-01-06 11:56:15 -05:00
Jordan Yates
c8d1e134ae gpio: emulated: default Kconfig value
Enable the emulated GPIO driver by default if instances exist in
devicetree. This removes the need to manually enable `CONFIG_GPIO_EMUL`
when `CONFIG_GPIO` is enabled.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2022-01-06 11:56:15 -05:00
Immo Birnbaum
10c046ce25 CODEOWNERS: owner for SoC Zynq-7000, board qemu_cortex_a9
Set code ownership for:
- soc/arm/xilinx_zynq7000
- boards/arm/qemu_cortex_a9

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2022-01-06 11:52:27 -05:00
Piotr Golyzniak
16dbc115c7 twister: fix skip marked as pass in json report
When some testcase is skip in their source code by ztest_test_skip()
function in final json report it is marked as pass what is wrong. Due to
the changes in this commit those skips can be marked properly.

Fixes: #41440

Signed-off-by: Piotr Golyzniak <piotr.golyzniak@nordicsemi.no>
2022-01-06 07:55:16 -05:00
Anas Nashif
ce60a91fb0 actions: twister: scale nodes up for large test coverage
If we determine we need more nodes than the default, do not override the
calculated number.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-01-06 07:32:20 -05:00
Marcin Niestroj
c9a3dae651 scripts: runners: esp32: remove print() call
This print() call was introduced as part of commit 16571db029 ("soc:
esp32: add support to mcuboot build") probably as a leftover from
debugging stage. Remove that, so flash command is not printed by
default. Those commmands can be easily printed by passing -v flag to
`west -v flash ...` command.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2022-01-05 19:48:18 -05:00
Anas Nashif
f735530dc8 MAINTAINERS: update collaborators for audio
Update collaborators for audio drivers and Intel CAVS systems.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-01-05 19:40:03 -05:00
Andy Ross
f4a0ea7b43 soc/intel_adsp: Correct errant ATOMCTL
This got broken during the cpu_init unification pass.  I appear to
have copied that zero out of code that initialized Zephyr on a
uniprocessor config somewhere.  But what it means is that any use of
the S32C1I instruction to store to any memory type will trap an
exception!  And even when CONFIG_MP_NUM_CPUS==1, we will emit code to
do that in the atomics layer when SMP=y.

That configuration ("SMP" with 1 cpu) is actually exercised by some
tests, including important ones like timer_api.  These got broken.
Fix.

Really it's never correct to have anything but 1:1:1 ("external RCW
transaction") on these CPUs.  All Intel cAVS processors have hardware
atomics support.  We owe it to all the code we'll run to make sure it
works as documented and doesn't explode.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-05 15:01:45 -05:00
Andy Ross
e4a455b25d drivers/cavs_timer: Cleanup & simplification pass
General refactoring to clean up and futureproof this driver.

Remove false dependency on CONFIG_CAVS_ICTL.  This requires the CAVS
interrupt mask API, but doesn't touch the interrupt controller driver.

Remove a racy check for simultaneous interrupts.  This seems to have
been well intentioned, but it's needless: the spinlock around the
last_count computation guarantees that colliding interrupts will
correctly compute elapsed ticks (i.e. the last will compute and
announce zero ticks, which is correct and expected).  And this opened
a tiny window where you could incorrectly ignore a just-set timeout.

Factor out the specific registers used (there are only five) into
pointer-valued macros instead of banging them directly.

Unify interrupt initialization for main and auxiliary cores.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-05 15:01:45 -05:00
Andy Ross
9cc1907706 soc/intel_adsp: Add SIMCALL output to the trace_out driver
When running under a simulator, it's difficult to extract output from
the window (it's difficult with hardware too!).  Add "SIMCALL" output
to stderr (it's literally just 3 extra instructions) as an optional
feature so this subsystem itself can be debugged without herculean
effort.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-05 15:01:45 -05:00
Andy Ross
dec55855ce soc/intel_adsp: Clean up boot.c platform detection
Reword the symbols to make it clear what they mean ("INIT_LPSRAM"
instead of "RESET_MHE_AT_BOOT") and use them correctly instead of
SOC_SERIES_* kconfigs.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-05 15:01:45 -05:00
Andy Ross
21a9c413a0 soc/intel_adsp: Remove dead memory exception handler section
We don't define a MemoryException handler, nor is one appropriate for
this hardware as it stands.  And the empty section keeps causing
linker warnings we have to work around.  Remove.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-05 15:01:45 -05:00
Andy Ross
064b73a730 soc/intel_adsp: Don't build soc_mp.c if you don't have to
Single-core instantiations of this hardware and single-core builds of
firmware still exist, so we should support that without needless
bloat.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-05 15:01:45 -05:00
Andy Ross
168da2617f soc/intel_adsp: Don't depend on XCHAL_EXCM_LEVEL
The MP startup code had a hardcoded INTLEVEL field of 5 in the initial
value of PS.  That's needless, INTLEVEL is a full 4 bit field even if
the number of hardware interrupt levels is lower (and in fact 0xf is
the documented hardware reset state).  Set that instead, so that this
code will work with any XEA2 hardware.  This also matches the similar
code path in boot startup.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-05 15:01:45 -05:00
Andy Ross
422c2ec0f3 soc/intel_adsp: Move irq handling to separate file
Most of soc.c is actually interrupt handling glue for the intc_cavs
driver.  Give it its own file so that SOC initialization and bringup
can live separately.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-05 15:01:45 -05:00
Daniel Leung
40138c96b2 interrupt_controller: dw: use finalstatus instead of maskstatus
Instead of using maskstatus to see if an interrupt has fired,
use finalstatus instead. It has been observed that some
controllers do not update maskstatus correctly with incoming
interrupts, but finalstatus works fine.

FYI, the DW driver in Linux is also using finalstatus.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-01-05 15:01:45 -05:00
Marc Herbert
f38c6b67ed samples: big_http_download: make num_iterations unsigned
It is documented as unsigned in
samples/net/sockets/big_http_download/Kconfig

Signed overflow is undefined behavior, unsigned is not. This fixes the
following warning:

   -Wstrict-overflow=1

samples/net/sockets/big_http_download/src/big_http_download.c:346:2:
In function 'main':
error: iteration 2147483648 invokes undefined behavior
                           [-Werror=aggressive-loop-optimizations]
  346 |  } while (--num_iterations != 0);

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2022-01-05 15:00:32 -05:00
Konstantinos Papadopoulos
5da3d3148d samples: exclude platform stm32f769i_disco
Excluded due to conflicts with adafruit_2_8_tft_touch_v2.
Both boards got a touch controller.

Signed-off-by: Konstantinos Papadopoulos <kostas.papadopulos@gmail.com>
2022-01-05 14:59:58 -05:00
Erwan Gouriou
c4ae984a2d drivers/clock_control: stm32u5: Use LL API to set MSI as PLL srce
Recent changes in this function made the code now compatible
with the use of LL API to perform this configuration.
Use it to simplify the driver.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-01-05 14:59:34 -05:00
Anas Nashif
b8e9b04384 footprint: track audio features on xtensa
Track footprint of ther SOF application on both intel and nxp xtensa
platforms.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-01-05 14:59:01 -05:00
Krzysztof Chruscinski
4100c57faa shell: Fix immediate logging case
When logging is using immediate mode then logging messages
can be processed from any context, including interrupt context.
z_shell_fprintf was asserting in that case since it allowed to
be called from interrupt context only when logging was in panic
mode. However, shell works in the same way when logging is in
immediate mode as in panic mode.

Renamed internal shell flag from panic_mode to sync_mode. Flag
is also set when shell log backend is started in synchronous
mode (immediate logging) which prevents assertion.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-01-05 14:58:46 -05:00
Dino Li
a89e60d7d8 gpio: it8xxx2: open source configuration isn't supported
This makes test of tests/drivers/gpio/gpio_api_1pin happy
on it8xxx2_evb.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2022-01-05 14:58:22 -05:00
Dino Li
22d2bc9567 boards: it8xxx2_evb: enable LED0
With this change, we are able to build test of
tests/drivers/gpio/gpio_api_1pin for the board.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2022-01-05 14:58:22 -05:00
Dino Li
e79b6f1a81 tests: drivers: gpio: basic: add it8xxx2_evb test configuration
Add basic GPIO API test configuration for the IT8XXX2.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2022-01-05 14:57:54 -05:00
Yong Cong Sin
e77d87da65 drivers: modem: gsm: Fix NULL being passed to rssi_handler
Fix hard fault due to NULL being passed as argument into
rssi_handler, which now derives the gsm_modem struct pointer from
the argument.

Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2022-01-05 14:57:16 -05:00
Kai Vehmanen
c4ae27ca4f soc/intel_adsp: fix icache initialization
XCHAL_HAVE_ICACHE_DYN_ENABLE is not set for any Intel cAVS
hardware, so MEMCTL configuration is not done properly leaving
icache disabled. This can be seen as ~10X slowness when running
code on non-primary cores. Fix the issue by using XCHAL_USE_MEMCTL
to check for MEMCTL usage.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2022-01-05 13:45:58 -05:00
Krzysztof Chruscinski
c51aa88046 logging: Fix counting of buffered messages
When message is dropped then log_process is called with
bypass flag set and additionally z_log_dropped() is called.
In both functions counter of buffered messages was decremented.
That resulted in counter being decremented twice. It resulted
in logging misbehavior after messages being dropped (delayed
processing). Fixing it by decrementing the counter in log_process
only when bypass flag is not set.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-01-05 14:42:40 +01:00
Krzysztof Chruscinski
8c0a017cd3 logging: Improve algorithm for waking up the thread
Use value returned by atomic_inc to decide on action.
Previously direct value was used and that could lead to
delays in logging processing because thread waking up
could be mishandled.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-01-05 14:42:40 +01:00
Abe Kohandel
56a04a8200 bluetooth: l2cap: receive server error status
Only consider negative statuses returned from a L2CAP server as error.

This makes the status check done here consistent with the check done in
l2cap_chan_le_recv_sdu.

Signed-off-by: Abe Kohandel <abe.kohandel@gmail.com>
2022-01-05 14:42:33 +01:00
Aastha Grover
d13613750b samples: logging: Add v2 logging support for sys-t sample.
Adding #ifndef CONFIG_LOG2 condition for log_msg_ids and
log_string_sync in sys-t sample. Extending support for
v2 logging in sys-t sample.

Signed-off-by: Aastha Grover <aastha.grover@intel.com>
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2022-01-05 14:41:51 +01:00
Aastha Grover
a89fae798c logging: Add MIPI sys-t support for v2 logging subsystem.
Adding functions log_output_msg2_syst_process and hexdump2_print
to support v2 logging subsystem.

Updates west.yml to pick up a new version of the MIPI sys-t library that
supports vprintf.

Signed-off-by: Aastha Grover <aastha.grover@intel.com>
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2022-01-05 14:41:51 +01:00
Trond Einar Snekvik
45ef0d2aef Bluetooth: Mesh: Use double pointer in bt_mesh_app_key_resolve
The signature of bt_mesh_app_key_resolve expresses pointer to a 16 byte
array as a const uint8_t *app_key[16], which is actually an array of 16
byte pointers. The intended type is equivalent to a double pointer to
const uint8_t, but trips up GCC 11, which actually checks this.

Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
2022-01-05 14:40:06 +01:00
Trond Einar Snekvik
8417f04d75 Bluetooth: Mesh: Fix beacon_auth header net_id size
The crypto.h declaration of the bt_mesh_beacon_auth function declares
the net_id parameter to be a 16 byte array, but the function definition
says 8 bytes. This breaks compilation in GCC 11, which feeds an 8 byte
array into this API, triggering a warning. Change the header declaration
to 8 bytes, which is the right size.

Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
2022-01-05 14:40:06 +01:00
Gerard Marull-Paretas
f08279901d doc: css: update code documentation directives style
New Sphinx version (or docutils) has slightly changed the output format
for code documentation directives. These changes try to mimic previous
behavior, even though it does not achieve 100% equal result. In some
cases the new default style does not require further tweaks, and in some
others styling as before is not possible.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-01-05 14:38:24 +01:00
Gerard Marull-Paretas
37566221ba doc: update requirements
breathe: for simplicity, require versions > 4.30 (lower versions have
known issues, so do not take risks).
Sphinx: start requiring versions >=4.x. Keep with compatible versions,
since Sphinx major updrages can easily break extensions, themes, etc.
sphinx_rtd_theme: upgrade to >=1.x. Again, keep with compatible versions
since we have style customizations that can likely break on major
upgrades.
pygments: Allow any version >=2.9 (version that introduced DT support).
We do not have strong compatibility requirements here.
sphinx-notfound-page: Remove any requirements, we do not have strong
requirements for this one.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-01-05 14:38:24 +01:00
Chris McDonald
f882d43b56 sys/util: Stricter bytecpy impl
The docstring for this function states that it is guaranteed to perform
a copy byte by byte, but this is not true in general without a
`volatile` storage type on the casted pointer.

Signed-off-by: Chris McDonald <cjmcdonald@chromium.org>
2022-01-04 20:52:16 -05:00
Gerard Marull-Paretas
6adda40775 drivers: pinctrl: gd32: do not disable clock
Disabling clock may conflict with concurrent usage of GPIOs and pins in
AF mode. This can be improved once a proper clock control API is in
place.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-01-04 20:49:00 -05:00
Gerard Marull-Paretas
38d583bbf4 tests: drivers: gpio: gpio_basic_api: add support for gd32f403z_eval
Add DT overlay to run gpio_basic_api test on GD32F403Z-EVAL board. In
order to make testing easy a couple of accessible pins have been
selected: PD0 and PD1 pins exposed via P3 and P2 respectively.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-01-04 20:49:00 -05:00
Gerard Marull-Paretas
3bf7a7a326 tests: drivers: gpio: gpio_basic_api: add support for gd32f450i_eval
Add DT overlay to run gpio_basic_api test on GD32F450I-EVAL board. In
order to make testing easy a couple of accessible pins have been
selected: PC6 and PC7, the last 2 pins on the DCI camera 2.54" header.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-01-04 20:49:00 -05:00
Gerard Marull-Paretas
1ecffda843 boards: arm: gd32f403z_eval: add leds and keys
Add definitions for board LEDs and keys now that a GPIO driver exists.
The GPIO driver has also been enabled in the board defconfig, since it
is required to run some basic samples (e.g. blinky).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-01-04 20:49:00 -05:00
Gerard Marull-Paretas
7d7cc59e4c boards: arm: gd32f450i_eval: add leds and keys
Add definitions for board LEDs and keys now that a GPIO driver exists.
The GPIO driver has also been enabled in the board defconfig, since it
is required to run some basic samples (e.g. blinky).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-01-04 20:49:00 -05:00
Gerard Marull-Paretas
b9127e48e6 drivers: gpio: gd32: initial version
Add GPIO driver for Gigadevice SoCs. The driver supports devices with
the AF and AFIO models.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-01-04 20:49:00 -05:00
Gerard Marull-Paretas
01f55d709e dts: arm: gigadevice: gd32f4xx: add syscfg node
Add node for the SYSCFG registers (required by the GPIO driver).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-01-04 20:49:00 -05:00
Gerard Marull-Paretas
4ec5983b22 dts: bindings: misc: add gd32 syscfg
Add support for GigaDevice SYSCFG.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-01-04 20:49:00 -05:00