Commit graph

129 commits

Author SHA1 Message Date
Carles Cufi
ddcc350a8b nrf52: Auto generate Intel Hex kernel image
Generate kernel image in Intel Hex format when building for the nRF52.
Remove the additional step from the board doc file.

Change-Id: I619496f64037c2a0ac459ae05e549e01458e0f71
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2016-05-29 03:27:27 -07:00
Kumar Gala
bbe222cad0 soc: arm: Unify setting of Cortex-M specifc compiler flags
Moved setting of specific Cortex-M compiler flags in each SoC directory
unify setting them in the arch/arm/soc Makefile.

Add flags for Cortex M0, M0+, M1, M3, M4, and M7.  However only
CONFIG_CPU_CORTEX_M3 and CONFIG_CPU_CORTEX_M4 are supported at this time

As part of this change converted Kbuild files for some SoCs into
Makefiles as the Makefiles would be empty otherwise.

Change-Id: Ie4e0178b141ca761ec482a610ae50e94fe58070f
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-05-27 10:45:48 -05:00
Kumar Gala
6102427e5d build: Introduce concept of SoC specific build flags
Introduce a soc-cflags, soc-cxxflags, and soc-aflags as a means for
SoC specific compiler flags to be set without manipulating Kbuild
options directly.

Change-Id: I2c8f5019fb237429e59717ef96bd4251a61dc1a5
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-05-27 10:04:29 -05:00
Carles Cufi
893fbd5460 arm: Add support for Nordic Semiconductor's nRF52 series of ICs
Add SoC support for the Nordic Semiconductor nRF52 series.

JIRA: ZEP-377
Change-Id: Idb476f43d7ca35f87c73910dd9bd1c50032ccdbe
Signed-off-by: Glenn Ruben Bakke <glenn.ruben.bakke@nordicsemi.no>
Signed-off-by: Vinayak Kariappa Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Håkon Alseth <haakon.alseth@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2016-05-27 01:38:20 +00:00
Kumar Gala
9ec2f3be80 Cleanup whitespace in Kconfig files
Convert leading whitespace into tabs in Kconfig files.  Also replaced
double spaces between config and <prompt>.

Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-05-25 13:28:07 -05:00
Anas Nashif
fbe7d90ead spi: consalidate and simplify
Use the same Kconfig infrastructure and options for all SPI drivers.

Jira: ZEP-294
Change-Id: I7097bf3d2e1040fcec166761a9342bff707de4dd
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-05-12 10:57:26 +00:00
Anas Nashif
0140da310b i2c: unify kconfig options and share them across drivers
Reduces Kconfig variables by ~20

Change-Id: If39f7d49482d62417c621f98bc8c0c78df0d4139
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-05-12 10:57:22 +00:00
Andrew Boie
ff872dc349 build: rename non-generated linker scripts to .ld extension
Avoids confusion with .gitignore rules, which were inadequate to
cover all the places where these files are found. At least in
VIM, these files are now syntax highlighted correctly.

Change-Id: I23810b0ed34129320cc2760e19ed1a610afe039e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-09 18:09:26 +00:00
Daniel Leung
8f0ab3038c arm/nxp_kinetis/k6x: simplify uart init
The UART console init should be done after UART init. So it can be
folded into general UART init, thus one fewer SYS_INIT().

Change-Id: Ifb18c5308dfef790325e6bff5bc7b5976fcd421e
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-05-03 12:43:31 +00:00
Daniel Leung
ad6ed299b7 arm/nxp_kinetis/k6x: always inline clock init function
The clkInit() is always called so this can be inlined.
This saves 32 bytes of ROM space compared to non-inlined version.

Change-Id: I2cb6d02c0996acad16029be243f6059183938089
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-05-03 12:43:31 +00:00
Daniel Leung
b6f56d478a arm/atmel_sam3: always inline clock init function
The clock_init() is always called so this can be inlined.
This saves 32 bytes of ROM space compared to non-inlined version.

Change-Id: I1b95142da4c22f4b7fc7f7f6210503d90cf65cc9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-05-03 12:43:31 +00:00
Anas Nashif
79ba6c5d47 gpio: unify kernel configuration for all architectueres
This also enables GPIO on ATMEL SAM3 when GPIO is set.

Change-Id: I4125af4910d57bed98b0ee4967fb696e3f345e67
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-30 13:43:26 -04:00
Andre Guedes
981caded95 arch: st_stm32: Include errno.h
The files soc_config.c and soc_gpio.c use errno code so they should
include errno.h.

Change-Id: I94237aa294701cc71ed17ea42eca9d8073d4ae47
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-04-26 22:49:49 +00:00
Anas Nashif
7c27d8ab3a soc: arm: add Makefiles one level up
It was not possible to add directories under an SoC family
because of the direct call to Makefile in the SoC series from the
architecture level.

While we have SoC still using the old structure, add a conditional
to still support old structure and allow Makefiles directly under
an SoC family directory. 

This is useful for adding drivers and BSP files common to one family.

Change-Id: I85dc8341523b41949de91d78675153ce0baa5aac
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 21:33:26 +00:00
Johan Hedberg
264c207f4f Bluetooth: Add custom "monitor" protocol logging over UART
With most boards there's no simple way to get access to the HCI
traffic. Simultaneously these boards only have one external UART for
the console. This patch introduces a protocol which combines both
normal logs and HCI logs over a single binary protocol sent over the
console UART.

The protocol is modeled based on the btsnoop/monitor protocols used by
BlueZ, and the first tool that's able to decode this is btmon from
BlueZ ("btmon --tty <tty>").

For platforms with two or more external UARTs it is still possible to
use CONFIG_UART_CONSOLE as long as the UART devices used are
different, however on platforms with a single external UART
UART_CONSOLE should be disabled if BLUETOOTH_DEBUG_MONITOR is enabled
(in this case printk/printf get encoded to the monitor protocol).

Origin: Original
Change-Id: I9d3997c7a06fe48e7decb212b2ac9bd8b8f9b74c
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2016-04-22 18:49:11 +03:00
Anas Nashif
b85ffc8104 stm32: reorganise soc directory and use family/series
Use SoC family/series and reoganise the structure to follow new
hierarchy.

Change-Id: I8637f1487a8287a6614ce6636cd018cf342fec95
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-18 21:24:59 +00:00
Anas Nashif
65c06afa58 kinetis: reorganise soc directory using soc family
Add Kinetis SoC family and rename fsl_frdm_k64f to mk64f12.
This will allow adding new SoCs of the same family and the reuse of code
among SoCs of the family and series.

Change-Id: Iea1a663aef7ce0487f147bdd36f668bebe80deb5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-18 21:24:58 +00:00
Anas Nashif
4b411b34a1 stm32: rename SOC_STM32F1X -> SOC_SERIES_STM32F1X
Use SOC_SERIES_* for naming SoCs with similar features and architectures
with the goal of code reuse. The Series in the config variable should avoid
name collisions and clearly denote the relationships within an SoC family.

Change-Id: I7a98542f96b5d5dc3acc23782c4d45f98cceb599
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-18 21:24:58 +00:00
Anas Nashif
9bf2da7ef4 stm32: rename CONFIG_SOC_STM32 -> CONFIG_SOC_FAMILY_STM32
Use CONFIG_SOC_FAMILY for the top level SoC family. A family
will have different SoCs or different SoC series with multiple
SoCs.
Adding the Family string to the config variable to avoid confusion
between actual SoCs and families and to prevent name collisions.

Change-Id: Ic99a2c1df7850dee3a45641027af82464dd6fadb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-18 21:24:58 +00:00
Daniel Leung
2d1ed03a8f pwm/k64_ftm: remove kconfigs that are SoC specific
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.

Change-Id: Ifd65097a65f80539cac073f95aadc2d8e42efb9f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-31 23:17:24 +00:00
Daniel Leung
32c6d97922 console/uart: remove duplicate default value for parent UART dev
There is no need to re-define CONFIG_UART_CONSOLE_ON_DEV_NAME to be
"UART_0" all over the place as its default is "UART_0" already.
So remove those duplicate defaults.

Change-Id: Ia86e26b8f90540fdbd7dcb3358d6dac352648b21
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-30 13:38:58 +00:00
Daniel Leung
546b8ade37 refactor common driver initialization priorities
Most of the SoC and board Kconfig use the same values for
driver initialization priorities. So refactor them, and
discard duplicate ones.

The shared IRQ init priority was changed so that the kernel
default init and device init priorities can be standardized
across all SoC/boards. Same goes for DesignWare SPI driver.

This also changes the UART_CONSOLE_PRIORITY and
IPM_CONSOLE_PRIORITY to UART_CONSOLE_INIT_PRIORITY and
IPM_CONSOLE_INIT_PRIORITY, to standardize across all drivers.

Note that this does not take away the ability to override
those values. This just provides reasonable defaults such
that there is virtually no need to override.

Change-Id: Ibbd95d802c637df06f9a2fd48763ee1e6f4ff627
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-28 15:58:29 -07:00
Daniel Leung
cecc4b0fb5 pinmux: remove base address and number of pins from kconfig
The pinmux base address and number of pins are now defined in SoC or board
header files instead of specifying them in kconfig. This is because
the pinmux ties directly to the SoC (or board expanders) so the base
address and number of pins do not need to be configurable in kconfig.

Change-Id: Ib6090d7d022b491f3fe8f522858281504c6302bb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-28 15:58:29 -07:00
Daniel Leung
a2ba5d1ba3 spi/k64: remove SoC specific SPI constants from kconfig
The base address, IRQ line, chip select numbers, and clock
gating constants are static per SoC, so there is no need to
make them configurable in Kconfig.

Change-Id: I9f87ca29c28c38c42d4e4f1a3a41fa231f63ef03
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-26 20:36:32 -04:00
Daniel Leung
9c62a4a01f frdm_k64f: gpio: pinmux: remove base addr and irq from kconfig
The base address and IRQ line are static per SoC, so there is no need
to make them configurable in Kconfig.

Change-Id: Ib78401ff136c29642356f5bda9d6cd3e5c98bece
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-26 20:36:32 -04:00
Daniel Leung
7f6d4e37ee serial/stellaris: remove base addr, irq and clk freq from kconfig
The UART port base address, IRQ line and clock frequency are static
per SoC, so there is no need to make them configurable in Kconfig.

Change-Id: Ia252958d205e0100d1b92e2a12d4c22411bc94b9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-26 20:36:32 -04:00
Daniel Leung
2a29e22c2f serial/k20: remove base addr, irq and clk freq from kconfig
The UART port base address, IRQ line and clock frequency are static
per SoC, so there is no need to make them configurable in Kconfig.

Change-Id: I79b142414143bc5ef585d3136a00375233de1723
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-26 20:36:32 -04:00
Daniel Leung
c215ef7213 kconfig: add conditions to device init priority defaults
This adds conditions to the default values for device init priorities,
and make them follow the dependencies on the config options. This cleans
up the resulting .config a bit, making it easier to read.

Change-Id: Ib05806ac6108d465ffe245142ecca7a51be6df22
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-26 20:36:32 -04:00
Daniel Leung
8df10d4584 kconfig: untangle ordering and dependencies
There are two major issues with the kconfig:

() Some of the config options have incorrect dependencies inside help
   under menuconfig. For example, CONFIG_GPIO depends on BOARD_GALILEO.

() Since the SoC and board specific kconfig files are parsed first,
   the help screen would say, for example, CONFIG_SPI is defined at
   arch/arm/soc/fsl_frdm_k64f/Kconfig. This is incorrect because
   the actual config is defined in drivers/spi/Kconfig.

These cause great confusion to users of menuconfig/xconfig.

To fix these, the SoC and board defaults are now to be parsed last.

Note that the position swapping of defaults in this patch is due to
the fact the the default parsed last will be used.

And, spi_test is broken due to the fact that it requires
CONFIG_SPI_INTEL_PORT_1, but never enables it anywhere. This is
bypassed for now.

Origin: refactored and edited from existing files
Change-Id: I2a4b1ae5be4d27e68c960aa47d91ef350f2d500f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-26 20:36:32 -04:00
Ramesh Thomas
bb19e6f82f power_mgmt: Make names consistent with new RFC
Changed names of Kconfig flags, variables, functions, files and
return codes consistent with names used in the RFC. Updated
relevant comments to match the changes.

Origin: Original
Change-Id: Ie7941032d7ad7af61fc02928f74538745e7966e8
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-03-26 14:35:11 -04:00
Vinicius Costa Gomes
d872bb173c pinmux: Move STM32 boards to the pinmux model
This moves the STM32 based boards (Nucleo F103RB and STM32 Mini A15) to
the "new" pinmux model.

Change-Id: I190df271a6b83fafeec0b281cd4ee7cf13d7e7db
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-03-25 06:17:33 -04:00
Vinicius Costa Gomes
a12a25ad00 pinmux: Move the Freescale FRDM K64F board to the pinmux model
Change-Id: I50cf5fcf00481a3ebac07ced3aa6f7783765934f
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-03-25 06:17:33 -04:00
Vinicius Costa Gomes
649253c8a8 k64f: Fix mixing GPIO and pinmux concepts
Setting the direction of a GPIO pin is not the responsibility of the
pinmux "board" initialisation. This should be left for the GPIO
utilising application.

Some macros that were only used when setting the pin direction are
removed.

Change-Id: I5b63d52446a27fe539c89f0639a8dcadf5ea9f80
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-03-25 10:17:01 +00:00
Andre Guedes
db2e46319f arch: Convert returning codes to errno.h
This patch replaces all occurrences of DEV_* codes by errno.h codes at
the arch layer.

Change-Id: I1a1ab6d0481f3660ad032e2690d2577245fe1f34
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-23 15:49:40 +00:00
Daniel Leung
5b8c5fcc48 arm/fsl_frdm_k64f: remove kconfig default "n" for PWM
CONFIG_PWM is set to "no" by default, so there is no need
to do it in the SoC kconfig file. Also, setting CONFIG_PWM
there causes kconfig to think that CONFIG_PWM depends on
CONFIG_SOC_FSL_FRDM_K64F and gives warnings about
unmet dependencies if the certain combinations of CONFIG
are set.

Change-Id: I0028accfc4b585dcfa87e0d5733b789691a598e3
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-23 15:43:22 +00:00
Vinicius Costa Gomes
7f68afe382 k64f: Move pinmux specific code to pinmux.c
This makes this board more consistent with the rest of the code base.

Change-Id: I5641c6358e638a3585d2154e67d3536b11436e01
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-03-22 15:17:13 +00:00
Maciek Borzecki
61c0363257 clock_control/stm32f1: HSE support and PLL configuration cleanup
Add support for use of HSE (incorrectly named PREDIV1)as input of PLL,
along with HSE bypass for stabilized external clock, and XTPRE
prescaler. Update PLL handling so that we do not unnecessarily enable
PLL clocks, instead enabling only the clocks sources that are required
as per user's configuration.

This change allows higher SYSCLK clock values, up to 72MHz.

Change-Id: Ia7c2be3ce11ac0de2efa664b20e7ab5fddd57a51
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-21 16:36:13 +00:00
Maciek Borzecki
7205070402 soc/stm32f1: add embedded flash registers mapping
Add mapping of registers for embedded flash controller.

Change-Id: I81f891551124e9f124ff59dfe0b3c737ec5b3b63
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-21 16:36:12 +00:00
Vinicius Costa Gomes
facfc59464 pinmux: Convert return codes to errno.h
Before moving pinmux related code to 'drivers/pinmux' fix their return
codes to be consistent with the rest of the API.

Change-Id: Ie84f64e93745d44bef8b9d2119f6a05cdc8cb8c4
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-03-19 10:44:38 +00:00
Maciek Borzecki
624c9e339a watchdog/iwdg_stm32: add driver for STM32 Independent Watchdog (IWDG)
Add a driver for Independent Watchdog (IWDG) commonly found in STM32
MCUs. The driver has been tested on STM32F1 family MCU.

Change-Id: Idc6ac35990e46901a206b4af0ce3767eb4875de9
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-18 20:57:26 +00:00
Maciek Borzecki
7c5cb7b85e soc/stm32f1/gpio: implement MCU specific GPIO input interrupt integration
Add necessary integration for supporting interrupts on GPIO input pins
for STM32F1 line of MCUs.

Change-Id: I0526a85cc3fdb96891c93ba4840ef27d613ab31b
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-18 20:57:16 +00:00
Maciek Borzecki
dd583518ee soc/stm32f1: AFIO registers mapping
Add mapping of Alternate Function I/O (AFIO) registers for STM32F1 MCU.

Change-Id: Id3e12290d6869c1f0506549f21407b3cd80d0a64
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-18 20:55:36 +00:00
Maciek Borzecki
33907674dd interupt_controller/stm32_exti: driver for STM32 EXTI controller
Introcuce a driver for External Interrupt/Event Controller (EXTI) found
on STM32 MCUs.

Change-Id: Ib206521fcc51b5dfaaf5dea9d436f8304f3a36be
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-18 20:53:06 +00:00
Maciek Borzecki
e8d16b2985 soc/stm32f1: add IRQ numbers listing
Add a list of symbolic constants for IRQ lines available on
STM32F1 line of MCUs.

Change-Id: Iebf1847719c0db31cf852529fe5876e3cabbfe52
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-18 20:49:33 +00:00
Maciek Borzecki
a8700114b3 soc/stm32f1/pinmux: implement STM32 pinmux integration
Add necessary integration code enabling use of common STM32 pinmux
driver.

The alternate function listing currently consists of USART1 pins
only. The listing should be updated when support for more devices is
added.

Change-Id: Ic65aeea9df9aaea7636ecdd6996f56e6ef59dc2f
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-18 16:27:04 +01:00
Maciek Borzecki
3642f9d6a3 soc/stm32f1/gpio: implement GPIO support
Add functions required for integration with common STM32 GPIO driver.

Change-Id: Ic6637e991f5c0cf659f3b927ed47ef482b13b64f
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-18 16:27:04 +01:00
Maciek Borzecki
3f5af00529 clock_control/stm32f10x: introduce driver for STM32F10x RCC
The patch adds a driver for STM32F10x series RCC (Reset and Clock
Control) subsystem.

The module is primarily responsible for setting up of MCU's clock
tree. In particular the driver sets up SYSCLK, PLL (with source
configuration), AHB prescaler, and APB1/APB2 prescalers. As part of this
functionality, the subsystem can enable/disable clock signal for
particular peripherals, thus reducing the power consumption of the MCU.

The driver implements clock control driver API. However, subsystem IDs
being HW specific are exposed in driver public header that must be
included by callers. The driver registers a single device using a common
name STM32_CLOCK_CONTROL_NAME. The device is initialized at
the PRIMARY level with priority 1. This allows the initialization to
take place right after SoC initialization routine.

The driver depends on selection of SOC_STM32F1X config option and is MCU
specific.

Change-Id: I8bea5db20726a24bce7b7ffe0b95de543240429a
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-16 18:11:18 +00:00
Maciek Borzecki
1c78f3d39b st_stm32/stm32f1: introduce STM32F1x SoC family
The patch introduces a new family of SoCs based on STMicroelectronics'
STM32 MCU line. The patch introduces a basic arch/arm/soc layout along
with configuration of 2 MCUs from STM32F1 series: STM32F103VE and
STM32F103RB.

The patch assumes that other MCUs from STM32 family will be included
under arch/arm/soc/st_stm32 tree, to achieve the following layout:

arch/
  arm/
    soc/
      st_stm32/
        stm32f0/
        stm32f1/
        stm32f2/
        ...
        stm32l0/

Most of the configuration within a single MCU family (ex. STM32F1) is
shared, however individual MCUs differ with respect to SRAM size, flash
size or the number of available peripherals. The patch assumes that per
MCU line Kconfig.soc.family file should introduce basic setup for given
series. This can be further tuned by per MCU files, with
Kconfig.soc.stm32f103rb and Kconfig.soc.stm32f103ve as examples.

Each family defines a configuration option, ex. CONFIG_STM32F10X, while
individual MCUs define a corresponding per MCU config options,
ex. CONFIG_STM32F103VE.

From the menuconfig perspective, the user is presented with a family
selection under General Platform Configuration/SoC Selection.  A
specific MCU model can be selected by accessing General Platform
Configuration/STM32F1x MCU Selection, with the default entry being
selected by the board configuration.

Change-Id: I22e4defd4a08ed1b2e2cad0e214b34f565e08831
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-16 18:03:13 +00:00
Daniel Leung
52caf8cfc8 arm/fsl_frdm_k64f: fix kconfig hierarchy
This makes sure the CONFIG_GPIO_K64F_* kconfig options have correct
dependencies. Or else CONFIG_GPIO_K64F can be disabled, but all
the CONFIG_GPIO_K64F_{A,B,C,D,E} are enabled.

Same goes for SPI, FTM and pinmux.

Change-Id: I8d225dea714081b14b19006d61b8f3f6afafa5ee
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-15 21:39:15 -04:00
Dan Kalowsky
983ec93bd4 arch: arm: move nmi to common location
The nmi_on_reset.S functions are used by all ARM platforms.  It
makes no sense to repeat the same code for all platforms.  Moving
the code from each SOC implementation to arch/arm/core.

The same treatment for the NMI_INIT() macro.  Moving it from a per
SOC implementation to the include/arch/arm/cortex_m/nmi.h.

Change-Id: I574d8880a44046cc7b9e1b635e80d6e83657b8c1
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-03-12 03:20:36 +00:00