The current version of at86rf2xx RX implementation don't uses advanced
capabilities offer by the transceiver. This access SRAM space to gatter
PHR information in parallel with transceiver frame reception. It allows
improve RX reception by handling properlly the frame protection feature
removing transceiver states changes.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Current rf2xx_thread_main code have too many if/for/while imbrication.
Extract methods from rx2xx_thread_main for better readability.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
blt is signed comparsion, if r6 is a negative number created by
malicious code, it will pass the check, bring a secure risk.
use blo (unsinged comparison) to do the check.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
ARC didn't have many changes, but there's a bunch of irq-related
fixes since the last release, so mention these.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This function is widely used by functions that validate memory
buffers. Macros used to check permissions, like Z_SYSCALL_MEMORY_READ
and Z_SYSCALL_MEMORY_WRITE, use these functions to check that a
pointers passed by user threads in a syscall.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Do not use the content of the status register to write into the
override register because it may have unpredictable effect,
instead to a read/modify/write on the override register.
Signed-off-by: Armand Ciejak <armandciejak@users.noreply.github.com>
It is necessary to poll the ENET_EIR_MII bit before reading
the data register as explained in the i.MX RT1060 reference
manual in chapter 41.7.17.4.
Use PHY_* functions from NXP HAL to correctly access the PHY
registers.
Signed-off-by: Armand Ciejak <armandciejak@users.noreply.github.com>
Extend the bad syscall-ID test case to cover
erroneously supplied larged unsiged syscall-ID
values.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We need an unsigned comparison when evaluating whether
the supplied syscall ID is lower than the syscall ID limit.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Now that the west parts of this file are in better shape, it seems a
shame not to flesh out the rest a bit more.
It's been a while since we looked at this document, as it's still
referring to boards (like Arduino 101) that are no longer supported by
Zephyr, and is generally lacking in concrete, step-by-step advice
for going from zero to working board.
Let's fix that.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
This enables the ADC output data to be shifted right when using
10-bit resolution. Or else, data would be left justified as if
it's doing 12-bit ADC with the right 2 bits filled with zeroes.
Fixes#23202
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This includes the following changes:
- modules: Fix bugs in ECIA and PECI headers
- modules: Fix bug in MEC1501 TACH header
- mec1501: fix bits for setting 10-bit ADC resolution
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit fixes the multiple SERCOM interrupt handling for the SAM
D5x and E5x devices by replacing the obsolete device tree symbol with
the new `DT_INST` symbol.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
If the application has used bt_le_oob_get_local to retrieve the OOB
RPA address and OOB authentication information the central role should
use this RPA address for the next RPA timeout period.
The central role always refreshes the RPA address for the initiator,
this will make the OOB information not usable as the peer cannot
recognize the central role since the RPA address is changed.
Check if the initiator can use the address for the duration of the of
remaining RPA period.
Fix central role using the advertiser identity when setting the private
address. The central role should only use the default identity.
Regressions from:
fbe3285bfa
and
4876a8f39a
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
In C++ designated initializers require that designators used in the
expression must appear in the same order as the data members.
In addition, 7-2018-q2-update version of g++ doesn't support
implicit member initialization, so all members must be
initialized.
Signed-off-by: Alexey Eremin <a.eremin.msu@gmail.com>
The third argument in memmove can possible be greater than remaining
buffer size. Just ensuring that memmove will changes bytes only inside
the string buffer and nothing else.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Fix possible NULL dereference in BT_DBG statement when
bt_mesh_friend_get is called before a successful cfg_srv init
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
In addition to having security vulnerability fixes reported within each
release note page, consolidate all of them in a new vulnerabilities
document.
This gives us two advantages: 1. The vulnerabilities can easily be
referenced in a single place, which is useful for someone trying to
cross reference against CVE lists, and 2. It allows a release to be made
with just CVE numbers when issues are under embargo, and the details can
be added to this vulnerabilities page. The release notes will be locked
to a tag, and updates will not be visible.
Signed-off-by: David Brown <david.brown@linaro.org>
Describe how to work around the Gatekeeper enforcement of security
policies in apps launched from the Terminal.
Fixes#23168.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Improve priority queue conditional build. Now priority queue code is
enabled only if device have support to it. This enables GMAC driver
for devices with only one queue for RX/TX.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The Atmel SAM SoC with ethernet port uses same GMAC driver. However,
there are differences between SoC GMAC implementation. Some SoCs have
priority queue and system can configure 0 up to 5, depending of SoC
version. This update current GMAC driver adding missing definitions.
Co-authored-by: Stephanos Ioannidis <root@stephanos.io>
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add missing queue entries for sam gmac. This update the queue selection
to proper handle all supported SAM SoC that uses GMAC driver.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The first revision of the SAM E70 soc had three queues. The current
revision B has six queues. If we don't initialize all queues, the DMA
engine gets stuck when trying to read a descriptor from NULL. To enable
the initialization of the additional queues, the correct soc has to be
selected in the config options, f.ex. CONFIG_SOC_PART_NUMBER_SAME70Q21B
instead of CONFIG_SOC_PART_NUMBER_SAME70Q21.
Also rename GMAC_QUEUE_NO to GMAC_QUEUE_NUM as requested during review.
Signed-off-by: Daniel Glöckner <dg@emlix.com>
When debugging on a long running platform, the MCU may get reset by
the debugger with an ndmreset toggle. Since there is no requirement
that this resets anything in particular on the platform, the CLINT
registers may not get reset. When this occurs with an mtime register
value that is larger than 32 bits the riscv machine timer will
continuously interrupt the system when the mtime register exceeds 32
bits in value. This is because the last_count value is used to update
the mtimecmp register, and its value is initialized to zero. Its
first update is with a 32-bit value, which loses information when the
mtime register exceeds 32 bits.
The proposed solution is to set the last_count value to the current
value in the mtime register when the timer is initialized. Since the
timer is fired at intervals that are less than 32 bits in value, the
next update of last_count will remain valid, and the system will
function as expected.
Signed-off-by: Jaron Kelleher <jkelleher@fb.com>
This sample requires led0 in the board devicetree's /aliases.
Improve the error message when that is not available.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Add a note that describes the fact that blinky does not run on all
boards supported by Zephyr, and propose an alternative (Hello World) for
those boards.
Fixes#23169.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Improve the documentation of the blinky sample, fixing typos, adding
links to the relevant DT documentation and cleaning up a bit.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The 'command' command line argument for this flasher is now being
overridden by common code, which attaches the west subcommand name to
this.
Let's just hotfix this by renaming the argument in misc-flasher.
We can revisit the boundary between run_common.py arguments and
runners package arguments after the release.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Adds 2.2 release notes for all remaining driver classes. Moves RISC-V
driver changes from the architectures section to the drivers section.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
And an overlay for the nRF52840 DK to be able to build the sample after
the transition to Device Tree.
Fixes#23148.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
On Atmel SAM family the watchdog peripheral is enabled by default. To
ease maintenance of tests and samples, which typically don't handle
watchdog, disable the watchdog during the boot.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
To ease maintenance of samples and tests some SoCs define
CONFIG_WDT_DISABLE_AT_BOOT=y to disable the watchdog. Ensure the option
is set to n for samples and tests that require watchdog module not to be
disabled during boot.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This reverts commit 382e6fbccf.
Disabling watchdog at boot breaks watchdog API contract. Production
firmware should never ship with the option enabled. Unfortunately, this
is dangerosly easy to overlook. If left enabled, in the best case, it
will degrade functionality of the subsystem. In the worst case it
will leave watchdog permanently disbled.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
The page buffer can overflow if dCBWDataTransferLength
is multiple of the BLOCK_SIZE but the host uses
OUT packets smaller than MPS durng transfer.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
The ARMv7-M MPU requires power-of-two alignment, not the ARMv8-M MPU, as
noted a few lines later.
Signed-off-by: Anders Montonen <Anders.Montonen@iki.fi>
