Whenever trying to generate a local RPA to send a scan request or a conn
ind, verify that it can be generated (i.e. no NULL IRK provided by the
Host) and fall back to using the public/random address if required.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The ESP32 UART driver can only be used on the ESP32 SoC AFAICT. But it
did not have a depend clause so it was polluting the options of other
platforms.
With this patch the ESP32 driver will no longer be exposed to users of
non-ESP32 devices.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Since the hardware expects big-endian IRKs but the common generation
function expects it in little-endian, copy and reverse the peer IRK
before generating RPAs.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Sample can be used to test ambient light, RGB and proximity
functionality of APDS9960 sensor in polling mode.
Remove old sample which is not using sensor API.
ZEP-1552
Signed-off-by: Punit Vara <punit.vara@intel.com>
This patch implements following functionality in polling mode.
Ambient light
RGB light
proximity sensor
Following datasheet has been used to develop driver
https://docs.broadcom.com/docs/AV02-4191EN
Jira: ZEP-1552
Signed-off-by: Punit Vara <punit.vara@intel.com>
This commit adds new sensor channel macro SENSOR_CHAN_BLUE which can
be used for RGB sensors to get illuminance in Blue spectrum.
Signed-off-by: Punit Vara <punit.vara@intel.com>
Contributions of 3rd party code and external HALS should have
information about the license of the code being contributed.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
When integrating Zephyr in other environments to build for a specific
product or platform, we should be able to remove HALs that are not
needed and usually huge in size.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
As luck would have it, the TSS for the main IA task has
all the information we need, populate an exception stack
frame with it.
The double-fault handler just stashes data and makes the main
hardware thread runnable again, and processing of the
exception continues from there.
We check the first byte before the faulting ESP value to see
if the stack pointer had run up to a non-present page, a sign
that this is a stack overflow and not a double fault for
some other reason.
Stack overflows in kernel mode are now recoverable for non-
essential threads, with the caveat that we hope we weren't in
a critical section updating kernel data structures when it
happened.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This is a simpler memory arrangement; RAM will start with
app data, and everything after it is either kernel data or
unclaimed memory reserved for the kernel's use.
New linker variables are also implemented here.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Configuring the RAM/ROM regions will be the same for all
x86 targets as this is done with linker symbols.
Peripheral configuration left at the SOC level.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The CPU first checks the page directory entry for write
or user permissions on a particular page before looking
at the page table entry.
If a region configured all pages to be non user accessible,
and this was changed for a page within it to be accessible,
the PDE would not be updated and any access would still
return a page fault.
The least amount of runtime logic to deal with this is to
indicate at build time that some pages within a region may
be marked writable or user accessible at runtime, and to
pre-set the flags in the page directory entry accordingly.
The driving need for this is the region configuration for
kernel memory, which will have user permissions set at
runtime for stacks and user-configured memory domains.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
These can be computed from start/end values, but such
arithmetic can't be done when populating at build time
struct member values.
Some documentation has been added to explain exactly
what these symbols mean. It is intended for application
RAM to come first, then followed by kernel RAM and then
all unclaimed memory (also considered kernel RAM).
Obsolete _image_ram_all[] removed.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Kernel data size shifts in between linker passes due to the addition
of the page tables. We would like application memory bounds to
remain fixed so that we can program the MMU permissions for it
at build time.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This was not working properly but only noticeable if the
sections involved were not preceded by a KERNEL_INPUT_SECTION
definition for the same sections (i.e. the application data
coming first in the memory map)
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Page faults will additionally dump out some interesting
page directory and page table flags for the faulting
memory address.
Intended to help determine whether the page tables have been
configured incorrectly as we enable memory protection features.
This only happens if CONFIG_EXCEPTION_DEBUG is turned on.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
ReST defines interpreted text roles where text enclosed by single quotes
can be "intrepreted", for example :ref:`some name` becomes a link to
a label anywhere in the doc set named "some name", :c:func:`funcname()`
becomes a link to the API documentation for "funcname", and
:option:`CONFIG_NAME` becomes a link to, in our case, the documentation
for the generated Kconfig option.
This patch fixes uses of `some name` (without a role) by either adding
an explicit role, or changing to ``some name``, which indicates inline
code block formatting (most likely what was intended).
This is a precursor to changing the default behavior of interpreted
text to treat `some name` as :any:`some name` (as configured in
doc/conf.py), which would attempt to create a link to any available
definition of "some name".
We may not change this default role behavior, but it becomes an option
after the fixes in this patch. In any case, this patch fixes incorrect
uses of single-quoted text (possibly introduced because GitHub's
markdown language uses single-quoted text for inline code formatting).
Jira: ZEP-2414
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Request from Marketing and Linux Foundation to add a link to the Zephyr
GitHub repo on the documentation home page.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Implement the LE Enhanced Connection Complete HCI event, but include it
only when controller-based privacy is enabled, since it is only relevant
with it.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Since a connection attempt can fail and will still generate an LE
Connection Complete event, check the status from the LL control module
before incrementing the HCI connection count used for flow control.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
This change fixes the prescaler values in the defconfig. The prescaler
values shown in the technical reference manual (STM32F407xx, p.19)
differ from those in the defconfig which results in wrong timer delays.
This patch corrects those values according to the manual. I tested it by
toggling a GPIO pin with different timer frequencies and run the
sanitycheck.
Signed-off-by: Andreas Kölbl <andreas.koelbl@st.oth-regensburg.de>
The Test ID was incorrectly being added as 4 bytes (size of a pointer)
instead of the intended 1 byte.
This fixes Coverity CID 173643.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Count of 4 seems to cause deadlocks with some Android phones due to
other GATT activity in addition to Mesh related data.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The current 960 is at least too small under qemu_x86:
ecc stack (real size 1024): unused 36 usage 988 / 1024 (96 %)
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The previously used default value of 4 for the PPL_Q_DIVISOR results
in a frequency of 84MHz which is outside the acceptable range
of 47.88MHz to 48.12MHz.
The new value of 7 results in exactly 48MHz.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
The ouput speed of the gpio pins passed via the 'conf' argument was
ignored, causing the speed to always be in its reset state (lowest
possible speed for most pins). This was causing problems for pins that
actually need a speed faster than the default, like the ethernet
controller pins.
Combined with the correct pinmux configuration this fixes problems
of the olimex_stm32_e407 board not being able to send ethernet data.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Looks like post_ci is not executed when something fails and results are
not being posted. Duplicate code in both failure and success cases.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The nRF5 AAR requires the packet pointer to be placed exactly 3 bytes
before the beginning of the address. Since we don't use the S1 extra
length byte, substract one from the address of the radio packet pointer.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The currently supported hardware in the LL requires big-endian IRK
values to properly function. Reverse the order of the IRK bytes coming
from HCI to address this issue.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The nRF5's AAR was being improperly configured, leading to a NULL
scratch pointer which made it not function at all.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
