Move to utilizing an inline function for getting the base addr of the
external interrupt register region. This is in prep for support more
than 32 external interrupts.
Change-Id: Ifdaad67703068395a7749543ef68435435e7c9ba
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The HDC1008_I2C_ADDR config option should be available only if HDC1008
is enabled.
Change-Id: I0d1813512396faefb609527ba5df2a0c4ea159a9
Signed-off-by: Bogdan Davidoaia <bogdan.m.davidoaia@intel.com>
Change e4b89571aa renamed the variable
to an undeclared one, without breaking verify but daly breaks.
A local variable of type spi_intel_data was missing on this
function.
Jira: ZEP-1095
Change-Id: Ie410933c2472378d4a6f24d6ca932ac203e3b08c
Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
Provides users with a more compact and intuitive API for kernel
timers.
Provides legacy support for microkernel timers and nanokernel
timers by building on the new kernel timer infrastructure.
Each timer type requires only a small amount of additional
wrapper code, as well as the addition of a single pointer
field to the underlying timer structure, all of which will be
easily removed when support for the legacy APIs is discontinued.
Change-Id: I282dfaf1ed08681703baabf21e4dbc3516ee7463
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Revises documentation for the kernel clocks to align it
with the actual behavior of the unified kernel.
Revises documentation for the kernel timer object type
to provide users with a more compact and intuitive API
that supports (directly or indirectly) the capabilities
of the now defunct microkernel timer and nanokernel
timer object types.
Note: A separate commit will be used to implement the
revised timer API described here.
Change-Id: Ifa4306c76e1c3e2aab1c0b55031df4179ac2a6b9
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
This will be reverted once input is supported in QEMU.
Change-Id: I4bc946f1634bf9ebd17b697f0da7ce2f813e5725
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
These platforms don't have the hardware and will always fail.
Change-Id: I637d39f003bd1d507da0b5bb6fa12118040fcd63
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
Ensure that we catch all fatal faults and report them as such (we were
only catching the ones in fibers).
Change-Id: Id734cdd02f4950d19717467a212032433a7dcc61
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
- Reorders parameters where necessary
- Adds alignment parameter to K_MSGQ_DEFINE() for buffer alignment
- Renames parameters where necessary so they are more intuitive
Change-Id: I0b53105c04109127897bf4790e6908082f82da4e
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
In order to print the proper strings that the test case execution
frameworks expect, use the macros defined in tc_util.h.
Change-Id: I841c5454fbcf4f679e6285538e838f039442b1f8
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
Finally, after numerous, preparation patches... Make a device drivers
config_info structure 'const'.
Change-Id: Idc4682705da18a18b694d3fb21ba6006f96ac87b
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Mutable driver state relocated from config_info to driver_info.
This driver is unused by any board, nor can it be compiled for any
board. Hence this patch reflects the mechanical change that should be
made to the driver in order to support a const config_info, but the
patch has been neither compiled, nor tested.
Change-Id: I28597962e81d6e02f1f4befe48c3a3324691cfeb
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Mutable driver state relocated from config_info to driver_info. This
driver supports PCI enumeration. We drop code that attempts to update
irq_num based on PCI enumeration because the interrupt found by PCI
enumeration must always be the same as the statically configured IRQ
number.
Change-Id: I5580b0ba95635696a825fe66dbf16259c54d5ba8
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
PCI enumeration modifies pci_dev and base_addr at driver
initialization therefore these objects move from config_info to
driver_data in preparation for config_info becoming const.
We drop code that attempts to update irq_num based on PCI enumeration
because the interrupt found by PCI enumeration must always be the same
as the statically configured IRQ number.
Change-Id: Ibfefa851d2836d524b8151ed0108ecf9de2cd3a3
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
PCI enumeration modifies pci_dev, base_addaress at driver
initialization therefore this objects move from config_info to
driver_data in preparation for config_info becoming const..
We drop code that attempts to update irq_num based on PCI enumeration
because the interrupt found by PCI enumeration must always be the same
as the statically configured IRQ number.
Change-Id: Id5af682dac112ec6dc6e4aa14b655e0047972d38
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Mutable driver state relocated from config_info to driver_info. This
driver supports PCI enumeration. We drop code that attempts to update
irq_num based on PCI enumeration because the interrupt found by PCI
enumeration must always be the same as the statically configured IRQ
number.
Change-Id: I97198ae9603505606a872b07824d6c61688f0ced
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Pending bit gets cleared by writing 1 into it, so don't use the previous
value and just write the line bit offset instead.
Change-Id: I4c88016bf53327b2670a144d3b994945f26fc002
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>¬
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Since dd5e90ec the device_get_binding call returns NULL unless the
driver_api is set by the driver. Since the exti driver only uses an
internal struct to store the callbacks, remove the need for the device
binding call from other drivers (e.g. gpio).
Change-Id: If0b733c27754108118d87ef02640311f0535ab57
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
The field is "NF: Noise detect flag". Given that every other field name is
faithful to the manual, do the same for NF.
Change-Id: I300663e6d5016bf28071d2a1926ec73682ae3d01
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
When running sanity with asserts turned on the following tests don't
fit the ROM region of CONFIG_SOC_QUARK_D2000:
- test_build_sensor_triggers
- test_build_sensors
Added filters prevent these test from being executed when asserts are
on.
Jira: ZEP-1063
Change-Id: Ib046bcb227f4a49b524894aa5aea80debe159aae
Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
In QMSI 1.2 API, the RTC divider value for the prescaler can now be set
on runtime. This is done through a config parameter for the qm_rtc
driver.
Fix the rtc shim driver by using the value defined in rtc.h as
RTC_DIVIDER.
Change-Id: I5ab61a5a1a3debca103f2782e0ac584938dc91e1
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Update the QMSI drop we maintain in Zephyr, and fix the build where
needed:
- QM_USB_BASE is renamed to QM_USB_0_BASE;
- parameter int_en from qm_uart cfg struct was removed;
- driver's folder now has a new structure, fix makefiles accordingly;
- QM_WDT_MODE and related renamed to QM_WDT_CR_RMOD;
- QM_SCSS_AON renamed to QM_AONC.
Change-Id: Iffe9c66b7a3f2fe64418326e20ff0894149b3044
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
The hexiwear board has a k64 SoC, so we can reuse the k64 pinmux driver
and just add a new pinmux table for the board.
Jira: ZEP-716
Change-Id: I936691b3578db298014f44fe18433d7943b431f3
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The hexiwear board pairs two Kinetis SoCs - k64 and kw40. The k64
already has SoC support in Zephyr, therefore we are adding support for
another board for the same SoC. Note, however, that hexiwear uses a
different SoC package than the Freedom board and therefore has a
different part number and pinout.
The second SoC on the hexiwear board, kw40, runs a BLE controller stack
with HCI; it does not run Zephyr (yet).
Jira: ZEP-716
Change-Id: I206f6ef58010d13075a00432040894392117e3ce
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The k64 pinmux driver can be used for any k64 board, not just frdm_k64f,
therefore renaming the driver accordingly.
Change-Id: I45e96d4a5ff6aa859d0f57fe098e44a8ae5283d1
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
For the EM Starterkit, one SOC I will soon be adding is EM7D.
This SOC has FIRQ, but only has one register bank.
Thus the interrupt handling for FIRQ needs to be different
when CONFIG_RGF_NUM_BANKS==1. The handler must instead push
registers onto the stack in the same stack frame layout that RIRQ uses.
This allows for context switch to be easily done since its compatible.
The common interrupt entry point _isr_enter must save r0 before using
it, because in the FIRQ 1-bank case, it would be destroyed otherwise.
So a global variable named saved_r0 has been added for this reason.
The stack cannot be used to save r0, because it first has to determine
whether its FIRQ or RIRQ here. This change has been tested on the
EM Starterkit with EM7D SOC changes -- coming soon. To make the review
easier, these 3 files are submitted first.
Also, exceptions will no longer use the _firq_stack.
This stack is not needed in the 1-bank case, but an exception stack
is needed. I've added a new stack called _exception_stack,
and made it be 512B, which should be enough for one exception.
See ZEP-966
Change-Id: I6f228b840da7c4db440dd1cfef4ae25336c87f0d
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Those options are not being used anywhere, so remove them and avoid some
confusion.
Change-Id: Ia3767dbd2432851dfae4b1e996f02ed1b2450505
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The Atmel SAM3 serial driver poll in function checked
for new characters incorrectly.
Change-Id: I9024a991404bf949226634c9f6c6ea507577cff1
Signed-off-by: Justin Watson <jwatson5@gmail.com>
- Renames to K_MEM_POOL_DEFINE() for consistency
- Adds alignment parameter to align the pool buffer.
Jira: ZEP-926
Change-Id: I6cf0a1ce45c3a0fc5f0675047d8928659df1e75e
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>