This patch adds the allow flash write CONFIG option to the NXP MPU
configuration in privileged mode.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: David Brown <david.brown@linaro.org>
The output state of the CS GPIO must be configured with a pull-up while
setting the GPIO as output. Otherwise the GPIO will be forced low,
before being set high by the call to spim_nrf52_csn(). This results in a
glitch of 1us on the CS line, which may confuse some ICs in the worst
case.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
When setting the SPIM speed to 8 MHz, the driver will return an error
due to a missing "break" causing the execution flow to reach the default
case.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
Fix incorrect return data type, which causes controller to
hang generating random numbers.
Fixes bug introduced in commit d90095b556 ("Bluetooth:
controller: Use random numbers in adv and enc setup")
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
patch fix the dead code issue reported by coverity static scan
for gpio driver of cc2650 TI SOC. CC2650_IOC_NO_PULL macro
is defined Zero, bitwise and with any value would result to
zero,because of which only false condition of if is evaluated
but not the true condition.
Jira ZEP-2469.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Currently Thread time slice is getting reset at end of timer
interrupt. Due to which equal priority threads behind current thread
in ready_q are not getting chance to run and leading to starvation.
This patch handles time slice in _ExcExit section context switch is
required.
Jira: ZEP-2444
Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The revert commit title is usually prefixed with "Revert" which causes
the title to become longer than the allowed limit. Allow such commits to
keep revert commits consistent with the original commit message.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
When including referecnes to external resources using a URL, keep the
line with URL in one line to not break the link and allow this to pass
the gitlint test.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
If there are multiple preemptive threads with same priority, and any
one thread preempts before its time slice expires (due to yields/
semaphore take/queue etc), then next schedules thread is getting
lower time slide than expected.
This patch fixes this issue by accounting time expired when a thread
releases CPU before its time slide expires.
Jira: ZEP-2217/ZEP-2218
Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
In Tickeless kernel Platform timekeeping is having error because
"_sys_clock_tick_count" is not getting updated correctly.
Currently "OVERFLOW" Flag (bit 16 in timer control register)
is reset before it is taken into account into _sys_clock_tick_count.
This patch sets a flag as soon as Timer Overflow occues and clears
it when time is accounted into _sys_clock_tick_count.
Jira : ZEP-2217
Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
The specification requires the scanner to verify that the AdvA present
in a scan response matches the AdvA that was sent in the original scan
request.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Added implementation to get random numbers in ISR. And fixed
implementation to use random numbers in advertisement random
delay and encryption setup procedure.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
The transmit and receive procedure used in the STM32 SPI driver is not
correct.
On STM32F4, this is causing OVR errors (per the logged error mask) and
transmission of undesired 0x00 bytes (verified with a logic analyzer).
The root cause is that the receive register is not read (via DR, when
RXNE is set) each time the transmit register is written (also via DR,
when TXE is set). This clearly causes OVR errors when there is no
FIFO, as the receive register needs to be read each time a frame is
transceived, or the IP block has no way of knowing that the
overwritten data were not important.
Adapt the I/O procedure so that every DR write is matched by a DR
read, blocking until the relevant flags are set if necessary.
This behavior is suboptimal for targets such as STM32L4, where there
is a SPI FIFO. However, SPI I/O is broken on those targets, and this
patch fixes them as well. Further optimizations for targets with FIFOs
is left to future work.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
With some other issues in polled mode now resolved, add error handling
and report a valid error status when releasing the context.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Byte access is always naturally aligned; there's no need to use
UNALIGNED_GET or UNALIGNED_PUT. Those would only be needed when
supporting 16-bit data frames.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The current implementation unconditionally enables the SPI (sets
SPI_CR1_SPE) in transceive(), but disables it only in master mode.
The peripheral should only be enabled while the user has specifically
requested I/O. Fix this by always disabling the peripheral when I/O is
complete.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Polled and IRQ-driven SPI I/O share code for cleanup and completion,
which can now be factored into its own routine.
This keeps a single point of truth for common paths, which will allow
a subsequent bug fix to happen in one place, and help avoid future
regressions.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
In polled mode, the STM32 SPI driver is signaling completion when
there are no waiters:
- the only spi_context_wait_for_completion() caller in this driver is
in the IRQ-driven portion of transceive() itself, which isn't
compiled in polled mode.
- the "asynchronous completion + polled I/O" combination is not
supported by the driver, so there are no other threads polling on
this I/O we need to signal completion to.
What should be happening instead of signaling completion is releasing
the chip select pin, which polled I/O currently doesn't do.
Fix these issues.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The LL_SPI_NSS_* macros used in spi_stm32_configure() when
hardware-based NSS management is requested are incorrect; fix them.
In master mode, this seems like a copy/paste error. The slave mode
case is likely due to following incorrect documentation in the ST LL
headers.
Note that in my testing on STM32F4, NSS appears to be open drain when
managed by hardware, making that configuration harder to test (and
probably less useful).
Details for the curious:
The ST LL headers (for example stm32f4xx_ll_spi.h) claim
LL_SPI_NSS_HARD_INPUT is to be used only in master mode, and
LL_SPI_NSS_HARD_OUTPUT is to be used in slave mode.
The opposite is true: when NSS is not handled by software, the SPI
peripheral is responsible for driving NSS as an output, and the
slave peripheral is responsible for reading it as an input.
This is an error in the LL header files; the reference manuals and
the other LL code make this clear.
- The ST reference manuals specify that LL_SPI_HARD_OUTPUT (which
corresponds to SSM unset, SSOE set) is a master-only
configuration. For example, STM32 RM0368 says:
"NSS output enabled (SSM = 0, SSOE = 1)
This configuration is used only when the device operates in
master mode."
- LL_SPI_HARD_INPUT (SSM unset, SSOE unset) is either a master or
a slave configuration; in the slave case (which is what we're
interested in here), it corresponds to the "usual" NSS
input. RM0368, again:
"NSS output disabled (SSM = 0, SSOE = 0)
This configuration allows multimaster capability for devices
operating in master mode. For devices set as slave, the NSS
pin acts as a classical NSS input: the slave is selected when
NSS is low and deselected when NSS high."
The LL_SPI_StructInit() implementations similarly combine
LL_SPI_MODE_SLAVE with LL_SPI_NSS_HARD_INPUT.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Now that struct spi_context supports passing errors from
interrupt-driven I/O handlers to waiting threads, we can enable error
interrupts and propagate errors to spi_transceive() callers.
To make it easier for users to debug SPI-related issues, log any error
bits set in SR when failures occur.
A subsequent patch will add error checking to polled mode as well, but
other cleanups and fixes will go in first to make this easier.
Note that this breaks the spi_loopback test on some targets, but it's
not a regression, as it wasn't working properly anyway. Subsequent
patches the bugs that this error checking has exposed.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The SPI API allows waiters to block until SPI I/O has completed. The
asynchronous subset of the API allows waiters to learn a status value
for the result of the I/O. However, the synchronous API does not allow
this.
Due to this limitation, synchronous API users cannot learn when
interrupt-driven I/O fails, which precludes proper error handling.
Resolve this limitation by adding a sync_status field to struct
spi_context, and using it to return operation results to the waiter.
Since there is only one status field, reduce the maximum number of
supported waiters from UINT_MAX to 1. This is not a problem for
current users, which all wait with the entire context locked.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Void pointer arithmetic is undefined behavior (UB).
It's OK for struct spi_buf to contain a void *, because those values
are only ever stored, read, and compared. However, pointer arithmetic
is done on the tx_buf and rx_buf fields in struct spi_context, so
those need to be u8_t * to avoid UB.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
This is a convenience macro for getting the master/slave operational
mode, which will be used in a subsequent commit.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Print the entire memory areas of interest on error, instead of
stopping at the first null character.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
This includes files for both polled and IRQ-driven I/O. The log level
is deliberately kept to ERROR to try to shake out any timing-dependent
bugs which go away with extra logging.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Add SPI pin mux tables for 96b_carbon. Note that SPI1 is for
internal use on the board connecting to the 96b_carbon_nrf51, while
SPI2 is broken out to an expansion header.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
k_thread_cancel() is replaced with k_thread_abort() because
k_thread_cancel() is used to cancel threads that have not started yet.
Canceling asynchronous thread was returning an error.
Signed-off-by: Michał Kruszewski <michal.kruszewski@nordicsemi.no>
The parsing of strings with sharp notes (e.g. "100C#") was incorrectly
implemented. Now it should be correct. Additional benefit is that this
should fix Coverity CID 173632.
Jira: ZEP-2467
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
For an accepted socket, we should set our receive callback and start
to queue packets ASAP (in the accept callback itself). Otherwise,
(if done in accept() call like before) we may miss to queue some
packets.
This issue wasn't exposed with slow SLIP and with emulated QEMU, but
easily exposed with Ethernet on a real hardware.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
We need to define __LINUX_ERRNO_EXTENSIONS__ if newlib is being
used otherwise there is a compile error about ESHUTDOWN errno
value missing.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
- Fix typo'd "&&" when checking bit value
- Don't use NET_EVENT_IPV6_ADDR_ADD for checking mask value
due to combination of bits: _NET_EVENT_IPV6_BASE |
NET_EVENT_IPV6_CMD_ADDR_ADD
Instead use NET_EVENT_IPV6_CMD_ADDR_ADD so the check works
when NET_EVENT_IPV6_ROUTER_ADD is enabled.
Tested fix with echo_server on x86 qemu where it was previously
broken.
Signed-off-by: Michael Scott <michael.scott@linaro.org>
- replaced test points with ztest APIs wherever possible
- replaced CONFIG_MAIN_STACK_SIZE with CONFIG_ZTEST_STACKSIZE
in the config file
- split the main file into two files:
- main.c has ztest entry and runs separate functions for ztest
- sha256.c has the original routines
JIRA: ZEP-2449
Signed-off-by: Niranjhana N <niranjhana.n@intel.com>
- replaced CONFIG_MAIN_STACK_SIZE with CONFIG_ZTEST_STACKSIZE
in the config file
- split the main file into two files:
- main.c has ztest entry and runs separate functions for ztest
- mbedtls.c has the original routines
JIRA: ZEP-2449
Signed-off-by: Niranjhana N <niranjhana.n@intel.com>
- replaced test points with ztest APIs wherever possible
- replaced CONFIG_MAIN_STACK_SIZE with CONFIG_ZTEST_STACKSIZE
in the config file
- split the main file into two files:
- main.c has ztest entry and runs separate functions for ztest
- hmac_prng.c has the original routines
JIRA: ZEP-2449
Signed-off-by: Niranjhana N <niranjhana.n@intel.com>
- replaced test points with ztest APIs wherever possible
- replaced CONFIG_MAIN_STACK_SIZE with CONFIG_ZTEST_STACKSIZE
in the config file
- split the main file into two files:
- main.c has ztest entry and runs separate functions for ztest
- hmac.c has the original routines
JIRA: ZEP-2449
Signed-off-by: Niranjhana N <niranjhana.n@intel.com>
- replaced test points with ztest APIs wherever possible
- replaced CONFIG_MAIN_STACK_SIZE with CONFIG_ZTEST_STACKSIZE
in the config file
- split the main file into two files:
- main.c has ztest entry and runs separate functions for ztest
- ecc_dsa.c has the original routines
JIRA: ZEP-2449
Signed-off-by: Niranjhana N <niranjhana.n@intel.com>
- replaced test points with ztest APIs wherever possible
- replaced CONFIG_MAIN_STACK_SIZE with CONFIG_ZTEST_STACKSIZE
in the config file
- split the main file into two files:
- main.c has ztest entry and runs separate functions for ztest
- ecc_dh.c has the original routines
JIRA: ZEP-2449
Signed-off-by: Niranjhana N <niranjhana.n@intel.com>
- replaced test points with ztest APIs wherever possible
- replaced CONFIG_MAIN_STACK_SIZE with CONFIG_ZTEST_STACKSIZE
in the config file
- split the main file into two files:
- main.c has ztest entry and runs separate functions for ztest
- ctr_prng.c has the original routines
JIRA: ZEP-2449
Signed-off-by: Niranjhana N <niranjhana.n@intel.com>
- replaced test points with ztest APIs wherever possible
- split the main file into two files:
- main.c has ztest entry and runs separate functions for ztest
- ctr_mode.c has the original routines
JIRA: ZEP-2449
Signed-off-by: Niranjhana N <niranjhana.n@intel.com>
- replaced test points with ztest APIs wherever possible
- split the main file into two files:
- main.c has ztest entry and runs separate functions for ztest
- cmac_mode.c has the original routines
JIRA: ZEP-2449
Signed-off-by: Niranjhana N <niranjhana.n@intel.com>
- replaced test points with ztest APIs wherever possible
- split the main file into two files:
- main.c has ztest entry and runs separate functions for ztest
- ccm_mode.c has the original routines
JIRA: ZEP-2449
Signed-off-by: Niranjhana N <niranjhana.n@intel.com>
- replaced test points with ztest APIs wherever possible
- split the main file into two files:
- main.c has ztest entry and runs separate functions for ztest
- cbc_mode.c has the original routines
JIRA: ZEP-2449
Signed-off-by: Niranjhana N <niranjhana.n@intel.com>
- replaced test points with ztest APIs wherever possible
- replaced CONFIG_MAIN_STACK_SIZE with CONFIG_ZTEST_STACKSIZE
in the config file
- split the main file into two files:
- main.c has ztest entry and runs separate functions for ztest
- aes.c has the original routines
JIRA: ZEP-2449
Signed-off-by: Niranjhana N <niranjhana.n@intel.com>