Commit graph

19193 commits

Author SHA1 Message Date
Andrew Boie
9a74a081e5 _thread_entry: don't use _current
Thread may be in user mode when it returns and can't look at
_current. Use k_current_get() which will be a system call.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-12 12:32:00 -07:00
Anas Nashif
1caa6f27ec doc: update release notes with ARC details
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-12 13:46:30 -04:00
Robert Chou
c0a946ac3c net: lwm2m: propogate errors to the caller when using TLV writer
Errors has been ignored when using TLV writer to create/write object
instance/resources. Modify to propagate the error back to the caller.

To reproduce the issue, try to create IPSO light control object
instances twice. Since the default instance count is 1, the second one
should be rejected and responded w/ error. But the current
implementation will respond w/ 2.04.

Signed-off-by: Robert Chou <robert.ch.chou@acer.com>
2017-09-12 20:40:29 +03:00
Robert Chou
70ee7e31af net: lwm2m: return 4.04 (not found) when obj/obj_inst/res not exist
We did not check the requested object/object instance/resource exists or
not before we adding an observer. Correct it by checking the existence
first.

Signed-off-by: Robert Chou <robert.ch.chou@acer.com>
2017-09-12 20:40:29 +03:00
Robert Chou
627d199db3 net: lwm2m: clean up observer when object/object instance is removed
We should stop sending out notification to the peer when the
object/object instances requested to be observed is removed

Signed-off-by: Robert Chou <robert.ch.chou@acer.com>
2017-09-12 20:40:29 +03:00
Robert Chou
b6a0cdfd64 net: lwm2m: fix obj/obj_inst/observer sys_slist_t corrupted when remove
We were using sys_slist_remove() to remove object, object instance and
observer w/o passing the previous sys_snode_t to it (NULL).
This will instruct the function to treat the node as the list head and
result in unexpected behavior after the removal.

Correct it by using sys_slist_find_and_remove() or passing the previous
node to the function.

Signed-off-by: Robert Chou <robert.ch.chou@acer.com>
2017-09-12 20:40:29 +03:00
Robert Chou
dc0b838641 net: lwm2m: reset obj_inst/res_inst data structure when delete
When a request demands to create a new object instance, it will search
whether the request object instance exists or not. However, current
implementation does not reset the lwm2m_engine_obj_inst at the time it
is deleted. It only removes the object instance from the sys list.

Correct the behavior by resetting both object instance and resource
instances at the time it's deleted. Also, consolidate function
lwm2m_delete_handler() and lwm2m_delete_obj_inst().

To reproduce the issue, try to create light control object instance
(/3301), delete the created instance and create it again. You shall find
following error message dumped.
> [ipso_light_control] [ERR] light_control_create: Can not create
  instance - already existing: 0
> [lib/lwm2m_engine] [ERR] lwm2m_create_obj_inst: unable to create obj -
  3311 instance 0

Signed-off-by: Robert Chou <robert.ch.chou@acer.com>
2017-09-12 20:40:29 +03:00
Michael Scott
f3454769db samples: lwm2m: remove unused NET_L2_BT settings
Currently, we don't have a .conf which enabled BT.  This will be
re-enabled at some future date after migrating to the full net_app
APIs by setting CONFIG_NET_APP_BT_NODE=y.

Signed-off-by: Michael Scott <michael.scott@linaro.org>
2017-09-12 20:37:48 +03:00
Michael Scott
e54d750e37 samples: lwm2m: remove extra .conf settings
NET_APP and NET_APP_CLIENT are now set automatically.

Signed-off-by: Michael Scott <michael.scott@linaro.org>
2017-09-12 20:37:48 +03:00
Michael Scott
cff468217b net: lwm2m: select NET_APP_CLIENT automatically
No need for samples to make sure they have this configured in their
.conf files.

Signed-off-by: Michael Scott <michael.scott@linaro.org>
2017-09-12 20:37:48 +03:00
Anas Nashif
2397ce8975 doc: update release notes index with 1.9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-12 13:19:51 -04:00
Anas Nashif
1e8afbfe5a cleanup: remove lots of references to unified kernel
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-12 12:37:11 -04:00
Andrew Boie
d81f9c1e4d x86: revise _x86_mmu_buffer_validate
- There's no point in building up "validity" (declared volatile for some
  strange reason), just exit with false return value if any of the page
  directory or page table checks don't come out as expected

- The function was returning the opposite value as its documentation
  (0 on success, -EPERM on failure). Documentation updated.

- This function will only be used to verify buffers from user-space.
  There's no need for a flags parameter, the only option that needs to
  be passed in is whether the buffer has write permissions or not.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-12 08:40:41 -07:00
Andrew Boie
f5adf534e8 kernel: declare interface for checking buffers
This will be used by system call handlers to ensure that any memory
regions passed in from userspace are actually accessible by the calling
thread.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-12 08:40:41 -07:00
Andrew Boie
3bb677d6eb x86: don't set FS/GS segment selectors
We shouldn't be imposing any policy here, we do not yet use these in
Zephyr. Zero these at boot and otherwise leave alone.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-12 08:40:08 -07:00
Erwan Gouriou
1ded7d7b33 arch: arm: stm32: factorize stm32f417xy socs defconfig files
stm32f417xe and stm32f417xg have been introduced with 2
different defconfig files. Since same code is declared
in both files, mutualize declarations in a single file.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-09-12 11:24:56 -04:00
Erwan Gouriou
6ce337a7d7 dts: stm32f4-pinctrl remove wrong pinmux configurations
Remove usart2_pins_b as this configuration is not possible
(PA15 could not be mapped on USART2).
Besides usart2_pins_c as this configuration is not used yet,
remove to reserve "usart2_pins_c" for future use

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-09-12 11:24:56 -04:00
Erwan Gouriou
8468db659b stm32f3_disco: Switch USART1(Console) to PC4/PC5
Default configuration for USART1 (Console output) on board
stm32f3_disco was set on PA9/PA10, which matches Rev-A/B
configuration. Though, on more recent configuration of the
board (Rev-C onward). USART1 is mapped to PC4/PC5.
This configuration has the benefit to support VCP, hence it
is chosen to be set by default.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-09-12 11:24:56 -04:00
Erwan Gouriou
b6163ecad1 disco_l475_iot1: Enable bt chip
Enable BlueNRJ chip on disco_l475_iot1 board.
Communication with SoC, is done over SPI(3). Hence this
commit enables SPI3 on SoC and configure BT_SPI IRQ,
RESET and CS pins.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-09-12 11:24:56 -04:00
Erwan Gouriou
30f5df2f91 pinmux: stm32: add SPI3 pin definitions for stm32l4
Add SPI3 pin definitions for PC10, PC11, PC12.
This is required to use SPI3 on disco_l475_iot1 board

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-09-12 11:24:56 -04:00
Massimiliano Cialdi
c4fa49422d boards: arm: Add support for STM32F412G-DISCO
Add board configuration, dts and pinmux based on both
stm32f469i_disco board and nucleo_f412zg board

Signed-off-by: Massimiliano Cialdi <massimiliano.cialdi@powersoft.it>
2017-09-12 11:24:56 -04:00
Kumar Gala
31745c69db pinmux: Move stm32 board pinmux files into board dirs
Move all STM32 based board pinmux files into the board dirs so we are
consistent across all the STM32 platforms/boards.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-09-12 11:24:56 -04:00
Maureen Helm
cee9e06cfd dts: Fix uart irq info for frdm_k64f and hexiwear_k64
Fixes uart irq info in the device tree fixup files for frdm_k64f and
hexiwear_k64. They were incorrect in uart instance 5.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-09-12 11:24:56 -04:00
David Brown
7e6cc184d9 arm: Add partition table to hexiwear
Use the same partition table as is used on the frdm_k64 board.

Signed-off-by: David Brown <david.brown@linaro.org>
2017-09-12 11:24:56 -04:00
Manivannan Sadhasivam
62854e0d04 dts: arm: 96b_carbon: add I2C_2 interface
This patch enables I2C_2 support for 96b_carbon. Without
this patch, trying to build I2C_2 will result in build
error.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2017-09-12 11:24:56 -04:00
Yannis Damigos
0f408a003c arch: soc: st_stm32: Remove unused enumeration from F4, F3 SoCs
The enumerations stm32{f3,f4}x_pin_config_mode aren't used any
more. This patch removes them.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-09-12 11:24:56 -04:00
Timo Teräs
5829965278 serial/uart_ns16500: poll THRE to determine when data can be written
TEMT is Transmitter Empty bit which is set only when the full FIFO
is empty. It makes sense to poll for THRE (Transmitter Holding
Register Empty) which is set when UART can buffer new character
for transmission (there is room in FIFO). This allows using the
FIFO in full.

Signed-off-by: Timo Teräs <timo.teras@iki.fi>
2017-09-12 11:24:56 -04:00
Timo Teräs
047a229985 serial/uart_ns16550: keep LCR settings when programming DLAB
The LCR register specifies the format of the asynchronous data
communication exchange. Keep the data/stop bit and parity settings
intact during baud rate change.

Signed-off-by: Timo Teräs <timo.teras@iki.fi>
2017-09-12 11:24:56 -04:00
Timo Teräs
5d9a6aa9df arm: corex_m: add byte/half-word sized memory accessors
The byte ones are required for ns16550 uart driver which is
present on some arm socs. Add half-word ones for completeness.

Signed-off-by: Timo Teräs <timo.teras@iki.fi>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-09-12 11:24:56 -04:00
Jukka Rissanen
0b8434f08f net: ethernet: Do not unref pending ARP request
If the packet is put pending because ARP request need to be
done, then do not unref original packet.

Fixes #1416

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-09-12 17:40:36 +03:00
Jukka Rissanen
13a6acecc3 net: shell: Add ARP cache printing
Add a command "net arp" to net-shell. This new command will
print ARP cache contents if IPv4 and Ethernet are enabled.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-09-12 17:39:29 +03:00
Jukka Rissanen
1aa1528fe2 net: app: Init static IPv6 address properly
The commit 725be227 ("net/mgmt/event: Commands must be > 0 so
masking them works") prevented IPv6 address setting when an
application was initialized. The check in subsys/net/lib/app/init.c
needs to be adjusted because of that change.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-09-12 16:58:24 +03:00
Jukka Rissanen
e71a31e22f net: Wrong networking defines used in the code
There were bunch of config options in tests/net, net-shell and
wpan_serial sample, and those options had wrong name so they
were ignored by the code.

Fixes #1428

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-09-12 08:37:53 -04:00
David B. Kinder
f64151a7f1 doc: improve API docs with sections
Doxygen-generated API documentation had the ability to
group API information into sections based on the class
of items: Defines, Typedefs, Enums, Functions and then
alphabetized with these groups.  By removing the
Breathe directive :content-only: we can get these class
groupings back (instead of having items just sorted
alphabetically across all classes), and also allow @name
groups to be defined for creating and displaying additional
groups (as requested by a developer).

Depends on CSS changes in
https://github.com/zephyrproject-rtos/docs-theme/pull/14

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-09-12 07:48:37 -04:00
David B. Kinder
d74f97d069 doc: improve spi.h doxygen comments layout
Doxygen comments for documenting structs have (known) issues,
and the Breathe addon for Sphinx used to create our API docs
has a known issue with forcing line breaks with @n or <br/>

This patch tweaks the comments to use a method used in i2s.h
to use @param comments for the members of a struct, and using
4 leading spaces (as done in i2s.h as well) to create a pre
block for the bit-field layout comments.

Fixes: #1415

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-09-11 19:37:51 -04:00
Anas Nashif
6fa67585e2 cleanup: remove obsolete nano_work.h
Empty file that is a left-over from the migration to unified kernel.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 19:24:12 -04:00
Anas Nashif
d4a0e88e37 boards: qemu_xtensa: add CONFIG_SIMULATOR_XTENS=y to defconfig
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 16:29:55 -04:00
Anas Nashif
0a38ce0395 boards: xt-sim: make board depend on SIMULATOR_XTENSA
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 16:29:55 -04:00
Anas Nashif
4857d03482 boards: esp32: make board depend on SOC
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 16:29:55 -04:00
Andrew Boie
17876c857a qemu_x86: enable HW stack protection properly
CONFIG_X86_STACK_PROTECTION is now a hidden option enabled by
CONFIG_HW_STACK_PROTECTION.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-11 12:26:54 -07:00
Andrew Boie
1e06ffc815 zephyr: use k_thread_entry_t everywhere
In various places, a private _thread_entry_t, or the full prototype
were being used. Be consistent and use the same typedef everywhere.

Signen-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-11 11:18:22 -07:00
Anas Nashif
d414e7c7ee kconfig: move fatal error handler to arch options
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 09:42:35 -07:00
Anas Nashif
8379b7b433 kconfig: move interrupt options into arch menu
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 09:42:35 -07:00
Anas Nashif
46f66f4295 kconfig: generalised stack protection options
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 09:42:35 -07:00
Anas Nashif
939889a202 kconfig: remove unused config DEBUG_IRQS
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 09:42:35 -07:00
Anas Nashif
261f898e8f kconfig: remove exta menu for x86 core options
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 09:42:35 -07:00
Anas Nashif
7c71608fc1 cleanup: remove commented #include
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 12:41:07 -04:00
Anas Nashif
b1991eba94 cleanup: remove the whitespaces before the # character
Indenting preprocessor directives reduces the code readability, because
it make preprocessor directives harder to spot.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 12:41:07 -04:00
Anas Nashif
8920cf127a cleanup: Move #include directives
Move all #include directives at the very top of the file, before any
code.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 12:41:07 -04:00
Andrew Boie
f2c83acafc kernel: remove k_thread_spawn()
This API was deprecated in 1.8, we can remove for 1.10.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-11 12:30:51 -04:00