Create a net sample to setup a multi-node RPL mesh network using QMEU.
To enable this, it was necessary implement a hw filter on IEEE 802.15.4
UART Pipe driver and create a QEMU pipe management on cmake.
This sample use a tool developed on zephyr net-tools repository called
virtual-hub.
Signed-off-by: Pedro Martucci <pedropaulomartucci@gmail.com>
Instead of having K_FOREVER when allocating a packet in IPv4 ARP
and IPv6 ND, set a timeout so that we do not have a case where we
would wait net_buf forever.
Fixes#5484
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
If IPSP channel is disconnected call net_if_carrier_down instead of
net_if_down since the later may still attempt to send packets while the
former just discard them immediatelly.
Fixes#5317
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
This introduces net_if_carrier_down so the L2 driver can inform when it
has lost connectivity so all packets shall be flushed and the interface
should be put down.
Fixes#5317
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
The Host header is even mandatory in HTTP 1.1, and indeed without
it, many virtual hosting setups don't work (which are many), so to
be faithful to what README says: "You can edit the source code to
issue a request to any other site on the Internet", let's
complicate the sample by including it.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Avoid using an uninitialized pointer when adding headers to the HTTP
context.
Coverity-CID: 178792
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Get the reporting right and consistent with other tests. Use ztest
possible where possible and remove too many lines and confusing output.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move to a more cosnistent test naming using test_ to improve reporting
and parsing. Expand string tests and run them as separate ztest tests.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
VL53L0X_PerformSingleRangingMeasurement() returns a signed 8-bit
integer, not an unsigned 8-bit integer, making the "< 0" comparison
worthless.
Coverity-CID: 182593
Coverity-CID: 182597
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Instructions for generating documents locally needed some updates
because of build environment changes and use of newer tool versions.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
When testing whether the CTR mode decrypted the payload properly, a
comparison of `decrypt.out_buf` with the known plain text `plaintext`
is performed, but the buffer comparison that is printed uses
`plaintext` and `encrypt.out_buf` instead.
Coverity-CID: 181847
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This sample downloads a more or less big file (~6MB as preconfigured)
over HTTP and checks its hash for integrity. It also repeat such a
download indefinitely, counting total number of bytes transferred.
This is thus a kind of traffic load testing sample. (Ported to C
from MicroPython original).
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
The nrf52840 has 2 gpio ports, and 48 GPIO. We need to
adapt the range to allow the gpio on port 1 to be used
by this driver
Signed-off-by: Giuliano Franchetto <giuliano.franchetto@intellinium.com>
The APA102 is a RGB LED with integrated controller. LEDs can be
daisy-chained and use SPI for communication. The SPI port is
configured via Device Tree.
Tested on the Adafruit Trinket M0.
Signed-off-by: Michael Hope <mlhx@google.com>
The interrupt line number is an unsigned integer; it makes no sense to
compare if it is greater than or equal to 0.
Coverity-CID: 182602
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
The xtensa headers use this for simplicity when SMP is not enabled.
It should still build on older platforms that don't include the
asm2-style CPU pointer scheme.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Non-asm2 devices without a generated SoC interrupt file will see a
compile failure due to the missing header.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The mbedtls test is hitting a compiler bug where two subtests will
soft fail on qemu_xtensa when assertions are enabled. This is despite
the fact that:
+ The failure is entirely internal to the mbedtls suite.
+ The mbedtls code does not use zephyr asserts
+ The mbedtls code does not call into zephyr code that might assert.
+ The behavior persists even when an irq_lock() is held across the
entire test, ruling out any asserts in interrupt/exception context.
+ And EVEN WHEN the mbedtls library blobs are bytewise identical
between assert and non-assert cases.
The bug seems to be a layout thing where the mbedtls code behavior
differently based on code address and/or link-time optimizations
(xtensa has a few).
Unfortunately sanitycheck enables assertions by setting CFLAGS
directly and not via kconfig, so we can't fix this by turning the
feature off in an app right now. This patch adds a simple "override"
flag that can be set by apps like this that hit bugs.
Again, note that zephyr assertions are not used nor needed by this one
test.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This test had to special case ARM, where error handlers are not
NORETURN functions. The xtensa/asm2 layer has the same behavior
(albeit for a different reason). Add it to the list, and clean up the
explanation a bit.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Traditionally k_thread_abort() of the current thread has done a
synchronous _Swap() to the new context. Doing this from an ISR has
never worked portably (some architectures can do it, some can't) for
this reason.
But on Xtensa/asm2, exception handlers now run in interrupt context
and it's a very reasonable requirement for them to abort the excepting
thread.
So simply don't swap, but do the rest of the bookeeping, returning to
the calling context. As a side effect it's now possible to terminate
threads from interrupts, even if they have been interrupted.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
It's not impossible that something we just handled (e.g. a machine
exception) called k_thread_abort() on our current thread. Don't try
to return into it, check the DEAD state.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
In asm2, the machine exception handler runs in interrupt context (this
is good: it allows us to defer the test against exception type until
after we have done the stack switch and dispatched any true
interrupts), but that means that the user error handler needs to be
invoked and then return through the interrupt exit code.
So the __attribute__(__noreturn__) that it was being decorated with
was incorrect. And actually fatal, as with gcc xtensa will crash
trying to return from a noreturn call.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Simple SMP test to validate the two threads can be simultaneously
scheduled. Arranges things such that both threads are at different
priorities and never yield the CPU, so on a uniprocessor build they
cannot be fairly scheduled. Checks that both are nonetheless making
progress.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
In SMP, the system timer is used for timeslicing on auxiliary CPUs,
but the base system timekeeping via _nano_sys_clock_tick_announce() is
still done on CPU0 only (because the framework isn't prepared for
asynchronous notification yet). Skip processing on CPU1+.
Also, due to a hardware interaction* that is difficult to work around,
timer initialization on the auxiliary CPUs is done at the very end of
the CPU bringup, just before the swap into the scheduler. A
smp_timer_init() API has been added for this purpose.
* On ESP-32, enabling the timer seems to result in a near-synchronous
interrupt being delivered despite my best attempts to keep it
masked, then blowing things up because the CPU record isn't set up
to handle it yet.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Now that all the pieces are in place, enable SMP for real:
Initialize the CPU records, launch the CPUs at the end of kernel
initialization, have them wait for a flag to release them into the
scheduler, then enter into the runnable threads via _Swap().
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
A pure timer-based idle won't work well in SMP. Without an IPI to
wake up idle CPUs out of the scheduler they will sleep far too long
and the main CPU will do all the scheduling of wake-up-and-sleep
processes. Instead just have the auxilary CPUs do a traditional
busy-wait scheduler in their idle loop.
We will need to revisit an architecture that allows both
wait-for-timer-interrupt idle and SMP.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
