Commit graph

316 commits

Author SHA1 Message Date
JuanX Solano Menacho 866d9c9c2d gpio_qmsi_ss: Use qm_ss_gpio_save/restore_context APIs
This commit updates the gpio_qmsi_ss driver by adding save/restore
context functionality for power management, using the corresponsing
QMSI APIs.

Jira: ZEP-665

Change-Id: I5d8b6050f5b099678b7e6d9144907ea2ce2dda4b
Signed-off-by: JuanX Solano Menacho <juanx.solano.menacho@intel.com>
2016-11-11 23:33:19 +00:00
Vincenzo Frascino e36c04afe1 gpio: Add ARM CMSDK (Cortex-M System Design Kit) AHB GPIO driver
The driver is currently used only by the ARM Beetle platform.

Jira: ZEP-1245
Change-Id: I6611edd7486a3c6d82d66a9a96c5d4860dad1539
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-11-11 20:39:52 +00:00
Baohong Liu 180887a305 drivers: gpio: update to unified kernel
Use new semaphore APIs from unified kernel.

Change-Id: Ic638f28555cb9c8a23b365e39368062c37d7716f
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
2016-11-10 01:38:53 +00:00
Andrew Boie 0b474eef9c kernel: deprecate old init levels
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.

New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.

Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.

Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-09 17:59:44 +00:00
Tomasz Bursztyka 3fb51f6f46 drivers: gpio: Remove mmio driver
It's unused anywhere and unlikely to be in the future.

Change-Id: I57926e91da7d31ef6ddda4f86e6dac103dbfa176
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-11-07 07:20:04 -05:00
Marcus Shawcroft 68cf17171d drivers/gpio_stm32: Make driver_api structure const.
Change-Id: Ifdc5e6aabde3f06305f9d8ca2063b09931c126c4
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-11-04 00:51:16 +00:00
JuanX Solano Menacho 356dcdf383 gpio_qmsi: Use qm_gpio_save/restore_context APIs
This commit updates the gpio_qmsi driver by removing the temporary
Zephyr save/restore context implementation and using the new QMSI APIs.

Jira: ZEP-999
Change-Id: Ic7b80a8f86baa7a6be11c93bbdebb18a102b0221
Signed-off-by: JuanX Solano Menacho <juanx.solano.menacho@intel.com>
2016-11-03 23:52:09 +00:00
Julien Delayen bd6285a3f1 gpio_qmsi: Add get_pending_int API
For AON peripherals on Quark SE C1000, an API is needed
to retrieve the interrupt status after wake up.
This enables the application to know the wake source before
enabling again the interrupts.
Add this API to the gpio as this is a wake event
on Quark SE C1000.

Jira: ZEP-1188

Change-Id: Icc4aa6617bf18402b7e5dc3aab779ec2964e1c5b
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
2016-11-03 21:30:11 +00:00
Iván Briano f028973f43 gpio qmsi: Enable SoC level GPIO to work on ARC too
The GPIO and AON GPIO ports are available to both the x86 and ARC
cores, but the driver always assumed only the x86 at the time of
configuring interrupts.

Use the available macros to set the correct values independently of
which core it's being built for.

Jira: ZEP-1030
Change-Id: I310afcc48780fbe1cac9dc3368a6de11bd797fda
Signed-off-by: Iván Briano <ivan.briano@intel.com>
2016-11-02 22:24:56 +00:00
Iván Briano 34cf9773b1 gpio qmsi: Differentiate between the SoC GPIO and SS GPIO
The SoC level peripherals are accesible by both cores, while the SS
ones are only available to the sensor subsystem. Since the ARC core can
make use of both drivers at the same time, we need to be able to
differentiate their configuration values somehow.

Also disable the SoC GPIO for the ARC by default, as it still needs
more changes to be usable.

Jira: ZEP-1030
Change-Id: Ic5415c404ecd32a3e560467b6f5eaa873a515d72
Signed-off-by: Iván Briano <ivan.briano@intel.com>
2016-11-02 22:24:52 +00:00
Iván Briano 3139a10017 gpio qmsi: Remove unnecesary callback wrappers
The callback from the QMSI driver now can take a data pointer to pass
to the given function, so use that to pass the device to our callback
instead of defining one function for each supported port.

Change-Id: I82d863314e0443b7c4a12d4a9ad763b9634ca8e2
Signed-off-by: Iván Briano <ivan.briano@intel.com>
2016-11-02 22:24:26 +00:00
Iván Briano 0792e417e1 gpio qmsi: Remove stale comments
Change-Id: Ic69343019a619263c3d3b4ba378476504a33bec2
Signed-off-by: Iván Briano <ivan.briano@intel.com>
2016-11-02 22:24:26 +00:00
Iván Briano 0094ab228d ext qmsi: Update to QMSI 1.3 release
Update the QMSI drop we maintain in Zephyr, and fix the build where
needed:

- QM_SCSS_INT is renamed to QM_INTERRUPT_ROUTER;
- every member of QM_INTERRUPT_ROUTER was renamed as well;
- QM_IRQ_* renamed too, mostly added _INT at the end;
- some isr functions were renamed to keep their names consistent;
- build for x86 needs to define QM_LAKEMONT, as QM_SENSOR was for ARC.

Change-Id: I459029ca0d373f6c831e2bb8ebd52402a55994d1
Signed-off-by: Iván Briano <ivan.briano@intel.com>
2016-10-31 13:26:06 +00:00
Ricardo Salveti cf59106433 gpio: stm32: add support for STM32F4
Implements MCU-specific GPIO input interrupt integration.  Added
definition of System configuration controller as well as its needed by
the GPIO code.

The SYSCFG controller is used for system-specific configuration such as:
 - remap the type of memory accessible at address 0x00000000
 - manage the external interrupt line connection to GPIOs
 - configure the I/O compensation cell

Change-Id: Id2ebfbd1b21e77be76406d1cd6cd5d4989e9e2fa
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-10-28 18:58:03 +00:00
Marcus Shawcroft 914432853a driver/gpio/qmsi: Limit name space, add static.
Change-Id: I77133e665cdc4995db83302389ecf64d79b08f35
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-28 10:54:18 +00:00
Marcus Shawcroft 925a46fd6d gpio/sch: Limit name space, add static.
Change-Id: I16563e2162b2cc9de649663d04a813ab765c3253
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-28 10:54:17 +00:00
Marcus Shawcroft 56319c9567 gpio/sch: Make driver_api structure const.
Change-Id: I4866aa02fe6fb8d8a6260bd01fda60c9962e89f8
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-28 10:54:17 +00:00
Marcus Shawcroft f35d0e6ead gpio/pcal9535a: Limit name space, add static.
Change-Id: I474bad1a44efda66cd2e324483742a257fac77e2
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-28 10:54:16 +00:00
Marcus Shawcroft 15dbaa8e90 gpio/k64: Fix Kconfig help text formatting.
Change-Id: I8c1e155a152343eaf680be5f8385548058a95c47
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-28 07:02:20 +01:00
Marcus Shawcroft 7df2727545 gpio/k64: Fix type in GPIO_K64_C_DEV_NAME text.
Change-Id: Ie65c747467890d9f25dc9795c23eaf39175d14ae
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-28 07:02:12 +01:00
Ricardo Salveti a9f2061dfb gpio: stm32: introduce alternative function config
STM32F4 requires the alternative function config to be set, so just
initialize that as part of the gpio configure call.

Change-Id: I33a4a8efec59c5ebe7dc3f3580f0dd2bf7ded7f4
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
2016-10-27 14:48:43 +00:00
Marcus Shawcroft 27f4947812 driver/gpio/dw: Limit name space, add static.
Change-Id: I3b1f5497896f683072c2bc473d348cd19aca3c5d
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-26 20:51:06 +00:00
Marcus Shawcroft c8d6ff0474 driver/gpio/sam3: Limit name space, add static.
Change-Id: Ie34094e3ed8041b2b2c44e122f71d5f69a7ce0ad
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-26 20:51:06 +00:00
Marcus Shawcroft 926c553acb drivers/gpio_qmsi_ss: Make driver_api structure const.
Change-Id: Icfd9675c4bd9572d31b62d12e25be92f5c3104d8
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-25 18:45:26 +00:00
Marcus Shawcroft 1b54d26a33 drivers/gpio_qmsi: Make driver_api structure const.
Change-Id: Id123c49a387818f795b1c967463a7d14cc880efd
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-25 18:45:25 +00:00
Marcus Shawcroft 3385b7a074 drivers/gpio_pcal9535a: Make driver_api structure const.
Change-Id: Ifed95143422537ad82bfaa907874b1e33e782fb5
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-25 18:45:25 +00:00
Marcus Shawcroft ce1406ffbb drivers/gpio_nrf5: Make driver_api structure const.
Change-Id: Ib7d3bbf02ff32972d0e86f0d24649281480603ae
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-25 18:45:25 +00:00
Marcus Shawcroft e0fed5f219 drivers/gpio_k64: Make driver_api structure const.
Change-Id: I39fd54c0e5daaa40a28a61dba51e22c649608c7b
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-25 18:45:24 +00:00
Marcus Shawcroft 19129d6e96 drivers/gpio_dw: Make driver_api structure const.
Change-Id: I17199a0408f4a6bb8d7d647cf4ed54c6b8a91245
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-25 18:45:24 +00:00
Marcus Shawcroft b592cdf685 drivers/gpio_atmel_sam3: Make driver_api structure const.
Change-Id: I7294efcc0251bfe31add9233f07a2584f2edb49a
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-25 18:45:23 +00:00
Ricardo Salveti f2fb64b075 drivers/gpio/nrf5: change default IRQ_PRI
Make default value compatible with both nRF51 and nRF52.

Change-Id: I65dafbdf8518103becdd7388e9c0195ef1c4460d
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
2016-10-22 01:25:55 +00:00
Marcus Shawcroft b33e59dc02 gpio: stm32: Make driver config_info structure const.
Change-Id: I05c844794c29225a6dd6462d512d470a687ac3a5
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-20 16:48:49 +00:00
Marcus Shawcroft c351093177 gpio: sch: Make driver config_info structure const.
Change-Id: I04598162c92991f8e98343746802a82c98f8eb83
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-20 16:48:49 +00:00
Marcus Shawcroft a40c211ed3 gpio: qmsi_ss: Make driver config_info structure const.
Change-Id: Ibfcb3e7f78f4ac777a72647446cebec1d26a116f
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-20 16:48:48 +00:00
Marcus Shawcroft 213988873b gpio: qmsi: Make driver config_info structure const.
Change-Id: Ia2d840685db19493a0d2eee874b81dd968ee93b3
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-20 16:48:48 +00:00
Marcus Shawcroft cbbc1c4da2 gpio: pcal9535a: Make driver config_info structure const.
Change-Id: Id484d8d3fd9212b82f6d623201506268759ccfc8
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-20 16:48:48 +00:00
Marcus Shawcroft 4c727dbc10 gpio: nrf5: Make driver config_info structure const.
Change-Id: Ie831403c15f344f6bf83c7b00ca0c73185053f4d
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-20 16:48:47 +00:00
Marcus Shawcroft 589a77f57a gpio: dw: Make driver config_info structure const.
Change-Id: Ib80fa277bba38c05e00817e6e6071c0b4db38a66
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-20 16:48:47 +00:00
Marcus Shawcroft 1653d90cbf gpio: sam3: Make driver config_info structure const.
Change-Id: I366a8096e61f2c9f6481fdbb83ba4257c94bddae
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-20 16:48:46 +00:00
Marcus Shawcroft 24fe3a0b3d gpio: k64: Make driver config_info structure const.
Change-Id: Ib471bbe2de7de232331bba97570655b262bdac81
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-20 16:48:44 +00:00
Marcus Shawcroft 8564334254 gpio/dw: Move RW objects in config_info to driver_data
PCI enumeration modifies pci_dev and base_addr at driver
initialization therefore these objects move from config_info to
driver_data in preparation for config_info becoming const.

We drop code that attempts to update irq_num based on PCI enumeration
because the interrupt found by PCI enumeration must always be the same
as the statically configured IRQ number.

Change-Id: Ibfefa851d2836d524b8151ed0108ecf9de2cd3a3
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-19 12:10:58 +00:00
Ricardo Salveti 17a62dd268 exti: stm32: fix driver data handling
Since dd5e90ec the device_get_binding call returns NULL unless the
driver_api is set by the driver. Since the exti driver only uses an
internal struct to store the callbacks, remove the need for the device
binding call from other drivers (e.g. gpio).

Change-Id: If0b733c27754108118d87ef02640311f0535ab57
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
2016-10-19 11:56:00 +00:00
Maureen Helm 342e09c463 pinmux: Rename frdm_k64f pinmux driver to k64
The k64 pinmux driver can be used for any k64 board, not just frdm_k64f,
therefore renaming the driver accordingly.

Change-Id: I45e96d4a5ff6aa859d0f57fe098e44a8ae5283d1
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2016-10-18 21:42:31 +00:00
Marcus Shawcroft 2d1678c632 gpio/sam3: Move RW data from driver config to runtime.
The callback list within the driver config is updated dynamically
hence the list itself cannot be const.  Create a runtime context
driver data structure and relocate the callback list to the new
structure.

Change-Id: Ied20846e6a78e43967239afa7797456a9abd8548
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-15 12:29:19 +00:00
Marcus Shawcroft 4e81f369c7 gpio/qmsi_ss: Make config_info pointers const.
Preparation for const driver configuration data.

Change-Id: I31abd3d5606b2b750da86d00e938db3988696c7f
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-07 20:33:56 +00:00
Anas Nashif 84c9db39e7 gpio: reduce Kconfigs and use consistent name for GPIOs
Using AON for GPIO kconfigs is very specifc to quark se, there
is no need to make this special for this platform. Use the
existing scheme instead.

Change-Id: I946431490380dc0f537d6056277a94c9c9c80fed
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-10-07 16:15:07 +00:00
Anas Nashif 706f1b8bd8 drivers: gpio: i2c: make logging depend on SYS_LOG
Change-Id: Ia6af28598cf979f20e04cd2c74f3e75f4ae6630b
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-10-07 14:15:24 +00:00
Marcus Shawcroft ca26e7bb13 gpio/k64: Make config_info pointers const.
Preparation for const driver configuration data.

Change-Id: I6562816828734da9c60fdfcd2ce510f55ed70416
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-07 08:05:50 -04:00
Marcus Shawcroft f686da5c11 gpio/qmsi: Make config_info pointers const.
Preparation for const driver configuration data.

Change-Id: I61733f055ac16997da93cc56fb46fb7a7436b473
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@gmail.com>
2016-10-07 08:05:50 -04:00
Marcus Shawcroft 548e848c31 gpio/stm32: Make config_info pointers const.
Preparation for const driver configuration data.

Change-Id: I29d12bd240d9ff3279e5c13852835f2a8cc6abec
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@gmail.com>
2016-10-07 12:04:42 +00:00
Marcus Shawcroft f8ec3c8d33 gpio/sch: Make config_info pointers const.
Preparation for const driver configuration data.

Change-Id: I0f156346cc7ac5e1c317c3c6d07a53abb0b453a9
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@gmail.com>
2016-10-07 12:04:39 +00:00
Ricardo Salveti d25d62a0e9 gpio/nrf5: set and clear just the specific gpio pin
Don't use the previous reg value when setting up just one specific pin,
as it can have a side effect on other gpio pins.

Change-Id: I60e69950a72446a6fa7087b13dbcecf6ae4b15e4
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
2016-10-06 15:50:10 +00:00
Ricardo Salveti bc1affbfa2 drivers/gpio: nrf5: Use generic GPIO base naming
NRF_GPIO_BASE can be used by both the nrf51 and nrf52 families, as it
gets defined by the nrf5x.h header files.

Change-Id: I8e6b265d9ce94551389ca170f105a53c88d58c68
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
2016-10-06 04:09:29 +00:00
Anas Nashif 58002193e9 drivers: gpio: reuse gpio Kconfigs for sensor subsystem
No need to create new Kconfig that do exactly the same, just
reuse those from the main QMSI driver.

Change-Id: I965055f36845ac0464e4a383b0d05c3ae35c0015
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-09-22 01:00:46 +00:00
amirkapl c490219d1e power_mgmt: Update sample and drivers according to new pm device API
Update the power sample and drivers with the new device driver power
management API using the existing logic

Jira: ZEP-954
Change-Id: Idd94232e458767635973e94e9fc673c01612c1e2
Signed-off-by: Amir Kaplan <amir.kaplan@intel.com>
2016-09-22 00:23:43 +00:00
Anas Nashif 5363d14a9e boards: rename Quark SE Devboard to Quark SE C1000
This board now has an official name and will be available soon:

http://www.intel.com/content/www/us/en/embedded/products/quark/mcu/se-soc/overview.html

Jira: ZEP-758
Change-Id: Ia16d33722308cf81471321c3063bdc75055a4d50
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-09-16 03:10:31 +00:00
Anas Nashif 5e4b62c35c boards: rename Quark SE Devboard to Quark SE C1000 (Sensor Subsystem)
Jira: ZEP-758
Change-Id: I8ee5a2f9e4a6ecbd15214e59321bf27a502ef6ee
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-09-16 03:10:30 +00:00
Tomasz Bursztyka 86d02e01b1 gpio: stm32: Fix bug introduced by removing API 1.0 support
Bug was introduced by a6cf6038e3

Change-Id: I91ceab2ca20c4d2f70a953b56d895152a471125a
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-09-14 16:16:07 +02:00
Tomasz Bursztyka a6cf6038e3 gpio: Remove obsolete API 1.0 callback mechanism
In 1.0 you could set only one callback on the whole gpio controller. It
was impossible for another sub-system to add another callback, without
overwritting an existing one.

Such API has been obsolete for a long time and no one is using it
anymore. Thus removing it entirely.

Change-Id: I6a17fd99373dc6cef1fa2ebb421e992412d5015e
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-09-14 10:51:09 +00:00
Ricardo Salveti 2bd12cfd5b gpio/Kconfig.nrf5: cosmetic fixes
Change-Id: I06eb8854cab99d8666e51867d135026a9914648a
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
2016-08-31 00:19:16 -03:00
David B. Kinder d748577706 doc: Fix terminology in Kconfig files for 'platform'
Completing the terminology change started with change 4008
by updating the Kconfig files processed to produce the
online documentation, plus header files processed by
doxygen.  References to 'platform' are change to 'board'

Change-Id: Id0ed3dc1439a0ea0a4bd19d4904889cf79bec33e
Jira: ZEP-534
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2016-08-18 21:17:29 +00:00
Amit Kucheria 975d92c038 soc: nrf5x: Add support to read and write to gpios
Change-Id: I9bded784c8e635a271b88a551b65b7268ea7e2d3
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
2016-08-02 05:50:50 +00:00
Genaro Saucedo Tejada 93b9196ab9 sys_log: replace old debug macros at pcal9535a driver
pcal9535a driver is now using new system log macros and updated the
Kconfig variable to be a level rather than a bool.

JIRA: ZEP-311

Change-Id: Ic3d6c72630e66ac116c1e8954c32254677c51566
Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
2016-07-30 10:53:21 +00:00
Genaro Saucedo Tejada d0a588bb5a sys_log: replace old debug macros at GPIO drivers
GPIO drivers are now using new system log macros also updated the
Kconfig variable to be a level rather than a bool.

JIRA: ZEP-311

Change-Id: I9a49626d816080cb8081c2dd445bae31f5dbf409
Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
2016-07-29 23:10:50 +00:00
Amit Kucheria 0017b60fbb soc: nrf5x: Disconnect GPIO input buffer when configured as output
This saves power.

Change-Id: Ie30bd3bffe89bc777d588fca56014634e03c0fe8
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
2016-07-28 20:57:43 +00:00
Dragan Cvetic 021e09251a gpio_qmsi: Add suspend/resume
In order to restore GPIO context after entering
SYS_PM_DEEP_SLEEP, the suspend and resume
functions for GPIO and GPOIO_AON are called. The
following parameters are restored:
- All non-sticky RW registers for the GPIO device.
- The MASK register (interrupt routing register).

Note: No need to sve/resume AON_GPIO registers as
they all are sticky registers.

The suspend/resume functionality is implemented in
the QMSI shim layer as a fast and temporary solution,
it will be removed and migrated to QMSI later.

Change-Id: I68e25c9da4bb8ea65f312e3686d9ef090cb775ff
Signed-off-by: Dragan Cvetic <dragan.cvetic@intel.com>
2016-07-28 14:01:30 +00:00
Kumar Gala 254836a716 gpio: nrf5: Fix Kconfig symbol issue
We don't currently have a SOC_NRF5 Kconfig symbol.  Utilize the
SOC_FAMILY_NRF5 Kconfig symbol instead.

Change-Id: I062ecab230e9e7814fad19517d28ddbbae66bccb
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-07-28 12:18:11 +00:00
Sergio Rodriguez b4d87a575a qmsi: gpio: Use locking mechanism to guard critical regions.
This will guard the driver API to be safe for concurrent
invocation from fibers or tasks.

The machanism is by default disabled. To enable it, the
following flag needs to be defined:

CONFIG_GPIO_QMSI_API_REENTRANCY

Jira: ZEP-441

Change-Id: Ia3ee738aff2f8e70e4f9a7ec76346138ff6f5031
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
2016-07-22 23:26:34 +00:00
Sergio Rodriguez 3c5af9ab5b qmsi: gpio: quark_se_ss: Use locking mechanism to guard critical regions.
This will allow the driver API to be safe for concurrent invocation
from fibers and task.

The machanism is by default disabled. To enable it, the following
flag needs to be defined:

CONFIG_GPIO_QMSI_SS_API_REENTRANCY

Jira: ZEP-411

Change-Id: I5b738532f2eefec6d5d78ab6a668790dfe9faaff
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
2016-07-22 23:25:31 +00:00
Baohong Liu 44f0481979 drivers: gpio: Fix a gpio port read bug
address was passed to QMSi port read function, even though
value is needed.

Change-Id: I6b923fdc56114936fb4a0c55c923d6b37884e07c
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
2016-06-03 16:36:25 +00:00
Carles Cufi 7923617c8f drivers: Add basic GPIO and UART support for nRF52
Add basic support for the Nordic Semiconductor's
nRF52832 (nRF52 series) GPIO and UART.

JIRA: ZEP-377
Change-Id: Ie3613956bae57829e26cb1cc20d3f740b5371f65
Signed-off-by: Glenn Ruben Bakke <glenn.ruben.bakke@nordicsemi.no>
Signed-off-by: Vinayak Kariappa Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Håkon Alseth <haakon.alseth@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2016-05-27 01:38:21 +00:00
Chuck Jordan 528b04f520 gpio: more TAB cleanup in Kconfig.dw
I notice there are some more places in this file
that can be switched to using tabs.

Change-Id: I7dac2b91f932aa6f167b7eaf93e7c8f571a22d41
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-05-25 18:11:03 -07:00
Chuck Jordan c1e4bcf996 gpio: For ARC EM Starterkit, a 4-port GPIO implementation is being added
The file gpio_dw_registers.h already had the 4-port GPIO
registers defined, yet the gpio_dw.c implementation didn't
support it properly. There are 4 ports here, not 2, and only
PORTA can support interrupts and debounce.

On the em_starterkit board, for example, PORTA
has 3 bits for buttons: A, L and R. The other 3 ports should not
be used with interrupts & debounce.

I've re-worked this file to derive the port number from the
base address given. The lower 6 bits are divided by 12 to
derive the port number. From this, the registers EXT_PORTA,
EXT_PORTB, EXT_PORTC or EXT_PORTD can be read.

Also, for those ports that don't support interrupts,
set irq_num to 0, and that code will be avoided. I've verified
that I can access GPIO now correctly on the EM Starterkit. The
em_starterkit board support will be submitted soon but I'm
staging in this change first.

Change-Id: I98dbe083e03e046b40e07b4b14a99a39a6d0f0be
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-05-26 00:10:42 +00:00
Kumar Gala 9ec2f3be80 Cleanup whitespace in Kconfig files
Convert leading whitespace into tabs in Kconfig files.  Also replaced
double spaces between config and <prompt>.

Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-05-25 13:28:07 -05:00
Baohong Liu 2ddfe381b8 gpio: quark se: Add QMSI 1.1-based GPIO shim driver
Add QMSI 1.1 based GPIO sub-driver for sensor system.

Origin: Original
Change-Id: Ida5565a5911eb55651a11a4ac0b240c624f8e1ca
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-05-23 21:31:05 +00:00
Anas Nashif f35d6e04e3 qmsi: update qmsi to 1.1 alpha
Change-Id: Ib35ebcb32954f764ef8e33f6a1c11ad9f63931bc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-05-23 21:30:04 +00:00
uLipe adaeba2fa6 gpio_k64.c: configure pins as gpio alternate function in gpio_k64_configure()
Change-Id: I653602abeb99d4baf379e6175558c19c05678567
Signed-off-by: uLipe <ryukokki.felipe@gmail.com>
2016-05-17 15:44:35 +00:00
Anas Nashif 82c969c8ae gpio: use consistent names for IRQ priority variables
Change-Id: I35ca4a13bb9dc0fd86298fa4fb17158b275dc9cc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-05-12 10:57:23 +00:00
Anas Nashif e1fea59671 gpio: GPIO_DW_BOTHEDGES_SUPPORT unused
Change-Id: I57adb395d308f01e469a2a88e0ad658169ffff72
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-05-12 10:57:22 +00:00
Chuck Jordan 7e8e620ddf gpio: For EM Starterkit, some additional GPIO register defines are needed
Comparing the Synopsys GPIO driver with the one here in Zephyr revealed
that some register symbols are missing. I am adding them now, and will
be working on getting GPIO working on ARC EM Starterkit board.

Change-Id: Ifccd1e225eb1373a31c6a5c51cf3927e42601d1a
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-05-09 21:51:54 +00:00
Andre Guedes d38e2fa35d gpio: Fix returning codes
DEV_* error codes are deprecated and should not be used anymore. This
patch replaces DEV_* occurrences by the corresponding errno.h code,
according to the error code conventions.

Change-Id: I2f38c869b4e00d22145e24375796ba6bf216b084
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-04-26 22:49:48 +00:00
Bogdan Davidoaia c4878335c8 gpio: pcal9535a: use I2C register access API
Use I2C register access API for writing/reading registers.

Change-Id: Ic35b3e7159f9827f2d202d8cd1ae8f26ee6300f1
Signed-off-by: Bogdan Davidoaia <bogdan.m.davidoaia@intel.com>
2016-04-26 11:06:50 +00:00
Anas Nashif 04e6243aa5 gpio: rename device name for AON GPIO
Change-Id: Iccd3790d3e7adbe790fe78755d297aad0ae97834
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-25 19:17:05 +00:00
Anas Nashif 5c30367a06 qmsi: gpio: add initialisation priority for driver
Change-Id: I4204d514f95c8e6e264a3cb71a2fa8eec8bab45a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-25 19:17:04 +00:00
Tomasz Bursztyka fea1c49ba2 gpio: Improve the public API to handle multi callbacks
Many sub-systems might require to set a callback on different pins.
Thus enabling it via changing the API.

It is also possible to retrieve private-data in the callback handler
using CONTAINER_OF() macro (include/misc/util.h).

Former API is still available, and is emulated through the new one.
Using both should not be a problem as it's using new API calls.
However, it's now better to start using the new API.

Change-Id: Id16594202905976cc524775d1cd3592b54a84514
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2016-04-22 22:15:12 -04:00
Anas Nashif 85b3c2c62a qmsi: gpio: use built-in qmsi driver
Change-Id: I11444bcc146dbc477bb605f6b405bee559716f2a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 20:55:36 -04:00
Anas Nashif 65c06afa58 kinetis: reorganise soc directory using soc family
Add Kinetis SoC family and rename fsl_frdm_k64f to mk64f12.
This will allow adding new SoCs of the same family and the reuse of code
among SoCs of the family and series.

Change-Id: Iea1a663aef7ce0487f147bdd36f668bebe80deb5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-18 21:24:58 +00:00
Anas Nashif 4b411b34a1 stm32: rename SOC_STM32F1X -> SOC_SERIES_STM32F1X
Use SOC_SERIES_* for naming SoCs with similar features and architectures
with the goal of code reuse. The Series in the config variable should avoid
name collisions and clearly denote the relationships within an SoC family.

Change-Id: I7a98542f96b5d5dc3acc23782c4d45f98cceb599
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-18 21:24:58 +00:00
Anas Nashif 9bf2da7ef4 stm32: rename CONFIG_SOC_STM32 -> CONFIG_SOC_FAMILY_STM32
Use CONFIG_SOC_FAMILY for the top level SoC family. A family
will have different SoCs or different SoC series with multiple
SoCs.
Adding the Family string to the config variable to avoid confusion
between actual SoCs and families and to prevent name collisions.

Change-Id: Ic99a2c1df7850dee3a45641027af82464dd6fadb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-18 21:24:58 +00:00
Daniel Leung 9e575ddbe6 gpio/stm32: convert to use DEVICE_AND_API_INIT()
Change-Id: I584c73e7418344e73af0ca7a4fc8f5d745e2ec35
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-04-15 22:06:15 +00:00
Daniel Leung 4dee91bea9 gpio/atmel_sam3: convert to use DEVICE_AND_API_INIT()
Change-Id: I09cd91737993d30c89073656b8ae95462d5f317d
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-04-15 22:06:14 +00:00
Daniel Leung 9b23654f68 gpio/k64: convert to use DEVICE_AND_API_INIT()
Change-Id: I7fa0aa8f23e6d3b6c0664e211d605a03ae7e150c
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-04-15 22:06:12 +00:00
Daniel Leung c21e93eeee gpio/dw: convert to use DEVICE_AND_API_INIT()
Note that the failure case can only be reached when PCI is enabled.
Otherwise, the if-block is always false, which reduces code size
for non-PCI platforms.

Change-Id: I1f9def66b2ce7f08fc13b8f03e675ce4cd469e6d
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-04-15 22:06:10 +00:00
Daniel Leung b8e887a112 gpio/pcal_9535a: move driver_api assignment later
This moves the assignment of driver_api to just before
the init function returns. This is in preparation to
make device_get_binding() return NULL if driver
initialization fails.

Change-Id: Ibf08cb107885da7c1037c6e7d207530e1a4708f8
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-04-12 19:30:35 +08:00
Vlad Dogaru 9e563c8769 gpio: dw: add support for D2000 board
The D2000 CRB is similar to the Arduino 101 (at least as GPIO is
concerned).  Add support for using the GPIO controller without QMSI
libraries.

Change-Id: I001da05c9a9d5771b2ec678a9d4a91c44db05289
Signed-off-by: Vlad Dogaru <vlad.dogaru@intel.com>
2016-04-08 17:55:44 +00:00
Daniel Leung 8425568a8a gpio/dw: remove kconfigs that are SoC specific
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.

Change-Id: Ib7e0b81b2df1a0225fc244fea3035416d0a4f282
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-04-02 23:11:07 +00:00
Daniel Leung 5e886b2748 gpio/sch: remove kconfigs that are SoC specific
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.

Change-Id: Ib8158f00a6c6616360ddbcf63981f1a85911c1b9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-31 23:17:23 +00:00
Tomasz Bursztyka 1de33f4d5f gpio: dw: ISR handler should acknowlegde only current interrupts
Current interrupt status tells which pins triggered this interrupt, thus
the handler should acknowledge only these and not all possible, since we
don't know if other gpio controller interrupts are being taken care of
at the same moment.

Change-Id: I7d3f1bb13bb293f7b7ce9b5a717a37bbdd4e4e42
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Vlad Lungu <vlad.lungu@windriver.com>
2016-03-30 16:19:39 +00:00
Daniel Leung 9c62a4a01f frdm_k64f: gpio: pinmux: remove base addr and irq from kconfig
The base address and IRQ line are static per SoC, so there is no need
to make them configurable in Kconfig.

Change-Id: Ib78401ff136c29642356f5bda9d6cd3e5c98bece
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-26 20:36:32 -04:00
Daniel Leung 8df10d4584 kconfig: untangle ordering and dependencies
There are two major issues with the kconfig:

() Some of the config options have incorrect dependencies inside help
   under menuconfig. For example, CONFIG_GPIO depends on BOARD_GALILEO.

() Since the SoC and board specific kconfig files are parsed first,
   the help screen would say, for example, CONFIG_SPI is defined at
   arch/arm/soc/fsl_frdm_k64f/Kconfig. This is incorrect because
   the actual config is defined in drivers/spi/Kconfig.

These cause great confusion to users of menuconfig/xconfig.

To fix these, the SoC and board defaults are now to be parsed last.

Note that the position swapping of defaults in this patch is due to
the fact the the default parsed last will be used.

And, spi_test is broken due to the fact that it requires
CONFIG_SPI_INTEL_PORT_1, but never enables it anywhere. This is
bypassed for now.

Origin: refactored and edited from existing files
Change-Id: I2a4b1ae5be4d27e68c960aa47d91ef350f2d500f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-26 20:36:32 -04:00
Ramesh Thomas 4104bbfb08 power_mgmt: Add device power management support
Added device power management hook infrastructure. Added
DEVICE_INIT_PM and SYS_INIT_PM macros that creates device
structures with the supplied device_ops structure containing
the hooks.

Added example support in gpio_dw driver.  Updated the sample
app and tested using LPS and Device Suspend Only policies.

Change-Id: I2fe347f8d8fd1041d8318e02738990deb8c5d68e
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-03-26 14:35:11 -04:00
Maciek Borzecki f8c24fb203 gpio/stm32: fix build
Build with GPIO port E failed due to a missing comma.

Change-Id: Ib8fa7f4d03ed4f4c713a3a8a16ad3b37fcf6b0b7
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-25 23:31:36 +00:00
Vinicius Costa Gomes d872bb173c pinmux: Move STM32 boards to the pinmux model
This moves the STM32 based boards (Nucleo F103RB and STM32 Mini A15) to
the "new" pinmux model.

Change-Id: I190df271a6b83fafeec0b281cd4ee7cf13d7e7db
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-03-25 06:17:33 -04:00
Vinicius Costa Gomes a12a25ad00 pinmux: Move the Freescale FRDM K64F board to the pinmux model
Change-Id: I50cf5fcf00481a3ebac07ced3aa6f7783765934f
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-03-25 06:17:33 -04:00
Tomasz Bursztyka 67196bc0c3 drivers: gpio: Align the style all over the drivers
Fixing:
- indentation
- 80 chars limit
- { } mandatory on relevant statements
- using BIT() macro relevantly

Change-Id: Ib84eb29530b175c8a533c1b361aea2632f0d7917
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-03-24 08:01:52 +00:00
Andre Guedes 300bbdc2f4 gpio: Fix returning code from stm32 driver
This patch fixes gpio_stm32 driver since it was merged with a few
occurrences of DEV_* error code.

Change-Id: I025e4f83d8ca07bc0fed7d3dcb9cce3b9d11c3fc
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-23 15:55:11 +00:00
Yannis Damigos d7a21260b6 drivers: gpio: Make K64 gpio submenu available only for K64 soc
Makes K64 gpio driver submenu available only if K64 soc is
selected.

Change-Id: I4097006a4dca718ed2da730fa85cd2ad9970f419
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2016-03-21 19:41:06 +02:00
Yannis Damigos 3a977ae654 drivers: gpio: Move STM32 gpio driver under its own submenu
Moves STM32 gpio driver under its own submenu, like atmel SAM3
and K64 gpio drivers.

Change-Id: Iebc474af9818a73275f99183d3f4788eea1e6ded
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2016-03-21 16:51:43 +00:00
Andre Guedes 3172fca3a0 drivers: qmsi: Fix gpio, i2c and wdt for D2000
This patch fixes the gpio, i2c and watchdog shim drivers so they set the
CLK_PERIPH_CLK bit during driver initialization. Differently from Quark
SE, the peripheral clock gate bit (CLK_PERIPH_CLK) is not enabled by
default in Quark D2000. We have to explicitly set this bit in order to
properly initialize the device.

This issue has been masked so far because the CLK_PERIPH_CLK bit is set
when UART NS16550 driver is enabled. The UART NS16550 driver is enabled
by default for Quark D2000 so gpio, i2c and watchdog sample apps were
working just fine. But if we disable the NS16550 driver, these samples
applications stop working.

The remaining shim drivers already set the CLK_PERIPH_CLK bit during
initialization so there is no need to fix them.

Change-Id: I3f658da564f87e9d52092ce7aac423c7b3e0c890
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-18 23:31:45 +00:00
Maciek Borzecki 1524e713c5 gpio/stm32: GPIO input with interrupts
Add support for interrupts for input GPIO pins on STM32 MCUs. The SoC
support code is expected to provide an implementation of
stm32_gpio_enable_int() call.

Change-Id: I61bae54b8e044be4d7d8eb60c0c67b71f8c59553
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-18 20:55:21 +00:00
Maciek Borzecki 6461e70b72 gpio/stm32: add common driver for STM32 GPIO
The driver implements a GPIO device interface for STM32 MCUs. Each SoC
must provide implementation of the follwoing calls:
stm32_gpio_flags_to_conf(), stm32_gpio_configure(),
stm32_gpio_set(). Consult gpio_stm32.h header for details on semantics
of these calls.

The driver registers 5 devices, each corresponding to a single GPIO
port. The users can then access individual pins by using values
0-15.

Change-Id: Id236b5b75c9dd091018a50a7be3501c8591cd551
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-18 16:27:04 +01:00
Daniel Leung 1904ecc0b5 gpio: restructure Kconfig options
() Moves config options for each controllers into their own
   Kconfig files. This keeps drivers/gpio/Kconfig from getting
   too big.
() Options for each controller are moved under their own
   submenus.
() Re-named the device names to standard as "GPIO_0", "GPIO_1",
   etc.
() Adds the missing copyright to Kconfig.atmel_sam3.

Origin: refactored from existing file
Change-Id: I7c531b0109ca5a6840d3abd9daa6bc784f15233d
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-17 21:05:12 +00:00
Andre Guedes 136d171588 drivers: Replace DEV_NOT_CONFIG by -EPERM
This patch replaces all occurences of the macro DEV_NOT_CONFIG by
-EPERM at the driver level. This patch is part of the effort to
transition from DEV_* codes to errno.h codes.

Change-Id: I3054c8aa76319a58a2eec089b8a72bf301c85391
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-16 19:30:04 -04:00
Andre Guedes aca7cb1efd drivers: Replace DEV_NO_SUPPORT by -ENODEV
This patch replaces all occurences of the macro DEV_NO_SUPPORT by
-ENODEV at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/ when applicable.

This patch is part of the effort to transition from DEV_* codes to
errno.h codes.

Change-Id: I03007527367b03e6fd72a85004b7d3b81046a6a6
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-16 19:30:04 -04:00
Andre Guedes b3cb3a1f68 drivers: Replace DEV_INVALID_CONF by -EINVAL
This patch replaces all occurences of the macro DEV_INVALID_CONF by
-EINVAL at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/ when applicable.

This patch is part of the effort to transition from DEV_* codes to
errno.h codes.

Change-Id: Idae0d5af8dd780416977c9261a5fb6188c3aab64
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-16 19:30:04 -04:00
Andre Guedes 245e140da6 drivers: Replace DEV_INVALID_OP by -ENOTSUP
This patch replaces all occurences of the macro DEV_INVALID_OP by
-ENOTSUP at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/ when applicable.

This patch is part of the effort to transition from DEV_* codes to
errno.h codes.

Change-Id: I46aec3c65963018c479b01602e4a3eec8650eaff
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-16 19:30:04 -04:00
Andre Guedes 7c956d2ece drivers: Replace DEV_FAIL by -EIO
This patch replaces all occurences of the macro DEV_FAIL by -EIO
at the driver level. So this patch touch the files under drivers/,
include/ and samples/drivers/ when applicable.

This patch is part of the effort to transition from DEV_* codes to
errno.h codes.

Change-Id: I0594ab5dbe667e074c250129e7c13ce512ac940f
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-16 19:30:04 -04:00
Andre Guedes 024cfe754e drivers: Replace DEV_OK by 0
This patch replaces all occurences of the macro DEV_OK by the actual
value 0 at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/.

This patch is part of the effort to transition from DEV_* codes to
errno.h codes.

Change-Id: I69980ecb9755f2fb026de5668ae9c21a4ae62d1e
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-16 19:30:04 -04:00
Daniel Leung f8405637f7 drivers/gpio_dw: fix kconfig dependencies
The DesignWare GPIO options should really depend on whether
GPIO_DW is enabled.

Change-Id: I98b2964d6a0afdac89dc66a78342076afa6feec5
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-15 21:39:15 -04:00
Jeff Blais f4c7e6697d arm: Add GPIO interrupt/callback support for K64F
Interrupt and callback function support is added to the K64F GPIO driver.

The implementation is based on the Designware GPIO driver (gpio-dw.*).

Change-Id: Id88d06f748400f8f822ca98e098cb44a53678c38
Signed-off-by: Jeff Blais <jeff.blais@windriver.com>
2016-03-09 12:54:02 +00:00
Jeff Blais 52b499fd1f arm: Freescale K64/FRDM-K64F Pinmux support
K64 pinmux support is created as a normal driver.

As opposed to the Galileo board, the pin configuration options are
defined by the MCU and are not board-specific.  Separate
platform/board-specific configuration code uses the pinmux driver for
the default pin settings. For FRDM-K64F, only the Arduino pins (22 of a
possible 160) are set up.

Some of the I/O pins routed to the Arduino header are also configured as
JTAG/SWD signals by default and are used by the OpenSDAv2 debug
interface.  Therefore, a PRESERVE_JTAG_IO_PINS config option was created
for the FRDM-K64 platform to prevent the default pin settings from
re-configuring these pins.

The K64 MCU separates pin configuration and control, implemented in the
pinmux driver, from GPIO.  This results in some cross referencing
between the K64 GPIO driver and the K64 pinmux driver due to the
dependencies of one on the other.

This pinmux driver also uses the expanded pinmux function/mode parameter
size to describe pin configuration options with bit fields for the K64,
including up to 8 pin functions, plus interrupt, pullup/down, drive
strength, open-drain and slew rate.

The following GCC warnings in the K64 pinmux driver are prevented when not
compiling with 'no-optimization' (-O0):

warning: 'gpio_dev' may be used uninitialized in this function
[-Wmaybe-uninitialized]

Change-Id: Ie5031d18750143bf895883058b3cd55fd9989fd3
Signed-off-by: Jeff Blais <jeff.blais@windriver.com>
2016-03-09 11:58:02 +00:00
Jeff Blais 0fd7af2a52 arm: Freescale K64 GPIO driver
Basic driver support for the Freescale K64 GPIO module.

Note that only pin direction, read and write are supported.

Change-Id: I6587bb260197a00497be9ac991002e3dde54718d
Signed-off-by: Jeff Blais <jeff.blais@windriver.com>
2016-03-09 06:39:16 +00:00
Andre Guedes 55e93f203c gpio: Remove default value from platform-specific options
This patch removes the default value from some platform/SoC specific
options which are declared in drivers/gpio/Kconfig because 1) most of
the time they are not valid values and 2) the correct values are
already set in the SoC Kconfig.

It also moves the interrupt priority definition from the driver's
Kconfig to the platform's Kconfig since it is a platform-specific
configuration.

Change-Id: Id00f7907fa55025011dabce6e282a9623be23831
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-02-24 17:05:52 +00:00
Andre Guedes 2b608b1e59 gpio: Enable QMSI driver for Quark D2000
This patch fixes the GPIO QMSI shim driver so we are able to use it in
Quark D2000 based platforms. To enable this driver we have to add a few
 #if guards because some macros and functions (e.g. QM_AON_GPIO_0 and
qm_aon_gpio_isr_0) are not defined in QMSI headers from Quark D2000
(this SoC doesn't support the Always-On GPIO controller).

This patch also adds the QMSI driver default options to arch/x86/soc/
quark_d2000/Kconfig.

Change-Id: Ia16a345e1de3008f167ed66f891834607c05f4a2
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-02-20 13:04:34 +00:00
Vinicius Costa Gomes 11ee779feb gpio: qmsi: Simplify interrupt enabling/disabling
This handling is already done by QMSI, so no need for it to be done in
Zephyr side as well.

Change-Id: Ia5c6206d3d7f04702e0be0e76f2130df8d60b31c
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-02-20 13:03:44 +00:00
Vinicius Costa Gomes 821212c3df drivers: gpio: Add support for AON GPIO to QMSI driver
This adds support to the AON GPIO controller using the QMSI driver.

In order to enable it, the following configuration options must be set:
CONFIG_QMSI_DRIVERS=y
CONFIG_QMSI_INSTALL_PATH="PATH TO LIBQMSI"
CONFIG_GPIO_QMSI=y
CONFIG_GPIO_QMSI_AON=y

Change-Id: I5a1a232d97741ad7fdbf40d8aea5a835e5b4e724
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-02-20 13:02:49 +00:00
Dan Kalowsky 4743684e4f struct packing
Looking at all structs as to where we can pack them a little better, and
calling out the padding/stride at the end for future expansion.

Change-Id: I4a651092e950dd3d915af9fa0ee0d7d59803e58f
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-10 16:21:26 +00:00
Jesus Sanchez-Palencia 8d0c9124a0 gpio_qmsi: Use level sensitive interrupts
For QMSI drivers with combined interrupts, we need to use level
triggered interrupts. This is the case of the GPIO controller.

If we keep it configured as EDGE, the user will never be able to
get a pin configured as LEVEL to fire more than 1 interrupt.

Change-Id: I36bffc79183ca97f431c4f5811ed5d56e2fd82e8
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
2016-02-05 20:25:30 -05:00
Daniel Leung f6a5bfcfa1 gpio: add driver for Atmel SAM3 PIO controllers
The PIO controllers on Atmel SAM3 family processors can be
used for GPIOs, so this is the driver.

Change-Id: I3d5712f3a0a71025b820ca1c08dd767ee1e136d8
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:25:29 -05:00
Andrew Boie 897ffaeb2c irq: rename irq_connect() to IRQ_CONNECT()
It's not a function and requires all its arguments to be build-time
constants. Make this more obvious to the end user to ease confusion.

Change-Id: I64107cf4d9db9f0e853026ce78e477060570fe6f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:25 -05:00
Benjamin Walsh d340d4cb3f device: use DEVICE_INIT everwhere
This is the last step before obsoleting DEVICE_DEFINE() and
DEVICE_INIT_CONFIG_DEFINE().

Change-Id: Ica4257662969048083ab9839872b4b437b8b351b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:25 -05:00
Benjamin Walsh 2c1a95aee6 device: rename SYS_GET_DEVICE_NAME/SYS_GET_DEVICE
Rename them to DEVICE_NAME_GET and DEVICE_GET to fit in the 'device'
namespace.

Change-Id: I407a7f284ed4d1c071961b46615eea859c2e825f
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:25 -05:00
Benjamin Walsh 0303d8cab9 device: rename SYS_DEFINE_DEVICE()
Rename it to DEVICE_DEFINE() so that it fits in the 'device' namespace.

Change-Id: I3af3a39cf9154359b31d22729d0db9f710cd202b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:25 -05:00
Benjamin Walsh bfc27206b2 device: rename DECLARE_DEVICE_INIT_CONFIG()
Rename it to DEVICE_INIT_CONFIG_DEFINE(), because (a) it was not fitting
in any namespace and (b) it is not used to declare, but rather define a
object.

Change-Id: I1da5822f06b85a9fb024b5b184afd0ccc01012ec
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:25 -05:00
Peter Mitsis a0e4568760 c++: Add extern "C" { } block to header files
Adds extern "C" { } blocks to header files so that they can be
safely used by C++ source files.

Change-Id: Ia4db0c36a5dac5d3de351184a297d2af0df64532
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:25:22 -05:00
Jesus Sanchez-Palencia 6504b7e72a gpio: Add QMSI-based implementation
Introduce the GPIO QMSI-based implementation. This is basically a
shim layer that implement's Zephyr's GPIO APIs on top of QMSI drivers.

This is an alternative driver that conflicts with the previous
GPIO_DW implementation. In order to enable it you must set:
- CONFIG_GPIO=n
- CONFIG_GPIO_QMSI=y
- CONFIG_GPIO_0=y
- CONFIG_QMSI_DRIVERS=y
- CONFIG_QMSI_INTALL_PATH="PATH_TO_QMSI"

Note that this driver currently only supports one controller instance,
GPIO_0. It is implemented this way due to a limitation from the current
version of QMSI. QMSI versions later than 1.0 doesn't have this
limitation.

Missing:
- support multiple controller instances (gpio_0, gpio_1, etc);
- enable level triggered interrupts in sync with system clock,
through setting INT_CLOCK_SYNC properly.

Change-Id: Ib61b153dae9741806a9a31d7dc1f82b96d000fbe
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-02-05 20:25:22 -05:00
Tomasz Bursztyka 7602d34949 gpio: dw: Fixing how interrupt unmasking is done for Quark SE SS
There is no such thing as "IA" in Quark SE SS as it is an ARC core. Plus
for this very specific feature it does not require the ARC aux regs
instruction to read/write in the given mask address.
And fixing also the CONFIG_ option to check.

Change-Id: I1f63348ec85f6e006795f7641c912a30fc003709
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:25:21 -05:00
Tomasz Bursztyka bf20dc9cec gpio: dw: Refactor how general interrupt unmasking is proceeded
This is valid only for Quark SE and Quark SE SS, where it requires to
unmask the interrupt for each specific controller. Thus making the
function generic, using the parameter as the specific mask base address.

Change-Id: Iea0a412b8d94a1ab5e1f3e339eaf632eacee5797
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:25:21 -05:00
Andrew Boie d9cfbd5a61 interrupts: new static IRQ API
The interrupt API has been redesigned:

- irq_connect() for dynamic interrupts renamed to irq_connect_dynamic().
  It will be used in situations where the new static irq_connect()
  won't work, i.e. the value of arguments can't be computed at build time
- a new API for static interrupts replaces irq_connect(). it is used
  exactly the same way as its dynamic counterpart. The old static irq
  macros will be removed
- Separate stub assembly files are no longer needed as the stubs are now
  generated inline with irq_connect()

ReST documentation updated for the changed API. Some detail about the
IDT in ROM added, and an oblique reference to the internal-only
_irq_handler_set() API removed; we don't talk about internal APIs in
the official documentation.

Change-Id: I280519993da0e0fe671eb537a876f67de33d3cd4
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:17 -05:00
Daniel Leung dff5f6a038 i2c: make i2c_transfer() really generic
Make the i2c_transfer() to transact messages through the I2C bus.

It is useful for I2C storage devices, as now we can send one message
containing the destination byte/block address, then send the data
in another message. There is no need to construct one continuous
data buffer to send both address and data anymore.

The drivers and sample apps have been updated to utilize updated
API when appropriate. For i2c_dw, only master mode has been updated.
Slave mode will be updated once we can adequately test it.

Change-Id: I0a811d60567367817fcc8d15f5454e5c933722e2
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:25:15 -05:00
Peter Mitsis d63a4f7bf7 nano_timers: Simplify nano_xxx_timer_test() API family
Simplifies the nanokernel timer API so that the timeout parameter must be
specified when invoking nano_isr_timer_test(), nano_fiber_timer_test(),
nano_task_timer_test() and nano_timer_test().

This obsoletes the following APIs:
	nano_fiber_timer_wait()
	nano_task_timer_wait()
	nano_timer_wait()

Note that even the though the new API requires that the timeout parameter
be specified, there are currentl only two acceptable values:
	TICKS_NONE and TICKS_UNLIMITED

Theoretically, the current implementation would allow one to supply a
finite positive value for the timeout and the system would wait up to
that many ticks for the timer to expire. However, it is thought that
that unnecessarily complicates the nanokernel timer model and so it is
left as an unsupported option.  Should that change, then that feature
could be enabled by updating the documentation.

Change-Id: I8835c5342ab5025d6f70fdfbed54a50add7568d7
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:25:15 -05:00
Javier B Perez Hernandez 02812f4635 drivers: pci: struct pci_dev_info rename class
Rename class in pci_dev_info struct to allow to use C++ compilers.
Updated drivers to use new struct.

Change-Id: I17b94cb7bc094bccd615c8389a28589bfa90cab8
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
2016-02-05 20:25:12 -05:00
Juan Manuel Cruz 6a4d1b52de gpio: Fixes interruption connection parameters.
Fixes interruption connection parameters, ISR parameter is not null anymore.
Removes irq_connect call that is a dynamic irq api that should not be
used along static irq api: IRQ_CONNECT_STATIC and IRQ_CONFIG.

Change-Id: I232c8562d2dcda3229776b561e2c1f4608a31cdd
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:25:12 -05:00
Juan Manuel Cruz 609d1f72a2 gpio: adds interruption masking for quark se ss
The current gpio_dw_initialize implementation masks the interruptions in the line
dw_write(base_addr, INTMASK, ~(0)) to assign api functions and initialize
interrupt vectors and handlers safely. Immediately after this, the driver expects
that gpio_dw_unmask_int(port) unmasks the interrupts. Without this patch that
implementation is empty for the quark se ss board.

Change-Id: Iac84c8807fcadad8c256c3fcaa4ff624b6337bf3
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:25:12 -05:00
Anas Nashif 81ed24413e pcal9535a: remove unused function _wait_10ms
Change-Id: Ib89ec98279895f1d25c4232bed6caf3a1ad83b2b
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:12 -05:00
Anas Nashif 78a566d3b8 trivial: fix header guard definition
Change-Id: Ia0090ff07a8f2cab8c745b4f6a0d9eeead5518a2
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:11 -05:00
Anas Nashif 6bca3724c1 drivers: set default priority for drivers
Use a default priority to avoid Kconfig blocking when priority
is not set in SoC or Board.

Change-Id: I4edda47b955a7ee834f04dc40d0decbd8dee6305
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:11 -05:00
Anas Nashif 10bb38c186 Use SoC instead of platform.
Change terminology and use SoC instead of platform. An SoC provides
features and default configurations available with an SoC. A board
implements the SoC and adds more features and IP block specific to the
board to extend the SoC functionality such as sensors and debugging
features.

Change-Id: I15e8d78a6d4ecd5cfb3bc25ced9ba77e5ea1122f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:11 -05:00
Daniel Leung 5aab5ccbad arc/quark_se_ss: need some magic to enable GPIO interrupts
1. Need to unmask interrupts for the sensor subsystem.
2. The GPIO controllers need their clock enabled before they can
   start sending out interrupts.
3. Setting up ISR on ARC requires usage of irq_connect().

Change-Id: I633b07292f11e5c5e768fc51fabb70769d407609
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:25:06 -05:00
Daniel Leung 8cb01064f6 gpio/dw: move IOAPIC interrupt trigger flags into driver
Move the common #define for IOAPIC interrupt trigger flags out of
platform board.h and into the driver.

Change-Id: Ia0a069464392714f38037841de52e8d265fa4f49
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:25:04 -05:00