Commit graph

5 commits

Author SHA1 Message Date
Alexey Brodkin 61f073a735 board/nsim: Add support of ARC HS cores in nSIM
ARC nSIM simulates pretty much any modern ARC core,
moreover it emulates a lot of different core features so
it is possible to play with them even wo real hardware.

Thus we add yet another ARC core family to be used on simulated
nSIM board.

For now it's just a basic configuration with ARC UART for
smoke-testing of Zephyr on ARC HS CPUs.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-07-31 09:25:15 -07:00
Alexey Brodkin bceaed67b3 simulation: ARC EM in nSIM to use nsim_em.props
This matches a naming scheme used for other flavour of ARC EM
SoC flavors.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-06-06 14:20:42 -04:00
Anas Nashif 3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Wayne Ren c632ddaea3 cmake: add debugserver target for nsim
add debugserver target to run  "make debugserver" for nsim

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-03-20 00:35:43 -07:00
Anas Nashif 7ce9615a2b nsim: add run target
Support 'make run' with this target rather than using 'flash' which
might be confusing.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-07-19 18:59:07 -04:00