Commit graph

3814 commits

Author SHA1 Message Date
Kumar Gala
8ce0cf0126 kconfig: Convert device tree chosen properties to new kconfigfunctions
Convert how we get the various chosen properties like "zephyr,console"
to use the new kconfig functions like dt_chosen_to_label.

Because of how kconfig parses things we define a set of variables of the
form DT_CHOSEN_Z_<PROP> since comma's are parsed as field seperators in
macros.

This conversion allows us to remove code in gen_defines.py for the
following chosen properties:

zephyr,console
zephyr,shell-uart
zephyr,bt-uart
zephyr,uart-pipe
zephyr,bt-mon-uart
zephyr,uart-mcumgr
zephyr,bt-c2h-uart

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-13 11:42:34 -05:00
Andrew Boie
a470ba1999 kernel: remove z_fatal_print()
Use LOG_ERR instead.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-09-12 05:17:39 -04:00
Andrew Boie
6fd6b7e50a xtensa: remove legacy arch implementation
We re-wrote the xtensa arch code, but never got around
to purging the old implementation.

Removed those boards which hadn't been moved to the new
arch code. These were all xt-sim simulator targets and not
real hardware.

Fixes: #18138

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-09-12 01:26:34 -04:00
Charles E. Youse
ee525c2597 arch/x86: inline x2APIC EOI
From the Jailhouse days, this has been a function call. That's silly.
We now inline the EOI in the ISR when in x2APIC mode. Also clean up
z_irq_controller_eoi(), so it now uses the inline macros.

Also, we now enable x2APIC on up_squared by default.

Fixes: #17133

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-12 09:53:45 +08:00
Ulf Magnusson
72e71d6000 x86: gen_idt.py: Use enumerate() to fix pylint warning
Use enumerate() to fix this pylint warning:

    C0200: Consider using enumerate instead of iterating with range and
    len (consider-using-enumerate)

enumerate() is handy when the loop body needs both the element and its
index. It returns (index, element) tuples.

Also use a tuple unpacking to extract 'handler' from the elements in
'vector'.

Piggyback a slightly simpler way to build a list of num_chars 0s.

Getting rid of warnings for a CI check.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-10 15:53:49 +02:00
Ulf Magnusson
4e90dd67a9 x86: gen_idt.py: Fix broken error() call in update_irq_vec_map()
Accidentally passed two arguments instead of one. Fixes this pylint
error:

    arch/x86/gen_idt.py:132:8: E1121: Too many positional arguments for
    function call (too-many-function-args)

Fixing pylint warning for a CI check.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-10 15:51:52 +02:00
Ulf Magnusson
247d40cf55 gen_isr_tables: Fix pylint warning by using isinstance()
Fix this warning, as a preparation for a CI check:

    arch/common/gen_isr_tables.py:167:11: C0123: Using type() instead of
    isinstance() for a typecheck. (unidiomatic-typecheck)

isinstance() has the advantage that it also handles inheritance, though
it doesn't really matter here. It's more common at least.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-08 22:24:45 -04:00
Ulf Magnusson
ad8ac7469b x86: gen_idt.py: Simplify test with 'not in'
Getting slightly subjective, but fixes this pylint warning:

    arch/x86/gen_idt.py:281:11: R1714: Consider merging these
    comparisons with "in" to 'handler not in (spur_code, spur_nocode)'
    (consider-using-in)

Getting rid of pylint warnings for a CI check. I could disable any
controversial ones (it's already a list of warnings to enable anyway).

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-08 22:21:46 -04:00
Wayne Ren
a75b0014fb arc: replace 32-bit instructions with possible 16-bit instructions
replace 32-bit instructions with possible 16-bit instructions to
get better code density

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-09-08 12:36:02 +02:00
Ulf Magnusson
50b9b1249b scripts: Simplify code with sys.exit(<string>)
Promote a handy and often-overlooked sys.exit() feature: Passing it a
string (or any other non-int object) prints it to stderr and exits with
status 1.

See the documentation at
https://docs.python.org/3/library/sys.html#sys.exit.

This indirectly prints some errors to stderr that previously went to
stdout.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-08 12:34:16 +02:00
Daniel Leung
ea438d0a9b xtensa: asm2: add code for double exception vector
This adds a simple infinite loop when double exception is raised.
Without this, if double exception occurs, it would execute
arbitrary code.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-09-07 10:21:16 -04:00
Daniel Leung
984002de6d xtensa: rename z_arch_irq_is_enabled for multi-level interrupts
This follows the z_arch_irq_en-/dis-able() so that the SoC
definitions are responsible for functions related to multi-level
interrupts.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-09-07 10:20:51 -04:00
Charles E. Youse
6767563f94 arch/x86: remove support for IAMCU ABI
This ABI is no longer required by any targets and is deprecated.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-07 10:07:42 -04:00
Charles E. Youse
37929b3428 arch/x86_64: do not modify CR8 in interrupt path
Currently, the interrupt service code manually raises the CPU task
priority to the priority level of the vector being serviced to defer
any lower-priority interrupts. This is unnecessary; the local APIC
is aware that an interrupt is in-service and accounts for its priority
when deciding whether to issue an overriding interrupt to the CPU.

Signed-off-by: Charles E. Youse <charles@gnuless.org>
2019-09-07 10:06:13 -04:00
Ulf Magnusson
a3793098cb xtensa: xtensa_intgen.py: Change 'not lvl in ...' to 'lvl not in ...'
Use the 'not in' operator. Fixes this pylint warning:

    arch/xtensa/core/xtensa_intgen.py:77:7: C0113: Consider changing
    "not lvl in ints_by_lvl" to "lvl not in ints_by_lvl" (unneeded-not)

Fixing pylint warnings for a CI check.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-07 07:55:01 -04:00
Ulf Magnusson
0d39a10fbb scripts: Fix random typo'd whitespace
Reported by pylint's 'bad-whitespace' warning.

Not gonna enable this warning in the CI check, because it flags stuff
like deliberately aligning assignments and gets too cultish. Just a
cleanup pass.

For whatever reason, the common convention in Python is to skip spaces
around '=' when passing keyword arguments and giving default arguments:

    f(x=3, y=4)
    def f(x, y=8):
        ...

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-07 07:54:17 -04:00
Alexey Brodkin
9a3ee641b6 arc: interrupts: Explain return from interrupt to cooperative thread
The code in question is very non-trivial so without good explanation
it takes a lot of time to realize what's done there and why
it still works in the end.

Here I'm trying to save a couple of man-days for the next developers
who's going to touch that piece of code.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-08-30 20:10:14 +02:00
Ioannis Glaropoulos
eddf058e1e arch: arm: be able to infer Z_ARCH_EXCEPT() for baseline SOCs
This commit makes it possible to infer Z_ARCH_EXCEPT()
calls in SVCs that escalate to HardFault due to being
invoked from priority level equal or higher to the
interrupt priority level of the SVC Handler.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-08-29 11:29:50 +02:00
Alexey Brodkin
d52b8df96b arch: arc: threads: Comment clean-up
commit 780324b8ed ("cleanup: rename fiber/task -> thread")
seems to be done by a script and in that particular case turned
menaingful sentence into nonsense. Alas, threads might be in all
four states.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Anas Nashif <anas.nashif@intel.com>
2019-08-28 11:53:32 +02:00
Alexey Brodkin
4449ad52da arch: arc: _rirq_exit: Comment clean-up
We manage IRQs in a quite a different way now since
commit f8d061faf7 ("arch: arc: add nested interrupt support")
so that comment not only makes no sense but also may fool a reader
as disabling of interrupts happens in the very beginning of
_rirq_exit() but not here.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-08-28 11:53:32 +02:00
Wayne Ren
3590c80aaf arch: arc: for fast irq ERET has no copy of ilink
we should not rely on that eret has a copy of ilink in fast
irq handling. This will cause crash for hs cores.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-28 08:22:14 +02:00
Wayne Ren
44c917e6b2 arch: arc: fix the bug that interrupt stack is not switched
For the old codes, if nest interrupts come out after _isr_wrapper
and before _check_nest_int_by_irq_act, then multi-bits in irq_act
will be set, this will result irq stack will not be switched in
correctly

As a fix, it's still need to use nest interrupt counter to do
interrupt stack switch as before

The difference is in the past exc_nest_count is used, but here
_kernel.nested/_kernel.cpus[cpu_id].nested is used.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-28 08:22:14 +02:00
Wayne Ren
146c7e8c7e arch: arc: secure world only check secure interrupt
* in arc secureshield interrupts can be configured
  as secure or normal
* in sw design, high interrupt priorites are allocated to
  secure world, low priorities are allocated to normal world.
* secure interrupt > secure thread > normal interrupt > normal
  thead

So, here secure world/firmware only checks secure interrupt
priorities

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-28 08:22:14 +02:00
Wayne Ren
bb0a189d42 arch: arc: use _curr_cpu to replace _curr_irq_stack
use _curr_cpu to record the _cpu_t of each cpu.
the irq_stack is also covered

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-28 08:22:14 +02:00
Wayne Ren
5dbd4ce738 arch: arc: not allowed to switch to thread preempted by exception
it's not allowed to switch to thread preempted by exception as
its context is not saved.

So if a thread switch is required in exception handling, e.g.
kill a thread, the old thread cannot be switched back

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-28 08:22:14 +02:00
Wayne Ren
5a73bf3966 arch: arc: fix and optimize the handling of SECT_STAT.IRM
For arc processor equiped with secureshield, SEC_STAT.IRM
bit should be recorded, it determins which mode irq should
return

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-28 08:22:14 +02:00
Wayne Ren
8cbcdd71ec arch: arc: secure stat should also be reset correctly
secure status should aslo be set correctly

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-28 08:22:14 +02:00
Jan Van Winkel
8cd7cd48cf native: Set recommended stack size to 40 for 64 bit
Set the recommended thread stack size to 40 bytes in case a build is
made for a 64-bit native posix board

Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2019-08-24 19:55:09 +02:00
Andy Ross
77719b81e9 arch/xtensa: Clean up fatal error handling
Update the xtensa backend to work better with the new fatal error
architecture.  Move the stack frame dump (xtensa uses a variable-size
frame becuase we don't spill unused register windows, so it doesn't
strictly have an ESF struct) into z_xtensa_fatal_error().  Unify the
older exception logging with the newer one (they'd been sort of glomed
together in the recent rework), mostly using the asm2 code but with
the exception cause stringification and the PS register field
extraction from the older one.

Note that one shortcoming is that the way the dispatch code works, we
don't have access to the spilled frame from within the spurious error
handler, so this can't log the interrupted CPU state.  This isn't
fixable easily without adding overhead to every interrupt entry, so it
needs to stay the way it is for now.  Longer term we could exract the
caller frame from the window state and figure it out with some
elaborate assembly, I guess.

Fixes #18140

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-08-22 17:57:40 -04:00
Andy Ross
915739e724 arch/xtensa: Add z_arch_irq_is_enabled()
This function got dropped, and is needed for dynamic interrupt support

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-08-22 17:53:51 -04:00
Andy Ross
74d26094f8 arch/common: Provide a weak, generic z_arch_irq_connect_dynamic()
It was discovered that the xtensa version of
z_arch_irq_connect_dynamic() was being removed along with the old
xtensa architecture support, because it was never included in the asm2
builds.

But there's no xtensa-specific code in it at all.  Architectures that
use the existing sw_isr_table mechanism and don't (or can't, in the
case of xtensa which has fixed interrupt priority) interpret the other
parameters might as well have access to a working generic
implementation.

Fixes #18272

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-08-22 17:53:51 -04:00
Jan Van Winkel
d157527ec1 native: Added dummy member to struct _thread_arch
Added dummy member to struct _thread_arch to suppress clang compiler
warning.

Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2019-08-22 09:06:00 +02:00
Peter Bigot
4a470114fa arc: rearrange for standard use of extern "C"
Consistently place C++ use of extern "C" after all include directives,
within the negative branch of _ASMLANGUAGE if used.

Remove extern "C" support from files that don't declare objects or
functions.

In arch/arc/arch.h the extern "C" in the including context is left
active during an include to avoid more complex restructuring.

Background from issue #17997:

Declarations that use C linkage should be placed within extern "C"
so the language linkage is correct when the header is included by
a C++ compiler.

Similarly #include directives should be outside the extern "C" to
ensure the language-specific default linkage is applied to any
declarations provided by the included header.

See: https://en.cppreference.com/w/cpp/language/language_linkage
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-08-20 00:49:15 +02:00
Peter Bigot
20bb672266 arch/nios2: rearrange for standard use of extern "C"
Consistently place C++ use of extern "C" after all include directives,
within the negative branch of _ASMLANGUAGE if used.

Remove extern "C" support from files that don't declare objects or
functions.

Background from issue #17997:

Declarations that use C linkage should be placed within extern "C"
so the language linkage is correct when the header is included by
a C++ compiler.

Similarly #include directives should be outside the extern "C" to
ensure the language-specific default linkage is applied to any
declarations provided by the included header.

See: https://en.cppreference.com/w/cpp/language/language_linkage
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-08-20 00:49:15 +02:00
Peter Bigot
817f527641 arch/xtensa: rearrange for standard use of extern "C"
Consistently place C++ use of extern "C" after all include directives,
within the negative branch of _ASMLANGUAGE if used.

Background from issue #17997:

Declarations that use C linkage should be placed within extern "C"
so the language linkage is correct when the header is included by
a C++ compiler.

Similarly #include directives should be outside the extern "C" to
ensure the language-specific default linkage is applied to any
declarations provided by the included header.

See: https://en.cppreference.com/w/cpp/language/language_linkage
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-08-20 00:49:15 +02:00
Peter Bigot
ce3f07954a arch/arm: rearrange for standard use of extern "C"
Consistently place C++ use of extern "C" after all include directives,
within the negative branch of _ASMLANGUAGE if used.

In arch.h the extern "C" in the including context is left active during
include of target-specific mpu headers to avoid more complex
restructuring.

Background from issue #17997:

Declarations that use C linkage should be placed within extern "C"
so the language linkage is correct when the header is included by
a C++ compiler.

Similarly #include directives should be outside the extern "C" to
ensure the language-specific default linkage is applied to any
declarations provided by the included header.

See: https://en.cppreference.com/w/cpp/language/language_linkage
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-08-20 00:49:15 +02:00
Peter Bigot
324203f79b arch/x86: rearrange for standard use of extern "C"
Consistently place C++ use of extern "C" after all include directives,
within the negative branch of _ASMLANGUAGE if used.

Background from issue #17997:

Declarations that use C linkage should be placed within extern "C"
so the language linkage is correct when the header is included by
a C++ compiler.

Similarly #include directives should be outside the extern "C" to
ensure the language-specific default linkage is applied to any
declarations provided by the included header.

See: https://en.cppreference.com/w/cpp/language/language_linkage
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-08-20 00:49:15 +02:00
Ioannis Glaropoulos
b8cd6fe626 arch: arm: fault: fix check on recoverable fault flag
'recoverable' is a value passed by reference and we
should be dereferencing the pointer, to check if the
fault has been classified as recoverable.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-08-19 09:46:24 +02:00
Peter Bigot
43fc6a7eff arch/riscv: rearrange for standard use of extern "C"
Consistently place C++ use of extern "C" after all include directives,
within the negative branch of _ASMLANGUAGE if used.

Remove extern "C" support from files that don't declare objects or
functions.

Background from issue #17997:

Declarations that use C linkage should be placed within extern "C"
so the language linkage is correct when the header is included by
a C++ compiler.

Similarly #include directives should be outside the extern "C" to
ensure the language-specific default linkage is applied to any
declarations provided by the included header.

See: https://en.cppreference.com/w/cpp/language/language_linkage
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-08-18 16:20:10 +02:00
Karsten Koenig
f0d4bdfe3f include: arch: riscv: rename global macro
SR and LR were used as global names for load and store RISC-V assembler
operations, colliding with other uses such as SR for STATUS REGISTER in
some peripherals. Renamed them to a longer more specific name to avoid
the collision.

Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
2019-08-17 11:48:02 +02:00
Andrew Boie
dafd3485bf xtensa: mask interrupts earlier
When coming out of an exception, we need to mask interrupts
to avoid races when decrementing the nested count. Move
the instruction that does this earlier.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-08-14 10:11:05 -07:00
Alberto Escolar Piedras
fce0316687 POSIX arch: Fixe issues related to extern "C"
Related to #17997, for the POSIX arch:
* Remove some unnecessary extern "C" and ifdef blocks
* Move an include out of one of these blocks
* Add a missing extern "C" block

Background:
Declarations that use C linkage should be placed within extern "C"
so the language linkage is correct when the header is included by
a C++ compiler.

Similarly #include directives should be outside the extern "C" to
ensure the language-specific default linkage is applied to any
declarations provided by the included header.

See: https://en.cppreference.com/w/cpp/language/language_linkage

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-08-12 15:10:15 +02:00
Wayne Ren
36a56e7a8f arch: arc: fix a bug when CONFIG_SMP is enabled
the bug is forgot to fixes, when CONFIG_SMP is enabled,
it will cause build error

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-11 21:18:38 +02:00
Wayne Ren
a97053d5eb arch: arc: no need of default n for arc_connect
as suggested in comments of PR #17747, no need of default n
for arc_connect

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-10 20:11:29 +02:00
Wayne Ren
cca39204c2 arch: arc: add initial support of ARC TEE
* it's based on ARC SecureShield
* add basic secure service in arch/arc/core/secureshield
* necesssary changes in arch level
   * thread switch
   * irq/exception handling
   * initialization
* add secure time support

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-10 17:45:22 +02:00
Bradley Bolen
8080a84887 arch: arm: Add Cortex-R5 support
Pass the correct -mcpu flags to the compiler when building for the
Cortex-R5.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-09 22:50:50 +02:00
Bradley Bolen
e439cfdf38 arch: arm: Add Cortex-R4 support
Pass the correct -march and -mcpu flags to the compiler when building
for the Cortex-R4.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-09 22:50:50 +02:00
Bradley Bolen
c30a71df95 arch: arm: Add Cortex-R support
This adds initial Cortex-R support for interrupts and context switching.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-09 22:50:50 +02:00
Wayne Ren
db8ddaa410 arch: arc: fix on the reason of software-triggered fatal exceptions
according to high-level design,in user mode software-triggered system
fatal exceptions only allow oops and stack check failure

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-09 20:11:58 +02:00
Wayne Ren
61d570bb38 arch: arc: add extra handling about exception raised in interrupt
exception, different with irq offload,  may be raised interrupt
handling, e.g.
  * z_check_stack_sentinel
  * wrong code

we need to add specific handling of this case in exception handling

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-09 20:11:58 +02:00