This adds the code to setup the IO-APIC for shared IRQ.
The code to enable shared IRQ with GPIO and I2C will follow.
Change-Id: I6e7de69f83bf7f1dd0da0571dbcb417beb2c232b
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This driver allows multiple drivers to share a common interrupt
line. This functionality is required on system that conform to the PC
interrupt structure. In the context of Zephyr this is needed for
SOC's that have their I/O IP blocks behind a PCI interface. Due to the
limited number of interrupt lines provided by the PCI interface
multiple IP blocks may be configured to share an interrupt line.
Drivers that share interrupts must be modified to *not* register their
own interrupt service routine as part of their configuration/initialization
but instead bind to the correct instance of this driver by name, then
register their interrupt service routine with this driver.
Change-Id: I57b517b97ebeabce484ba53c8f940da993cb391d
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
The first 32 entries are for well-known exceptions
Change-Id: I3342c48af6e7f687065fafd0c2af4dabc04d421e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The GPIO ports on the legacy bridge have to be access by
I/O port read/write, instead of direct memory access.
Choices in Kconfig cannot have default values in Kconfig,
so it has to be done in defconfig instead.
Change-Id: I479f3776edf5690f73d8e857ce6683285db092c0
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The interrupt selectionss are no longer specific to a particular
controller (e.g. I2C_DW_0), but apply to all controllers on
the platform.
[DL: Extracted these changes into their own patch, instead of
being squashed with others. Also modified the Kconfig
options to move them into proper position.]
Change-Id: Idc7ac9769e947447b868dccf772a95dbb5fc8021
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
This adds the default config option to enable the I2C controller,
for both nanokernel and microkernel.
Note that choices in Kconfig cannot have default values in Kconfig,
so it has to be done in defconfig instead.
Change-Id: I2ac0c880629db68e5b9a6bf61e49939ab7418a89
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds the Kconfig option to specify default configuration
for the I2C controller during driver initialization.
During boot, the controller needs to be configured before
communication to slave devices can start. After boot,
an app can re-configure the controller if needed.
Change-Id: I7bf252f75a31943ae444e4d914f3a9a1a3f3d91f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Begining of interrupt (BOI) is only supported on systems with a 8259
interrupt controller all modern x86 systems use APIC interrupt
controller.
Change-Id: Ife2b3b1971bbebeda597bfa1f96005f79cd7e959
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Zephyr requires that the processor be in 32 bit protected mode on
entry.
Change-Id: I71792eeb154281881e8516a7a8a2291a52f83fc6
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
BOOT_A20_ENABLE relies on the kernel being on a system that has a full
PC BIOS and requires that the A20 line be enabled to boot
correctly. None of the supported platforms satisfy either requirment.
Change-Id: I05805a050f5531de0348b60a4f0cb974e464b279
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
This avoids the case where the system has multiple threads using
floating point and the threads were not properly configured to use
floating point. The misconfigured threads will only take the fault on
first use of a floating point instruction.
Change-Id: I2be9f9f145bc4e7659e07154021ccc237774897b
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Allow the user to see the configure option without relying on
FP_SHARING being set.
Change-Id: I7e802c18a1c1087f7672925b18ae32dcc20787da
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
The default for x86 floating point support in Zephyr is *no* this
option is redundant and more that a little confusing.
Change-Id: I41fad33467321c483a4df028230ecbb28b4486f9
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
SSE instructions are controlled by the FLOAT and SSE config variables
this option is redundant
Change-Id: Iab43d21315655a00daeac24994ee29a8e1c70207
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
The projects depend on the options enabled by ENHANCED_SECURITY select
required options explicitly. Forcing selection based on
ENHANCED_SECURITY is redundant.
Change-Id: I4473996355e67c99be91413b55d7c6685d9263b2
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
There are devices that need are part of the architecture core the need
to be initialized prior to devices that are integrated around a core
to make up a complete SOC. Namely the interrupt controller in the SOC
must be configured in order to allow the integrated IP blocks drivers
to initialize correctly.
Change-Id: I0a91e08f98516a7b7dd402ffc6494a071f1326b2
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
This macro is legacy from an early implementation of the init system
before the pure level was split into early and late phases remove it
now to avoid confusion going forward.
Change-Id: I6720874c840c9e14888fd6f411a8182e7420ca29
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
[DL: changed mapping, and to set GPIO directions.]
Change-Id: I4153c5565b341215998645377eaad0d91da4febf
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
From old build system -DPERF_OPT was set with no optimisation, that
was buggy and did not function as expected with new Makefiles.
Change-Id: I21ebbe0e9314d0a25cb53c6455ff244252e44af0
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Dependency on ia32_pci here is wrong, also simplify the variable
handling and logic.
Change-Id: I535e25e12283c288250b23327b2a8f698da31341
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Those ports uses different instructions to get accessed: in/out
instructions. It differs in many ways with memory access, and it's much
slower. It's unset by default, but some arch exposing legacy UART ports
might need it.
Change-Id: I06f2a7c7812e720863957bd20d5c2b8b02c10734
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Avoid adding platform data to defconfig directly and instead
use Kconfig. This will allow overrides.
Change-Id: I95984cb691e8a796ff14b92c6985fceccb0b9cad
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The default values for the platform will be used when running
make *_defconfig instead of hardcoding them in the defconfig directly.
Change-Id: If2945cc11cfca787c2b93a96b502650f1dddd29d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This makes variables readable and consistent with other drivers
we have.
Change-Id: I816f133279497eafd5d5614013c8d224d5909590
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This driver naming is an exception which compared with all other drivers
we have. To keep things consistent the configuration options and variables
are renamed to <type>_<name>.
Change-Id: Ib95aa09630a507848f78d8f2c28706b545eed06d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
On Galileo, there are additional GPIO pins on the legacy bridge.
This adds the config options to enable the driver for those GPIOs,
using the MMIO-based GPIO driver.
Change-Id: I0014018238a40577631bafbdf55ed0c6c0886194
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There are 3x PCAL9535A GPIO chips on Galileo gen2 board.
This enables the driver for all of them.
Change-Id: Ie4d1aec9427e159a60322caac541b75e7ef973db
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Rename system.c and platform_config.c files in preparation for merging the ia32
based platforms to remove code duplication.
Change-Id: I88caf5294817e06c235379e92cd8ee7472e88028
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Change the IOAPIC driver to be initialized directly from the init
system. The function signature of _ioapic_init() function is updated
accordingly.
Change-Id: I2f824ac745926966eebb23f60445a41e1df9eb8f
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Change the LOAPIC driver to be initialized directly from the init
system. The function signature of _loapic_init() function is updated
accordingly.
Change-Id: I5ed26d53524c8526d413a05ac9a7a58dd4264c5a
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Change the PIC driver to be initialized by the init system. To be
initialized by the init system the function signature of the
_i8259_init() function needs to be changed to the standard *_init()
function signature specified by the device model.
Change-Id: I63bf1cd0ce78920fa20da94f5966e5aab4bf41b2
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
The code fragment to bind the instances of the I2C driver is not
platform specific but is driver specific.
All the information required to bind a driver instance comes from
CONFIG_ variables. Having the binding code with the driver code
avoids duplicating the code fragments in each platform where the
driver may be used.
Change-Id: I9ea132c9340437ccb292bb8f3fa3d3a2b2a794db
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
The code fragment to bind the instances of the SPI driveri is not
platform specific but is driver specific.
All the information required to bind a driver instance comes from
CONFIG_ variables. Having the binding code with the driver code
avoids duplicating the code fragments in each platform where the
driver may be used.
Change-Id: Iff40227e3e25d431ae870d585445971f35d934dd
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
The code fragment to bind the instances of the GPIO driver were being
replicated in every platform_config.c This code is not platform
specific but is driver specific.
All the information required to bind a driver instance comes from
CONFIG_ variables. Having the binding code with the driver code
avoids duplicating the code fragments in each platform where the
driver may be used.
Change-Id: Ie07a3d12d25201e82ce7074455e6c036f463851b
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
