We renamed ztest's assert to zassert and the crc test case wasn't
updated to match so it doesn't build.
Change-Id: I67cd5bb6eef0875f31b8825d5c3aa5e1fa46af04
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add soc_gpio_get(), soc_gpio_debounce_length_set() functions to Atmel
SAM soc_gpio driver.
Change-Id: I541c6fead9a308dd2e67c59dabe67b87cf1628ef
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Added serial (UART) driver for Atmel SAM MCU family.
Note:
- Error handling is not implemented
- The driver works only in polling mode, interrupt mode is
not implemented.
Tested on Atmel SMART SAM E70 Xplained board
Origin: Original
Jira: ZEP-1959
Change-Id: I3e770fd1feb2ddf92cf405a9aa17be92eb32e19b
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Added I2C bus (TWIHS) driver for Atmel SAM MCU family. Only
I2C Master Mode with 7 bit addressing is currently supported.
Tested on Atmel SMART SAM E70 Xplained board
Origin: Original
Jira: ZEP-1866
Change-Id: Ic5aa7b6b21295feccae883d580b38bbeaf2ce291
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Add plumbing to build system and SoC level dtsi for the NRF52832 SoC.
We additionally add the necessary yaml files for the UART on the NRF52
SoCs.
Change-Id: I3b4a821b2993827e33d8e84bdbbc759d1521f8bd
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
CONFIG_BOARD was set to arduino_101_ble instead of curie_ble. Fix this
so the BOARD_NAME, BOARD, board dir, all are in sync.
Change-Id: I5f2a4f1aeec7c20f042e11b96e1c87883ad4df4b
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce SoC specific config options similar to what exists on NRF51,
this is mostly to help distinguish between SRAM & Flash sizes on
different variants.
Also deleted some unnecessary setting of CONFIG_SOC_NRF528{32,40} in the
board defconfig files.
Change-Id: I3aaedf0c15423ae12636f87b8e6a39070cbb2c6f
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Most boards enable a serial driver by default, but the hexiwear_kw40z
does not because it uses Segger RTT for the console. This sample
requires a serial driver, so add CONFIG_SERIAL=y to its project conf
file.
Jira: ZEP-1391
Change-Id: Iee813d1054378040fe9ff72a3ca1ea7bd66bcdfe
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds initial support and documentation for the kw40z on the hexiwear
board.
Jira: ZEP-1391
Change-Id: Idb58bfb3c2951b1f737a8c547860bde4ef4d9a3e
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds initial support for the kw40z SoC. This SoC has all the same
peripherals as the kw41z but with less flash and ram, so the defconfig
and dts are nearly the same.
Jira: ZEP-1388
Change-Id: Ib804451e8c2c71c4ff7d342bf23f6567d1542a2d
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Reuses the kw41z clock driver for kw40z via preprocessor includes.
Copies the kw41z fsl_device_registers.h to kw40z and subset devices with
minor modifications for each device.
Jira: ZEP-1388
Change-Id: Ifae16eb9b7e7d18fc13c22dc51887fc1d8a5e21d
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Imports device header files for the kw40z and its subset devices (kw30z,
kw20z) from the Kinetis SDK 1.3. The kw40z has all the same peripherals
as the kw41z but less flash and ram, therefore we can use the MCUXpresso
SDK 2.x drivers for kw41z with the KSDK device header files for the
kw40z.
Origin: https://www.nxp.com/webapp/Download?colCode=KW40Z-CONNECTIVITY-SOFTWARE&appType=license&Parent_
Maintained-by: External
Jira: ZEP-1388
Change-Id: I30b283a0c9dd4f88b8c21c03814dcdff76b684c4
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The MKL25Z soc do not support irqs in PORTB, PORTC and PORTE.
This is a patch to not enable irq if such ports are enabled.
Change-Id: I7b0b308504fcea47714fee8f2913baf336c4aa7d
Signed-off-by: Gustavo Denardin <gustavo.denardin@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The KL2x support requires DTS so we can remove any !HAS_DTS references.
Also NUM_IRQS shouldn't have been in a !HAS_DTS ifdef block.
Change-Id: I12b0781b6eef100bfb0a94698d12fc519c759888
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Since all STM32 SoCs are using device tree we can remove this last bit
of !HAS_DTS for getting flash/sram sizes from Kconfig.
Change-Id: I9e706b7aba7c0edcf9fca3ddc0ddc7d820980b47
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that all STM32 platforms are using device tree we can remove the
handling for !HAS_DTS from the serial driver.
Change-Id: Ifafc283f2509dd9a438f321e0b647720d4f13810
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Converted over all STM32F3 based boards to use device tree and removed
associated bits that now come from the device tree for STM32F3.
Boards that are now using devicetree:
* Nucleo f334r8
* STM32373C Eval
Change-Id: I081a1d83f86e417a98b6864c745354b6b32953b7
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Converted over all STM32F1 based boards to use device tree and removed
associated bits that now come from the device tree for STM32F1. Also
renamed the STM32F10{3,7} SoC dtsi to try and make it clear that the 'X'
is a place holder. Fixedup the top level compatiables in the boards to
be the specific 'X' instead of the generic one.
Boards that are now using devicetree:
* Nucleo f103rb
* STM3210C Eval
* STM32 MINI A15
Change-Id: I29b3634ec7451f974687d55980414efa655e2e96
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Converted over all STM32F4 based boards to use device tree and removed
associated bits that now come from the device tree for STM32F4.
Boards that are now using devicetree:
* 96b_carbon
* nucleo f401re
* nucleo f411re
Change-Id: Ibe197ca0a3f5ad78d594485a578d986403cc824a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Since all the L4 SoCs are using DTS we can remove the various Kconfig
bits that we now get from DTS.
Change-Id: Icdec49b478ff285dc3347b09412964a721f75bbf
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Updated st/mem.h to support the following SoCs:
CONFIG_SOC_STM32F303XC
CONFIG_SOC_STM32F407XX
CONFIG_SOC_STM32F429XX
Change-Id: I1654c1fd8dc0d1eb471c092777a8fd262465dc51
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce a __SIZE_K macro to make things a bit more human readable.
Also fixed up sizes for CONFIG_SOC_STM32F411XE.
Change-Id: I01b8b5f627ad949c2af01ee966428bfabe09e2ee
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that all NXP MCUX platforms are using device tree we can remove the
handling for !HAS_DTS from the serial drivers.
Change-Id: I05185142afa7fae83ce68de954202829868af88f
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Wrong base address has been provided to I2C_2 instance.
Fix this issue for proper behavior
Change-Id: I81e5cb71a5136e742f460db5db39b2adf2f10f2d
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to suppport the FRDM-KL25Z board,
it is necessary to make this soc available.
Change-Id: Id93a51dcc9ef58118e27db02c30f662eb73d5adb
Signed-off-by: Gustavo Denardin <gustavo.denardin@gmail.com>
This commits provides dts files for non ST, STM32 based boards.
Change-Id: Ib324ba418fb27ddbce45a60fbe8e73c7b6896aa4
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit provides dts file for nucleo boards.
For now dtsi files only populates uart nodes so other nodes
are not taken into account into board dts files.
Change-Id: Ide95a8ba3671b91ff0311b7671e77b3bf96db297
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit provides dtsi files for available stm32 base boards.
For now only uart nodes and IRQ number are provided in order to
enable delivery of coherent material.
It also clears additional content from stm32f103xb.dtsi
Change-Id: I62d932c7f22b56e95bcd9566ce39e14a393dd640
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
As there can be a large number of FLASH & SRAM sizes for the same SoC
having a dts/dtsi for each one would be extremely painful. Lets just
use some #defines to set that FLASH & SRAM sizes based on the SoC that
is being built.
Change-Id: I06388ada4e49ed3d576da31150288512bb6b4485
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
I2C_SHARED_IRQ, I2C_0_IRQ_SHARED, I2C_0_IRQ_DIRECT Kconfig options
are DW driver specific. Its presence is confusing for a user of any
other I2C driver than DW. This patch renames these options to include
DW string and makes it visible only for DW I2C driver. This is a
similar implementation to that used by ETH DW Ethernet driver.
Change-Id: I795506f9b103c028a22317df9ad632dce5cd1343
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
By default a factory new SAM E70 chip will boot SAM-BA boot loader located in
the ROM, not the flashed image. This is determined by the value of GPNVM1
(General-Purpose NVM bit 1). Updated flash procedure will ensure that GPNVM1
is set to 1 changing the default behavior to boot from Flash.
Change-Id: Ic6334c9d4743a7665fc944e8f49fc1467ecda40d
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This patch modifies the DTS file to make the inclusion of the
bluetooth UART port conditional on CONFIG_BLUETOOTH option.
Issue: ZEP-1745
Change-Id: Iea8dc60fe17d131d8e3765e1962b25d157065c67
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add support for nRF5x series GPIOTE based PWM driver
implementation.
Provides upto 3 pins/channels using one HF timer, two PPI
channels per pin, and one GPIOTE config per pin.
Change-id: I6056b199ec2cff595ba8fea9f659a0338ed4635b
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
sys_slist_merge_slist shall reinit the appended list not the original.
Change-Id: Iacd5244d0243b7ebdb110991574e9e1d265ced14
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
Correct the way interrupts are enabled and disabled using the INTENSET
and INTENCLR registers, which ignore all 0s written to them and are both
positive registers.
Change-Id: I052548b0255d9d5ae36b2a708ed1968ae3ab1d06
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Add openocd.cfg to control flashing and debugging of the
olimexino-stm32 board
Change-Id: Ia40d964b737792864efd85076bc599b2de15ebb0
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
The CONFIG_FLASH_LOAD_OFFSET allows the zephyr image to be placed at
an offset from the start of flash. This is useful for situations,
such as with a bootloader, to allow the image to not occupy the very
beginning of flash.
Complement this by adding a CONFIG_FLASH_LOAD_SIZE config, that can
constrain the size of the flash image. With the default of zero, the
behavior is as before, with the image allowed to occupy the rest of
the flash. It can also be defined to a non-zero value which will
constrain the image to occupy that many bytes of flash.
Although this is defined generally, it is currently only supported on
cortex-m targets.
Change-Id: I6e4a0e79c8459f931cd4757c932d20dac740f5f6
Signed-off-by: David Brown <david.brown@linaro.org>
Instead of FLASH_LOAD_OFFSET being something specific to cortex-m, add
it generally to misc/Kconfig, along with a hidden config
HAS_LOAD_OFFSET which can be selected by the architectures as they add
support for the functionality.
Change-Id: I256ff8cf4e9b8493b26354c3b93fe1f7017d4887
Signed-off-by: David Brown <david.brown@linaro.org>
The schematics of the BBC micro:bit are hard to find, and its official
web-site doesn't document the mapping of the edge connector pins
numbers the nRF51 GPIO pin numbers. Provide helpful defines for this
in the board.h file.
Change-Id: I52ce1d61558703b6aa5a5d073ccd222f27fa8760
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
