Use ready-made utility function which can take care of endianness
Change-Id: I1edd0b2ce1a086dd637e97308145f9b434e48a1f
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This patch adds support for reading MAC address from I2C EEPROM.
Only chips with 7-bit I2C device address are supported.
Change-Id: Ibedc33e54e33bdb901840e104063e2f4752b9123
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Otherwise they are send as is and stripped by tunslip6, resulting in
malformed packets.
Jira: ZEP-2037
Change-Id: I1267b9ac956f3cd7aa3456ce20447ef97281d7a8
Signed-off-by: Ruslan Mstoi <ruslan.mstoi@intel.com>
When connect to diffrent router with the same gateway ip address,
need to clear arp cache when disable interface,
or it will use the wrong gateway mac address.
Call net_arp_clear_cache function replace to set arp_table 0.
Change-Id: Ib403a0c0030832ba48824db4d2d3fcb8add63d16
Signed-off-by: june li <junelizh@foxmail.com>
Add initial .shippable.yml for CI integration on github and related
scripts.
Change-Id: I095d125e780bba980e635e218205c8741e753a8e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The build process of the host tools requires fixdep, when prebuilt host
tools are enabled and no host-tools are available (i.e. after a 'make
mrproper'), the build would fail because of the dependency. So make sure
we point to the in tree fixdep binary when building.
Change-Id: I8311f870d90b32ba56c821bb8533379f57003a8d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Sphinx has a builder option that we can use to check links
(invoked with '$ make linkcheck' in the /doc folder)
Add some configuration tweaks to conf.py, and update the
Makefile to also use the nitpick (-n) option to Sphinx
if this linkcheck build option is selected (does much more
checking of internal references)
Change-Id: Ib413bc8d4195c72f1a8a4c345a5a722f88fad8b8
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
fixed using a :ref: instead of a hard link as well
Change-Id: I383ef137934f0c616b9a98159980b954ca1b8871
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
This was more or less transplanted from old Viper codebase (Zephyr's
ancestor which supported paging) and adapted to current coding style.
Change-Id: I203e631f1dcd5f2fb4e9a2fa9339fc7521c7962d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Don't busy-wait in uart_stm32_fifo_fill(), this routine is supposed
to be called on IRQ, and the waiting loop was shown to interfere
with interrupt-driven UART handling.
The original problem mentioned in the patch being reverted ("it is
possible to evaluate the TXE bit *before* H/W has had the
opportunity to detect that data is being processed") may still
exist and may require handling in a different way. The most obvious
way is to replace "while" loop with "if", because STM32 doesn't
have multi-level FIFO anyway. But I was dissuaded to include such a
change as part of this patch, so it's left for future analysis.
This reverts commit 49c2858d94.
Change-Id: Ib27b53ba3a29b84c1a2dccff6d33f4118680cc19
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
In tickless kernel mode, time parameter of _sys_soc_suspend is in
milliseconds. Based on the kernel mode use the correct
mulitplier to convert to seconds.
Jira:1821
Change-Id: Idf156f56ece79a82729ebb124d1552a5eeb69e25
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Adds changes to enable existing kernel and timer tests and samples to
be used to test the tickless kernel feature.
Updated samples/philosophers and tests/kernel/timer/timer_api apps
Run the tests using following commands
make pristine && make BOARD=<board> CONF_FILE=prj_tickless.conf qemu
Board could be any of the following
qemu_x86
quark_se_c1000_devboard
Jira: ZEP-339 ZEP-1812
Change-Id: I1530b19b79ddeb0e2181594caf15f3ac28ff51f4
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Add tickless kernel support. Sets timer always in one
shot mode to the time the kernel scheduler needs the
next timer event. Uses mili seconds as the scheduling
time unit.
Jira: ZEP-1817
Change-Id: Ia2e63711cdd9d7d9c241b9ff08a606aa79575012
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Add tickless kernel support. Sets timer always in one
shot mode to the time the kernel scheduler needs the
next timer event. Uses mili seconds as the scheduling
time unit.
Jira: ZEP-1818
Change-Id: I21ce037b571c4c6ff588033a15aa49624cba7a57
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Add tickless kernel support. Sets timer always in one
shot mode to the time the kerneel scheduler needs the
next timer event. Uses mili seconds as the scheduling
time unit.
Jira: ZEP-1816
Change-Id: I85232b572759b9653c6396edc057ff4409525c97
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Update the timer to use the tickless kernel interface
provided by kernel to operate in event based mode. In
this mode, the timer would not generate periodic ticks
and would only be programmed in one shot mode. It would
announce elapsed time in wall time units instead of
ticks. Timer can also be disabled enabling waiting
forever for a non-timer event.
Jira: ZEP-1812
Change-Id: I13110b9fb53b33a9244cc91a3d991f8452d330b1
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Adds event based scheduling logic to the kernel. Updates
management of timeouts, timers, idling etc. based on
time tracked at events rather than periodic ticks. Provides
interfaces for timers to announce and get next timer expiry
based on kernel scheduling decisions involving time slicing
of threads, timeouts and idling. Uses wall time units instead
of ticks in all scheduling activities.
The implementation involves changes in the following areas
1. Management of time in wall units like ms/us instead of ticks
The existing implementation already had an option to configure
number of ticks in a second. The new implementation builds on
top of that feature and provides option to set the size of the
scheduling granurality to mili seconds or micro seconds. This
allows most of the current implementation to be reused. Due to
this re-use and co-existence with tick based kernel, the names
of variables may contain the word "tick". However, in the
tickless kernel implementation, it represents the currently
configured time unit, which would be be mili seconds or
micro seconds. The APIs that take time as a parameter are not
impacted and they continue to pass time in mili seconds.
2. Timers would not be programmed in periodic mode
generating ticks. Instead they would be programmed in one
shot mode to generate events at the time the kernel scheduler
needs to gain control for its scheduling activities like
timers, timeouts, time slicing, idling etc.
3. The scheduler provides interfaces that the timer drivers
use to announce elapsed time and get the next time the scheduler
needs a timer event. It is possible that the scheduler may not
need another timer event, in which case the system would wait
for a non-timer event to wake it up if it is idling.
4. New APIs are defined to be implemented by timer drivers. Also
they need to handler timer events differently. These changes
have been done in the HPET timer driver. In future other timers
that support tickles kernel should implement these APIs as well.
These APIs are to re-program the timer, update and announce
elapsed time.
5. Philosopher and timer_api applications have been enabled to
test tickless kernel. Separate configuration files are created
which define the necessary CONFIG flags. Run these apps using
following command
make pristine && make BOARD=qemu_x86 CONF_FILE=prj_tickless.conf qemu
Jira: ZEP-339 ZEP-1946 ZEP-948
Change-Id: I7d950c31bf1ff929a9066fad42c2f0559a2e5983
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Future tickless kernel patches would be inserting some
code before call to Swap. To enable this it will create
a mcro named as the current _Swap which would call first
the tickless kernel code and then call the real __swap()
Jira: ZEP-339
Change-Id: Id778bfcee4f88982c958fcf22d7f04deb4bd572f
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Scheduler needs to do time slicing only if there are multiple threads
active with the same priority. This function checks if the list has
more than one node. This would be used to check the list containing
threads with same priority for multiple nodes.
Jira: ZEP-339
Change-Id: I8c7daf77a6540c642ce58a3763b26cd1e06ddc30
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Sys log already break a line after each line, by default, so removing
the '\n' on log messages.
Enabling support for sys log colors.
Change-Id: Ica3a601aba0bbbd2d9438b41fb7bca0aad9c05f4
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Don't return without freeing the session when relevant.
Change-Id: I9e5903791f8eb54026c4bb2ddda9f1fe9f3f7bb3
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
If setting up crypto context fails enough times, the sessions will all
end up "in use" though they will not. This will lock tc shim driver
altogether and no crypto context will be possible to run on it.
Change-Id: I72346854e52294f96afc32f30ac5bfd0c368812b
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Thus it is possible to reduce or raise such amount relevantly if
required.
Change-Id: Ib53131e10e69fcbf1bcd9d844703d5b8832ee224
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
All existing log entries add a line break, so let's just use the sys_log
way.
Change-Id: Ia94efa593700e9590e16b51262f0b5a2fe10ffa2
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
There is no need of 2 level status reporting, returned code from
synchronous call or the status code in the async callback should be
enough to tell why it did not work.
And this attribute is anyway unused anywhere.
This helps to save 4 bytes, in total, out of struct cipher_pkt.
(3 bytes were lurking around as the status attribute was only 1 byte).
Change-Id: Iadfe20d6b84d57d86683bc86203ce2ed50e40461
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
As everywhere else in drivers, domain of driver should be used as name
prefix.
Change-Id: I1bb2284495c7a6b2648395b757a5f912e4410b15
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
As it is a crypto driver, let's prefix all options with CRYPTO_ as it is
done everywhere else.
Change-Id: I1eccbf655417664a1f031a221081b0b1db673394
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
- help message should have same intendation on a specific file
- No need of "depends on" if it's already in a relevant if/endif
- either prompt is used, or not, but let's not mix.
Change-Id: Ib75f25dcf2440fd0ba7bde5c95bc1fbece68be07
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Currently running "make V=1 flash/debug" does not result in the caller
discovering what commands are run to perform the action because make
calls into an opaque script (which then makes complex invokations of
both openocd and gdb). Make the script more transparent by conditionally
enabling enabling tracing within the script.
We also remove the "Done flashing" message. It is pointless because
openocd has already *told* us it has done flashing ["wrote 16384 bytes
from file .../zephyr.elf in 0.802135s (19.947 KiB/s)"]. It is also
potentially misleading since it tells us we are "Done flashing" even
when we failed to flash anything which risks misleading someone
unfamiliar with openocd.
Change-Id: Icaea28c4b00ac10965726dd4502162b7de080953
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Generate a test report using junit/xunit format with all details and
logs that can be published on the web to show results from a sanitycheck
run.
Output is stored in scripts/sanity_chk/ alongside the CSV file.
Change-Id: I5ea6f409c1f86f408eeae870b90a953e71046da9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
console_getchar() returns a u8_t so we need to include the definition
of that to avoid compilation errors.
Change-Id: I1f16ce7942c90555463417e23a60eaa34cb091f4
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Found out that the SAM3 series is not a single series. There are actully
3 different series, 3U, 3A, and 3X.
Origin: Original
Jira: ZEP-2067
Change-Id: I61cdc826cc32dbdd25b5e6bafaada062c8ae8417
Signed-off-by: Justin Watson <jwatson5@gmail.com>
Typo in :ref:`hello_world` (regular quote vs. back tick)
Change-Id: I77853f85b9c71751307ef105b6babcb0cfbc9060
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Incorrect quoting left a :option: inline tag in the generated output
Change-Id: Iab2e4be692e138cf01f1cc276e830b2cb0e41b03
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Historically, space for struct k_thread was always carved out of the
thread's stack region. However, we want more control on where this data
will reside; in memory protection scenarios the stack may only be used
for actual stack data and nothing else.
On some platforms (particularly ARM), including kernel_arch_data.h from
the toplevel kernel.h exposes intractable circular dependency issues.
We create a new per-arch header "kernel_arch_thread.h" with very limited
scope; it only defines the three data structures necessary to instantiate
the arch-specific bits of a struct k_thread.
Change-Id: I3a55b4ed4270512e58cf671f327bb033ad7f4a4f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Moved the Atmel SAM 3 from its own directory into
the directory tree laid out in arch/arm/soc/atmel_sam.
Origin: Original
Jira: ZEP-2067
Change-Id: I26a1a521dd7caa607c3e95a06cd574ee68ca59b8
Signed-off-by: Justin Watson <jwatson5@gmail.com>
This SoC, in its default configuration, does not have any SW IRQ below
the EXCM level. This make it unsuitable to use irq_offload() and thus
almost untestable.
Decision was made to remove this configuration in favorof custom one
XRC_D2PM_5swIrq, which is the same core but with additional 4 SW IRQs
of level 1 and an additional timer.
Issue: ZEP-2029
Change-Id: Iee4f8346aa9d610e14898444f78d28ef0ac4cef2
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
Install gitlint using pip:
# pip install gitlint
# gitlint install-hook
This will install the pre-commit hook.
Policies are define in .gitlint. Custom rules are available under
scripts/gitlint.
This script will also run in CI, so avoid CI errors by using the hook
above.
Change-Id: I62750a1fd9369341db29c413a6c4a1677bb0db8a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
To speed up builds, this change allows building the needed host tools
that are built for every application and stores them un
${ZEPHYR_BASE}/bin.
Run 'make host-tools' and then define PREBUILT_HOST_TOOLS to reuse the
host tools across multiple builds.
$ make host-tools
HOSTCC scripts/basic/fixdep
HOSTCC scripts/gen_idt/version.o
HOSTCC scripts/gen_idt/gen_idt.o
HOSTLD scripts/gen_idt/gen_idt
HOSTCC scripts/gen_offset_header/gen_offset_header.o
HOSTLD scripts/gen_offset_header/gen_offset_header
HOSTCC scripts/kconfig/conf.o
SHIPPED scripts/kconfig/zconf.tab.c
SHIPPED scripts/kconfig/zconf.lex.c
SHIPPED scripts/kconfig/zconf.hash.c
HOSTCC scripts/kconfig/zconf.tab.o
HOSTLD scripts/kconfig/conf
$ export PREBUILT_HOST_TOOLS=${ZEPHYR_BASE}/bin
$ make -C samples/hello_world
Now you will notice a speedup when building the application!
Change-Id: Ie0aeee7f9a60b1fd49e7e32d78601f03473d73b8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.
Change-Id: I9ccb7c01a7d8c4ad8b1e55a1b45622aad2a57e57
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch contains a MPU test with a set of options to check
the correct MPU configuration against the following security
issues:
* Read at an address that is reserved in the memory map.
* Write into the boot Flash/ROM.
* Run code located in SRAM.
The MPU test application uses the Zephyr shell.
Change-Id: Ib40dc76b082b800884fd636a1509a0712227d681
Signed-off-by: Marc Moreno <marc.morenoberengue@linaro.org>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch adds MPU support to the ST nucleo_f411re board based on
STM32F401XE.
Change-Id: I43aae0930ccabe234fcb34216518b568a855a1be
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch adds MPU support to the ST nucleo_f401re board based on
STM32F401XE.
Change-Id: I5e8042c1f964827980b974a565a4d4666eeccf3b
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
