Render test settings more generic regarding clock options, in order
to better support new devices. Add ESP32-H2 testcase to rtc_clk suite.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Add tests based on QSPI command register, this is the entry point even
before we test nRF70 internal memories.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Some SoCs might not have any VDD reference available.
Use internal 1.2V reference derived from VDD in this case.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Refactor the default RAM memory map on nrf54h20dk:
Removes use of "nordic,owned-memory" which is no longer needed on
nrf54h20. Reserved memory nodes that were under "nordic,owned-memory"
have been moved directly under reserved-memory.
The memory shared between cpuapp-cpusec and cpurad-cpusec in RAM0x
is no longer used with IronSide, since IPC buffers toward the secure
domain are at new fixed locations. The cpuapp_data region
has been expanded to fill the available space in RAM0x when removing
these shared memory regions.
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
This replaces the legacy SDFW compatible board configuration with the
IronSide SE compatible one, thus removing support for running samples
and tests on nRF54H20 devices with the old firmware.
All applications are expected to work on `nrf54h20dk/nrf54h20/cpuapp`
out of the box. For other board targets, all applications are expected
to boot, but may require additional peripheral configuration in UICR.
Build system support for the new UICR format is to be added separately.
Co-authored-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Update this multi-core test to always run the `main` and `remote` images
on cpuapp and cpurad respectively.
This is to prepare the test for running with IronSide SE, in which case
keeping cpurad as the main board target wouldn't make as much sense,
because cpurad would have to be started by cpuapp.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Extends support and adds new overlays.
Signed-off-by: Karol Lasończyk <karol.lasonczyk@nordicsemi.no>
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Disable testing second QDEC instance until the issue with multiple
QDEC instances support is resolved
Signed-off-by: Bartosz Miller <bartosz.miller@nordicsemi.no>
Instead of using 32 bit enum values for event numbers, convert
the code to use 64 bit long bit fields. This means that the
user API is changed to use 64 bit event values instead of 32
bit event values.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
Add a new test suite for the Renesas ELC driver.
Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Add nRF specific test to check if it possible for multiple users
to enable XIP independently and also if XIP can be successfully
re-enabled (see fb1d0785ae).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Current ESP32 clock system is mixed with RTC labeling/registers,
but it doesn't implement a real-time clock (RTC) driver.
To avoid confusion and allow adding a proper RTC driver later,
this commit renames the existing RTC interface to CLOCK and make
it as a subsystem without any peripheral attached to it.
This better reflects its actual purpose as a general clock controller.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Frame rate selected by the user may not be obtained due to
PCLK frequency and finite number of clock divider values.
In such case, driver shall select divider that results in
frame clock rate closest to the requested value.
There was a bug that was discarding perfect match divider.
Add test which confirms correct clock divider selection.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Port SYS_INIT to use soc_early_init_hook as SYS_INITs are legacy.
Due to moving dmm_init() from PRE_KERNEL_1 SYS_INIT to
soc_early_init_hook(), the DMM test is also updated to ensure that
its setup function runs before dmm_init().
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
Moved index of analog input used in test from source
code to Kconfig option to simplify adding new targets.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
Disables test logging defaults for the intel_adsp/ssp as it
has been found that when they are enabled they interfere
with the proper functioning of the test.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Improves error reporting in the intel_adsp/ssp test so that
errors are caught and flagged by the test infrastructure.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Add a dedicated "build_all" test for the NEORV32 and its peripheral
drivers. These drivers depend on the NEORV32 SYSINFO (syscon) and thus
cannot easily be built for non-NEORV32 board targets.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Add ULP Coprocessor board support for C6.
This requires a change in the board qualifier depending on the build
target.
Update esp32c6 overlay and configuration files to the proper name.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Add some overlay files for the silabs xg29_rb4412a board to enable tests
on the board. Also add the platform to some testcase.yaml files.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Extend test code with scenario that checks if:
- RESET_CPU_LOCKUP is detected;
- RESET_CPU_LOCKUP can be cleared.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
