Commit graph

15409 commits

Author SHA1 Message Date
Alexander Vasiliev
6caf76346a net: mqtt-sn: Add a function to get topic name by topic ID
Add a function to MQTT-SN library API to get topic name by ID
from the internal topics list.

Signed-off-by: Alexander Vasiliev <alexander.vasiliev@siemens.com>
2023-11-22 09:53:33 +01:00
Fabio Baltieri
f9ed74e0d5 input: gpio_kbd_matrix: add 16 bit rows support
Add a Kconfig option to extend the row type to 16 bits, allowing the
library to handle a 16 row matrix.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-11-22 09:52:39 +01:00
Fabio Baltieri
adcb2f580c input: gpio_kbd_matrix: define a type for the row data
Add a typedef for the row type rather than using uint8_t directly, this
allow supporting bigger matrix as an option by using a different type.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-11-22 09:52:39 +01:00
Ibe Van de Veire
1d0f47b005 net: ip: igmp: add igmpv3 support
Added igmpv3 support based on the already existing structure for igmpv2.
The already existing api is not modified to prevent breaking exisiting
applications.

Signed-off-by: Ibe Van de Veire <ibe.vandeveire@basalte.be>
2023-11-21 15:50:31 +01:00
Flavio Ceolin
8679c58644 kernel: Option to not use tls to get current thread
Add a Kconfig option to tell whether or not using thread
local storage to store current thread.

The function using it can be called from ISR and using
TLS variables in this context may (should ???) not be
allowed

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2023-11-21 15:49:48 +01:00
Flavio Ceolin
1247f8465c xtensa: userspace: Supports tls on userspace
Use thread local storage to check whether or not a thread is running
in user mode. This allows to use threadptr to properly support tls.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2023-11-21 15:49:48 +01:00
Daniel Leung
6252fcfccf xtensa: userspace: simplify syscall helper
Consolidate all syscall helpers into one functions.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-11-21 15:49:48 +01:00
Daniel Leung
81ea43692c xtensa: mmu: send IPI to invalidate TLBs on other CPUs
After changing content of page table(s), it is needed to notify
the other CPUs that the page table(s) have been changed so they
can do the necessary steps to use the updated version. Note that
the actual way to send IPI is SoC specific as Xtensa does not
have a common way to do this at the moment.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-11-21 15:49:48 +01:00
Daniel Leung
eb546a8d87 xtensa: rework kernel oops exception path
When kernel OOPS is raised, we need to actually go through
the process of terminating the offending thread, instead of
simply printing the stack and continue running. This change
employs similar mechanism to xtensa_arch_except() to use
illegal instruction to raise hardware exception, and going
through the fatal exception path.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2023-11-21 15:49:48 +01:00
Flavio Ceolin
586bb92049 xtensa: userspace: Add syscall for user exception
Trigger exception on Xtensa requires kernel privileges. Add
a new syscall that is used when ARCH_EXCEPT is invoked from userspace.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2023-11-21 15:49:48 +01:00
Flavio Ceolin
c53325298d xtensa: userspace: Stack object header
Add a header with architecture specific macros and
definitions that re used on userspace for stack
objects.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2023-11-21 15:49:48 +01:00
Flavio Ceolin
a651862b30 xtensa: Enable userspace
Userspace support for Xtensa architecture using Xtensa MMU.

Some considerations:

- Syscalls are not inline functions like in other architectures because
  some compiler issues when using multiple registers to pass parameters
  to the syscall. So here we have a function call so we can use
  registers as we need.
- TLS is not supported by xcc in xtensa and reading PS register is
  a privileged instruction. So, we have to use threadptr to know if a
  thread is an user mode thread.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-11-21 15:49:48 +01:00
Flavio Ceolin
fff91cb542 xtensa: mmu: Simplify initialization
Simplify the logic around xtensa_mmu_init.

- Do not have a different path to init part of kernel
- Call xtensa_mmu_init from C

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2023-11-21 15:49:48 +01:00
Daniel Leung
5b9605a6a2 xtensa: mmu: implement cached/uncached ptr funcs if !RPO_CACHE
This implements the following functions when
CONFIG_XTENSA_RPO_CACHE is false:

  * arch_xtensa_is_ptr_cached() returns false
  * arch_xtensa_is_ptr_uncached() returns false
  * arch_xtensa_cached_ptr() returns unmodified pointer
  * arch_xtensa_uncached_ptr() returns unmodified pointer

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-11-21 15:49:48 +01:00
Alexander Leris
7d63942c31 doc: logging: Fix some grammar issues
Fixes some grammar issues in the documentation.

Signed-off-by: Alexander Leris <alexander.leris@gmail.com>
2023-11-21 14:21:35 +01:00
Andrzej Głąbek
7a9ff701d4 drivers: pinctrl_nrf: Fix pin drive configuration
With the introduction of nrfx 3.0.0, values of `nrf_gpio_pin_drive_t`
constants may be defined differently, depending on the SoC family.
Since the nrf-pinctrl.h file is included also from dts files, it is
not possible to use there different definitions of `NRF_GPIO_PIN_*`
values based on Kconfig symbols that indicate given SoC family (as
Kconfig is processed after devicetree) so that those values could
still match `nrf_gpio_pin_drive_t` constants.
To solve this problem, the pinctrl_nrf driver now uses a lookup table
for mapping `NRF_GPIO_PIN_*` indexes to drive configuration values
required by the GPIO HAL.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-11-21 13:12:26 +01:00
Robert Lubos
16fd744c13 net: pkt: Add function for allocating buffers w/o preconditions
Add new function to allocate additional buffers for net_pkt, w/o any
additional preconditions/checks. Just allocate what was requested.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2023-11-21 08:46:45 +00:00
Abderrahmane Jarmouni
236ba6bf5a dt-bindings: clock: Add STM32U5A9 clk sel helpers
Add clock selection helpers specific to STM32U59x/5Ax &
STM32U5Fx/5Gx SoCs

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2023-11-21 08:44:34 +00:00
Daniel Leung
9c90ed6f61 mm: polish doxygen doc on memory banks driver APIs
() Put the memory bank APIs under the memory management group.
() Document the struct sys_mm_drv_bank.
() Put proper in,out for function parameters.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-11-21 08:42:01 +00:00
Daniel Leung
9a6e32f87c mm: rename struct mem_drv_bank to sys_mm_drv_bank
Simply to put them into correct namespace as the struct is
part of public API.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-11-21 08:42:01 +00:00
Daniel Leung
ca1aae6183 mm: intel_adsp_mtl_tlb: move SRAM_BANK_PAGE_NUM in driver
The macro SRAM_BANK_PAGE_NUM is specfic to the mtl_tlb
driver and is not universal. So move that from public
header into the driver.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-11-21 08:42:01 +00:00
Daniel Leung
8021cde6de mm: polish doxygen on memory management driver APIs
Makes the HTML document on the MM driver APIs a bit more easier
to navigate (hopefully).

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-11-21 08:42:01 +00:00
Emil Gydesen
1829cf4324 Bluetooth: Audio: Add set functions for codec meta
Add set function for all metadata types for both
codec_cfg and codec_cap.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2023-11-21 08:38:29 +00:00
Benjamin Cabé
fedd23f970 bluetooth: a2dp: Add missing Doxygen comments
Added missing Doxygen comments to various macros.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2023-11-20 10:49:26 -06:00
Bjarki Arge Andreasen
6f1d49e7b3 modem: backend: uart_async: Use single ring buffer
Use single ring buffer and protect it with a spinlock as it is
shared between backend and UART thread (ISR). This is simpler
than the double ring buffer setup.

The receive idle timeout has also been made configurable
instead of being a hardcoded value.

Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
2023-11-20 13:03:08 +01:00
Armando Visconti
194ee015f9 dt-bindings: sensor: iis2iclx: add macros for DT property setting
Add macros for setting in a clear way iis2iclx DT properties.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2023-11-20 09:24:37 +01:00
Armando Visconti
273475804e dt-bindings: sensor: lis2dh: add macros for DT properties setting
Add macros for setting in a clear way lis2dh DT properties.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2023-11-20 09:24:37 +01:00
Armando Visconti
6e09f91fec dt-bindings: sensor: iis2dlpc: add macros for DT properties setting
Add macros for setting in a clear way iis2dlpc DT properties.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2023-11-20 09:24:37 +01:00
Armando Visconti
0d68d9e493 dt-bindings: sensor: ism330dhcx: add macros for DT properties setting
Add macros for setting in a clear way ism330dhcx DT properties.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2023-11-20 09:24:37 +01:00
Armando Visconti
0b46f387f4 dt-bindings: sensor: lis2dw12: add macros for DT properties setting
Add macros for setting in a clear way lis2dw12 DT properties.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2023-11-20 09:24:37 +01:00
Armando Visconti
2fe89c1076 dt-bindings: sensor: lis2ds12: add macros for DT properties setting
Add macros for setting in a clear way lis2ds12 DT properties.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2023-11-20 09:24:37 +01:00
Armando Visconti
a6cfa0bc15 dt-bindings: sensor: lps22df: add macros for DT properties setting
Add macros for setting in a clear way lps22df DT properties.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2023-11-20 09:24:37 +01:00
Armando Visconti
b0f22dbafd dt-bindings: sensor: lps22hh: add macros for DT properties setting
Add macros for setting in a clear way lps22hh DT properties.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2023-11-20 09:24:37 +01:00
Armando Visconti
1fbd157c61 dt-bindings: sensor: lsm6dso16is: add macros for DT properties setting
Add macros for setting in a clear way lsm6dso16is DT properties.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2023-11-20 09:24:37 +01:00
Armando Visconti
0c3057edf4 dt-bindings: sensor: lsm6dso: add macros for DT properties setting
Add macros for setting in a clear way lsm6dso DT properties.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2023-11-20 09:24:37 +01:00
Armando Visconti
e72baabe91 dt-bindings: sensor: lsm6dsv16x: add macros for DT properties setting
Add macros for setting in a clear way lsm6dsv16x DT properties.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2023-11-20 09:24:37 +01:00
Pavel Vasilyev
3bc17d1d18 Bluetooth: Mesh: Fix async behavior of Private Beacon Client API
The Private Beacon Client API requires a response argument to allow to
call the API in the asynchronous manner
(https://github.com/zephyrproject-rtos/zephyr/pull/56426).

Because the removal of the EXPERIMENTAL tag for this API was not
released yet, it should be OK to change this API.
The EXPERIMENTAL tag has been removed here:
https://github.com/zephyrproject-rtos/zephyr/pull/64866

Coverity-CID: 330039
Coverity-CID: 330029
Coverity-CID: 329977

Fixes #65336
Fixes #65338
Fixes #65354

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2023-11-20 09:23:56 +01:00
Lingao Meng
1c280c5327 Bluetooth: Mesh: Add missing struct name
Add name for inner-struct.

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2023-11-20 09:22:55 +01:00
Lingao Meng
5f1c2f199b Bluetooth: Mesh: Make element as rodata
the reason is that the Mesh Profile clearly stipulates that Mesh nodes
cannot change their own element definitions.

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2023-11-20 09:22:55 +01:00
Tom Burdick
9369c6f8e1 rtio: Make coverity happy
Coverity reported (rightfully) a possible divide by zero when trying to
allocate from a pool. Return -ENOMEM in such scenarios as it means there
is no memory to allocate from.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2023-11-20 09:22:46 +01:00
Juha Heiskanen
07ae06f8fe mgmt: mcumgr: Doxygen tags update
Added a missing defgroup and ingroup for mcmumgr client
and smp client.

Signed-off-by: Juha Heiskanen <juha.heiskanen@nordicsemi.no>
2023-11-20 09:20:25 +01:00
Daniel Leung
f52f76fd6b doc: kernel/mm: some doxygen works
() Some kernel memory management functions were previously
   not in any group. So put them under the kernel memory
   management group, and now they appear in API doc.
() Group things together when appropriate.
() Add doc if none exists before.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-11-20 09:19:14 +01:00
Daniel Leung
f12d49d7ef kernel: mm: separate demand paging headers into its own file
This separates demand paging related headers into its own file
instead of being stuffed inside the main kernel memory
management header file.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-11-20 09:19:14 +01:00
Daniel Leung
c972ef1a0f kernel: mm: move kernel mm functions under kernel includes
This moves the k_* memory management functions from sys/ into
kernel/ includes, as there are kernel public APIs. The z_*
functions are further separated into the kernel internal
header directory.

Also made a quick change to doxygen to group sys_mem_* into
the OS Memory Management group so they will appear in doc.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-11-20 09:19:14 +01:00
Manuel Argüelles
da3d9197a6 include: arm: nxp_mpu: remove redundant HAL include
The inclusion of `fsl_common.h` solely for defining `NXP_MPU_BASE`
is redundant, as this symbol is not used. Consequently, this
unnecessary inclusion leads to the pervasive inclusion of HAL
headers through kernel headers.
The needed HAL definitions are already included into the NXP MPU
driver implementation via the SoC header.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-11-17 13:42:48 -06:00
Jukka Rissanen
dd2a222086 net: if: Add helper to calculate number of interfaces
Add a helper macro that can be used at runtime to return
the number of network interfaces in the system.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2023-11-17 12:40:33 +01:00
Jukka Rissanen
8157b48734 net: context: Add function to bound to a network interface
Helper function that marks the net_context to bound to a
network interface.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2023-11-17 12:40:33 +01:00
Guennadi Liakhovetski
21cea07b8c llext: fix a confusion between section indices
A common pattern is used throughout llext.c:

ext->mem[ldr->sect_map[sym.st_shndx]]

where ldr->sect_map[sym.st_shndx] actually contains indices from
enum llext_section but ext->mem[] is indexed, using enum llext_mem
values. Fix this by changing ldr->sect_map[] to actually contain
enum llext_mem values.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2023-11-17 09:25:42 +01:00
Guennadi Liakhovetski
fb92636056 llext: remove a symbol count copy
The symbol count in struct llext_loader is redundant, we already have
one in struct llext_symtable, accessible via struct llext. Remove the
redundant copy.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2023-11-17 09:25:42 +01:00
Rodrigo Peixoto
100836ee9e zbus: fix warning messages when mixing C and C++ files
After some further investigation, I could find the current solution to
enable zbus channels (by using ZBUS_CHAN_DECLARE) to be used in C++
files, which generates a warning when we mix C and C++ code. This fixes
the issue by using an approach to add the extern keyword only when the
file is being compiled with a C++ compiler.

Signed-off-by: Rodrigo Peixoto <rodrigopex@gmail.com>
2023-11-17 09:22:29 +01:00