Commit graph

15409 commits

Author SHA1 Message Date
Markus Fuchs
33535a2696 fs/nvs: improve C++ compatibility
This patch moves header inclusion outside the `extern "C"` block.

Signed-off-by: Markus Fuchs <markus.fuchs@de.sauter-bc.com>
2019-08-05 10:55:25 +02:00
Nicolas Pitre
0440a815a9 riscv: make core code 64-bit compatible
There are two aspects to this: CPU registers are twice as big, and the
load and store instructions must use the 'd' suffix instead of the 'w'
one. To abstract register differences, we simply use a ulong_t instead
of u32_t given that RISC-V is either ILP32 or LP64. And the relevant
lw/sw instructions are replaced by LR/SR (load/store register) that get
defined as either lw/sw or ld/sd. Finally a few constants to deal with
register offsets are also provided.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-02 13:54:48 -07:00
Nicolas Pitre
1f4b5ddd0f riscv32: rename to riscv
With the upcoming riscv64 support, it is best to use "riscv" as the
subdirectory name and common symbols as riscv32 and riscv64 support
code is almost identical. Then later decide whether 32-bit or 64-bit
compilation is wanted.

Redirects for the web documentation are also included.

Then zephyrbot complained about this:

"
New files added that are not covered in CODEOWNERS:

dts/riscv/microsemi-miv.dtsi
dts/riscv/riscv32-fe310.dtsi

Please add one or more entries in the CODEOWNERS file to cover
those files
"

So I assigned them to those who created them. Feel free to readjust
as necessary.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-02 13:54:48 -07:00
Bradley Bolen
1514c41cd1 arch: arm: Move Cortex-M specific CPU defines
These defines are specific to the Cortex-M.  Move them to their own
header file to prepare for Cortex-R support.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-02 23:37:03 +03:00
Bradley Bolen
4cee0eecdc arch: arm: Move header files to common location
These files will be used for Cortex-R support as well.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-02 23:37:03 +03:00
Michael Scott
3d3af7114e net: lwm2m: add IPSO Accelerometer object support
This IPSO object can be used to represent a 1-3 axis accelerometer.

Signed-off-by: Michael Scott <mike@foundries.io>
2019-08-02 12:00:35 +03:00
Michael Scott
ca61a238af net: lwm2m: add IPSO Push Button object support
This Object is used to report the state of a momentary action push
button control and to count the number of times the control has
been operated since the last observation.

Signed-off-by: Michael Scott <mike@foundries.io>
2019-08-02 12:00:35 +03:00
Michael Scott
2019d49bf0 net: lwm2m: add IPSO On/Off Switch object support
This object is used with an On/Off switch to report it's state.

Signed-off-by: Michael Scott <mike@foundries.io>
2019-08-02 12:00:35 +03:00
Michael Scott
4bf343d5d1 net: lwm2m: add IPSO Buzzer object support
The IPSO Buzzer object is used to represent a buzzer, beeper or
vibrating alarm.

Signed-off-by: Michael Scott <mike@foundries.io>
2019-08-02 12:00:35 +03:00
Michael Scott
8817d930a8 net: lwm2m: rework resource instance storage / access methods
LwM2M allows for multiple instance resources such the power source
resources in the device object.  These types of resources have
always been very hard to work with, and frankly were poorly
implemented.

This led to other issues where it was very hard to have
non-sequential resource instances, and each resource of this type
needed special getter / setter methods such as:
lwm2m_device_add_pwrsrc()
lwm2m_device_set_pwrsrc_voltage_mv()

Going forward, as more LwM2M objects are implemented this just
doesn't scale well.

To fix this:
- split the resource instance data out from the resource data.
  This includes the data pointer information and resource
  instance id.
- add resource id and resource instance id to the event callback
  functions so user's can see in more detail what resources and
  resource instances are being handled.
- allow generic functions like lwm2m_engine_get_*() and
  lwm2m_engine_set_*() to access resource instance data.
- adjust object resource initialization  macros to map resource
  instances to resources at the time of object instance
  creation.
- fix up the lwm2m_client as a reflection of all of these changes.

Signed-off-by: Michael Scott <mike@foundries.io>
2019-08-02 12:00:35 +03:00
Michael Scott
ad01c035b8 net: lwm2m: update function prototypes and descriptions
- Several of the functions use "path" as the parameter name for the
  string-based LwM2M path.  Let's clarify by using "pathstr".
- Recent updates to the LwM2M engine now support resource instances
  when parsing the LwM2M path.  Let's update descriptions accordingly.

Signed-off-by: Michael Scott <mike@foundries.io>
2019-08-02 12:00:35 +03:00
Krzysztof Chruscinski
fce2692bcc logging: Clean up log.h dependencies
Cleaning up log.h include dependencies to allow log.h including in base
headers (e.g. kernel.h).

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2019-08-01 14:42:40 +02:00
Peter A. Bigot
5a39bcae84 drivers/adc: provide API to access reference voltage
Required for any real-world use of ADC_REF_INTERNAL.

Relates-to: issue #11922
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-08-01 13:28:41 +02:00
Nicolas Pitre
479c1aa6bb mempool: simplify the logic for sizing the free block bitmap
Z_MPOOL_LVLS() expands into the sum of 16 _MPOOL_HAVE_LVL() instances,
and _MPOOL_BITS_SIZE() expands into the sum of 16 Z_MPOOL_LVLS()
instances. In the end, a single _MPOOL_BITS_SIZE() expands to 256
_MPOOL_HAVE_LVL() instances!

Let's make it slightly easier on the compiler, and easier for humans
too, by reworking Z_MPOOL_HAVE_LVL(() so that ic can be used directly
into Z_MPOOL_LBIT_BYTES(), making the code logic much simpler.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-07-31 10:09:29 -07:00
Alexey Brodkin
5947014685 arc: Add support for unaligned access
ARCv2 cores may access data not aligned by the data size boundary.
I.e. read entire 32-bit word from address 0x1.

This feature is configurable for ARC EM cores excluding those with
secure shield 2+2 mode. When it's available in hardware it's required
to enable that feature in run-time as well setting status32.AD bit.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-07-31 09:25:15 -07:00
Peter A. Bigot
1090dbc6b4 subsys/cfb: improve font structure packing
The specified order of fields wastes space when the cfb_font_caps enum
isn't packed.  Reorder to avoid this behavior.

Also remove the unnecessary array size on the extern symbol declaration,
lest the compiler misinterpret the properties as being zero-length
arrays rather than pointers.  (The idiom is already technically
using undefined behavior since we're relying on the linker rather than
the language to produce an array from the individual declarations.)

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-07-31 05:43:50 -04:00
Nicolas Pitre
2bdfede0f8 cpp: support for 64-bit constructors
Make constructors work in a 64-bit build.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-07-30 18:55:34 -07:00
Andrei Gansari
11d8f1a1e9 soc: k64f MPU configured to always allow USB
Because NXP MPU's regions are dynamically enabled/disabled, USB
device's access maybe restricted when switching out of a task.
Background DMA transfers to/from RAM may happen during MPU region
reconfiguration or core idling.
Enabled USB (Kinetis MPU Master 4) to always have access to RAM address
space.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2019-07-30 13:08:43 +03:00
Anas Nashif
cb412df725 x86: remove code for interrupt forwarding bug
This only applied to quark_se, so removing it.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-07-29 21:30:25 -07:00
Anas Nashif
578ae40761 boards: remove quarl_se_c1000
This board and SoC was discontinued some time ago and is currently not
maintained in the zephyr tree.
Remove all associated configurations and variants from the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-07-29 21:30:25 -07:00
Charles E. Youse
f7a0dce636 arch/x86: remove support for CONFIG_REALMODE
We no longer support any platforms that bootstrap from real mode.

Fixes: #17166

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-29 21:29:38 -07:00
Ulf Magnusson
62d5741476 dts: Add new DTS/binding parser
Add a new DTS/binding parser to scripts/dts/ for generating
generated_dts_board.conf and generated_dts_board_unfixed.h.

The old code is kept to generate some deprecated defines, using the
--deprecated-only flag. It will be removed later.

The new parser is implemented in three files in scripts/dts/:

dtlib.py:
  A low-level .dts parsing library. This is similar to devicetree.py in
  the old code, but is a general robust DTS parser that doesn't rely on
  preprocessing.

edtlib.py (e for extended):
  A library built on top of dtlib.py that brings together data from DTS
  files and bindings and creates Device instances with all the data for
  a device.

gen_defines.py:
  A script that uses edtlib.py to generate generated_dts_board.conf and
  generated_dts_board_unfixed.h. Corresponds to extract_dts_includes.py
  and the files in extract/ in the old code.

testdtlib.py:
  Test suite for dtlib.py. Can be run directly as a script.

testedtlib.py (uses test.dts and test-bindings/):
  Test suite for edtlib.py. Can be run directly as a script.

The test suites will be run automatically in CI.

The new code turns some things that were warnings (or not checked) in
the old code into errors, like missing properties that are specified
with 'category: required' in the binding for the node.

The code includes lots of documentation and tries to give helpful error
messages instead of Python errors.

Co-authored-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-07-29 16:22:17 -04:00
Luiz Augusto von Dentz
29782a006b Bluetooth: GATT: Use atomic_t for subscribe flags
This makes use of atomic_t helpers to set, test and clear flags.

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2019-07-29 12:26:18 +02:00
Luiz Augusto von Dentz
219bb6fe1f Bluetooth: GATT: Fix not canceling on unsubscribe
This introduces a new flag (BT_GATT_SUBSCRIBE_WRITE_PENDING) which is
set when a write operation requires canceling before the parameters can
be reused.

Fixes #17534

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2019-07-29 12:26:18 +02:00
Jukka Rissanen
c4a692a85f net: ppp: Add proper support to receive Echo-Reply message
Currently only net-shell calls net_ppp_ping() command, so make
it return the amount of time that it took to receive Echo-Reply
so the net-shell can print the round trip time value.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-07-29 10:24:46 +03:00
Jukka Rissanen
19a09bf553 net: pkt: Add net_pkt_read_le16() helper
We had a big endian helper but little endian one was missing.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-07-29 10:24:46 +03:00
Jukka Rissanen
ddac835ea7 net: pkt: Add net_pkt_write_le16() helper
We had a big endian helper but little endian one was missing.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-07-29 10:24:46 +03:00
Jukka Rissanen
3e481f9d07 net: ppp: Allow delay of PPP protocol handshakes
By default PPP is started immediately when the network interface
goes up. This can be problematic especially when debugging the beast
so allow user to delay the startup.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-07-29 10:24:46 +03:00
Jukka Rissanen
4a5543db25 net: shell: Add ppp network interface support
Print point-to-point network information properly.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-07-29 10:24:46 +03:00
Jukka Rissanen
02239a99a2 net: ppp: Add IPV6CP support
Initial version for PPP IPv6 Control Protocol.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-07-29 10:24:46 +03:00
Jukka Rissanen
f95938da0f net: ppp: Initial support for point-to-point protocol
This implements ppp L2 component, LCP and IPCP modules.

Fixes #14034

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-07-29 10:24:46 +03:00
Peter A. Bigot
137ea74052 sys/sem.h: fix path to atomic.h
Use of old location produces a compiler warning.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-07-26 06:37:59 +03:00
Andrew Boie
96571a8c40 kernel: rename NANO_ESF
This is now called z_arch_esf_t, conforming to our naming
convention.

This needs to remain a typedef due to how our offset generation
header mechanism works.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-07-25 15:06:58 -07:00
Andrew Boie
c9a4bd47a7 arm: dump registers on fatal exceptions
We had a function that did this, but it was dead code.
Move to fatal.c and call from z_arm_fatal_error().

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-07-25 15:06:58 -07:00
Andrew Boie
8a9e8e0cd7 kernel: support log system for fatal errors
We introduce a new z_fatal_print() API and replace all
occurrences of exception handling code to use it.
This routes messages to the logging subsystem if enabled.
Otherwise, messages are sent to printk().

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-07-25 15:06:58 -07:00
Andrew Boie
5623637a48 kernel: abolish _default_esf
NANO_ESF parameters may now be NULL, indicating that no
exception frame is available.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-07-25 15:06:58 -07:00
Andrew Boie
71ce8ceb18 kernel: consolidate error handling code
* z_NanoFatalErrorHandler() is now moved to common kernel code
  and renamed z_fatal_error(). Arches dump arch-specific info
  before calling.
* z_SysFatalErrorHandler() is now moved to common kernel code
  and renamed k_sys_fatal_error_handler(). It is now much simpler;
  the default policy is simply to lock interrupts and halt the system.
  If an implementation of this function returns, then the currently
  running thread is aborted.
* New arch-specific APIs introduced:
  - z_arch_system_halt() simply powers off or halts the system.
* We now have a standard set of fatal exception reason codes,
  namespaced under K_ERR_*
* CONFIG_SIMPLE_FATAL_ERROR_HANDLER deleted
* LOG_PANIC() calls moved to k_sys_fatal_error_handler()

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-07-25 15:06:58 -07:00
Andrew Boie
81245a0193 arm: don't use exc reason codes for internal state
We are standardizing to a arch-independent set of exception
reason codes, don't overload it with internal state of
the ARM fault handling code.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-07-25 15:06:58 -07:00
Nicolas Pitre
11d4f01870 Z_ISR_DECLARE: ensure proper alignment on 64-bit targets
Prevent spurious unexpected alignment on 64-bit targets.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-07-25 14:01:24 -07:00
Paul Sokolovsky
b7bb48eeac posix: unistd.h: open() doesn't belong here
Per POSIX, open() is defined in <fcntl.h>. fcntl.h in turn comes from
the underlying libc, either newlib, or minimal libc.

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2019-07-25 13:50:58 -04:00
Paul Sokolovsky
1347bf9b48 posix: mqueue.h: Move O_CREAT and friends to fcntl.h
That's the header which is supposed to define them, there was even
FIXME on that in mqueue.h.

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2019-07-25 13:50:58 -04:00
Paul Sokolovsky
15a9709186 posix: time.h: Add workaround for outdated newlib used by Xtensa
Unfortunately, Zephyr SDK 0.10.0 ships with outdated Newlib 2.0.0
(from 2015 or earlier) which lacks sys/_timespec.h header, requiring
ugly workaround of defining struct timespec inline (the whole idea
was to standardize on sys/_timespec.h header for different libc's).

This is similar to earlier workaround for struct timeval definition
introduced in a6aee9b4c8. Zephyr SDK ticket for this issue
is https://github.com/zephyrproject-rtos/sdk-ng/issues/64, and it
will ve possible to remove both workarounds when Xtensa toolchain
will be upgraded to newlib version consistent with other
architectures.

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2019-07-25 13:50:58 -04:00
Paul Sokolovsky
3a4553913e posix: struct timespec: Move definition to sys/_timespec.h
POSIX subsys defines struct timespec in <time.h> (as POSIX public
API requires), but newlib defines in in sys/_timespec.h, which
inevitably leads to inclusion order and redifinition conflicts.
Follow newlib way and define it in single place, sys/_timespec.h,
which belongs to libc namespace. Thus, we move current definition
to minimal libc, and will use either minlibc's or newlib's
definition, instead of trying to redefine it.

This is similar to the introduction of sys/_timeval.h done earlier.

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2019-07-25 13:50:58 -04:00
Paul Sokolovsky
3693f85805 posix: Move sys/stat.h to minimal libc
Newlib libc already provides sys/stat.h, so trying to have sys/stat.h
on the level of POSIX subsys inevitable leads to include order and
definition conflicts. Instead (as most of other sys/* includes)
should come from the underlying libc.

While moving, made unrelated change of removing #include <kernel.h>,
to accommodate the change reviewers.

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2019-07-25 13:50:58 -04:00
Jose Alberto Meza
e3f32948f2 API: espi: Add API for Enhanced Serial Peripheral Interface
This API defines following call for eSPI bus drivers

    - espi_set_config
    - espi_get_channel_status
    - espi_send_read_request
    - espi_send_write_request
    - espi_send_vwire
    - espi_receive_vwire
    - espi_send_oob
    - espi_receive_oob
    - espi_flash_read
    - espi_flash_write
    - espi_flash_erase

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2019-07-25 08:23:38 -07:00
Alberto Escolar Piedras
6cd70a5f85 logging: Fix undefined macro warning
Fix undefined macro warning if
CONFIG_LOG or
CONFIG_LOG_RUNTIME_FILTERING are not selected

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-07-24 16:34:31 -04:00
Wentong Wu
715369350d lib: os: add sys_sem data type
For systems with userspace, the sys_sem exist in user memory working
as counter semaphore for user mode thread. The implemention of sys_sem
is based on k_futex. And the majority of the synchronization operations
are performed in user mode to reduce the calling of system call.
And for systems without userspace enabled, sys_sem behaves like k_sem.

Fixes: #15139.

Signed-off-by: Wentong Wu <wentong.wu@intel.com>
2019-07-24 10:12:25 -07:00
Yasushi SHOJI
51bc0a065c linker: Make alignment size for sw_isr_table configurable
sw_isr_table has two entries, an argument and an ISR function.  The
comment on struct _isr_table_entry in include/sw_isr_table.h says that
"This allows a table entry to be loaded [...] with one ldmia
instruction, on ARM [...]".  Some arch, e.g. SPARC, also has a double
word load instruction, "ldd", but the instruct must have address align
to double word or 8 bytes.

This commit makes the table alignment configurable.  It allows each
architecture to specify it, if needed.  The default value is 0 for no
alignment.

Signed-off-by: Yasushi SHOJI <y-shoji@ispace-inc.com>
2019-07-24 10:09:02 -07:00
Andrew Boie
7875707a98 userspace: add kobject flag for drivers
This new flag will indicate that the kernel object represents
an instance of a device driver object.

Fixes: #14037

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-07-24 12:33:34 +02:00
Jukka Rissanen
0435dce697 net: Add support for TXTIME socket option
The SO_TXTIME socket option can be used by the application to
tell the network device driver the exact moment when the
network packet should be sent.

This feature is also implemented in Linux.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-07-24 10:17:16 +03:00