Remove all optional, initial CAN sample point properties and rely on the
CAN timing calculations to automatically pick the preferred sample point
location based on the initial bitrate.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
SOC_ESP32_NET is now SOC_ESP32_APPCPU, following espressif's
naming convention in the same manner as ESP32S3 app cpu.
SOC_ESP32_APPCU is now a subset of SOC_SERIES_ESP32.
This commit also changes the necessary files, samples and tests
for bisect purposes.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Updates Ethernet PHY devicetree bindings to be more consistent with
Linux by using the standard `reg` property for the PHY address instead
of a custom `address` property. As a result, MDIO controller bindings
now require standard `#address-cells` and `#size-cells` properties.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Update the descriptions for the various CAN devicetree timing properties
specified in Time Quanta (TQ) to make it clear that these, if present, are
only used for the initial timing parameters.
Deprecate the (Re-)Synchronization Jump Width (SJW) devicetree properties
for both arbitration and data phase timing as these are now only used in
combination with the other TQ-based CAN timing properties, which are all
deprecated.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add `mdio_read_c45()`/`mdio_write_c45()` APIs for Clause 45 access
and remove the `protocol` MDIO binding property so that MDIO bus
controller can support more than one protocol.
A new MDIO header is introduced with generic opcodes, MMD and
registers addresses, to be used by MDIO and PHY drivers.
Existing MDIO drivers that support both Clause 22 and Clause 45
access are migrated to the new APIs.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Introduce dtsi files representing the
current portfolio of chips and modules
based on the followint criteria:
- flash size
- psram size
- gpio count
- certification status
Update the boards dts files according
to which SOC/SIP they are using.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
CPU idle states are not board specific. This patch moves ESP32 idle
states to the core SoC dts files. Board can always tweak some state
parameters (if needed), but the definition belongs to core SoC dts
files, same as e.g. peripherals.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
- Add overlay for the esp32s2_saola board to die_temp_polling sample.
- Add aliases for the die_temp_polling sample to esp32s2 dtsi.
Signed-off-by: Hiroki Tada <tada.hiroki@fujitsu.com>
Add GDMA support for esp32s3.
Remove suspend/resume since they are optional and do
the same as start/stop.
Fix possible null pointer derreference.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Add LEDC device for esp32s3
Update PWM LED binding
Remove invalid comment from driver source file
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Support for the measuring the CPU die temperature
for the ESP32 targets S2,C3. The ESP32 support
was ommited due to lack of offset calibration.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
This reverts commit fdd47f39be.
After v4.4.1, write-block-size is no longer needed to be 32-bytes
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>