Adapt all Espressif SoC and driver code to the updated
hal_espressif module synced with IDF master branch.
Main changes:
- clock control: delegate peripheral clock gating to HAL
layer using new clock/reset APIs
- SPI/GDMA: adapt to restructured DMA HAL with new channel
allocation and configuration interfaces
- ethernet: add RMII clock configuration and PHY management
- GPIO: simplify using direct HAL function calls
- flash: adapt to updated SPI flash HAL interfaces
- linker scripts: update IRAM/DRAM mappings for new HAL
object files
- DTS: fix ESP32-S2 PSRAM dcache1 address to match actual
MMU mapping region (0x3f800000 DRAM1 instead of 0x3f500000
DPORT which lacks 8-bit access capability)
- west.yml: update hal_espressif revision
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
New nrfx release contains major rework of nrfx drivers
instantiation making it easier to integrate with dts nodes.
Now, nrfx driver instances can no longer be `const`
because they contain driver runtime state.
Additionally, all nrfx drivers return `errno` error codes
instead of deprecated `nrfx_err_t`.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Ensure the USB clock is enabled before initializing the
controller by invoking the pre_enable hook. This avoids
initialization failures when the HAL has not yet configured
the clock.
Adds shutdown hook to allow interrupt and clock deinit.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Kconfig option UDC_DWC2_USBHS_VBUS_READY_TIMEOUT depends on services
exclusively available for nRF54H20, but the option can also be used for
nRF54LM20A, where there are no service dependencies, and VREG can be
accessed by the driver directly. Let depend the option on the SOC
series, as the controller can be used by the different CPUs on the SOC.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Disable D+ pull-up on core disable to make sure that device does not
indicate its presence to host before the stack is ready (software
initializes controller and clears SftDiscon bit).
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Initial implementation of nRF54L quirks necessary for nRF54LM20A.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Constify vendor quirks structure to not keep it in RAM. Use constified
vendor quirks structure directly if there is only one snps,dwc2 instance
to allow compiler inlining quirk implementation.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Accessing DWC2 otg core registers before the clock starts results in
complete system hang. Add a 1 us busy wait to make sure that software
won't access registers before the clock is started.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Adds CONFIG_UDC_DWC2_USBHS_VBUS_READY_TIMEOUT_MS that allows
for waiting for a USBHS VBUS ready event for a specified
amount of time. Earlier it waited forever and because of that,
the udc_enable() was blocked forever if the USB cable was
disconnected. Now the function returns error on timeout.
Signed-off-by: Aleksander Strzebonski <aleksander.strzebonski@nordicsemi.no>
Use the quirk to keep only the necessary clocks running when the core is
hibernated. The quirk is necessary to bring the USB suspend current
below the USB 2.0 suspend current limit.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
On nRF54H20DK the USB PHY is powered from VBUS. When the USB cable is
not connected, the PHY is not powered and the PHY clock disappears.
Because the GOUTNAKEFF and INEPNAKEFF can only ever be set when PHY
clock is active, the waits for these bits do timeout if cable is
disconnected. Workaround the issue by aborting the wait if vendor quirk
indicates that PHY clock has abruptly vanished.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
On USBHS, we cannot access the DWC2 register until VBUS is detected and
valid. Kernel event API is used to block if a valid VBUS signal is not
present when the user tries to force usbd_enable().
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Rework and rename vendor quirks to better reflect where they intended to
be called. Number of quirks probably not final and will be trimmed
later.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The driver currently supports only dedicated FIFO mode (with
dynfifosizing if enabled). Control, bulk and interrupt transfers are
supported, isochronous transfers are not yet supported. The driver
accesses controller registers using sys_io.h, but for debugging purposes
one can get a register map from the driver's config, similar to the
usb_dc_dw.c driver.
Initial support also has vendor quirks for the STM32F4 SoC family.
Tested on NUCLEO-F413HG.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
