Add driver support for xlnx SD/EMMC host controller. The driver
currently support SD host controller version 3.0 and EMMC host
controller version 5.1. This driver functions with the SDHC subsystem to
perform operations on device.
Driver support both interrupt and polled mode data transfer. Uses ADMA2
to perform data transfer.
Signed-off-by: Paul Alvin <alvin.paulp@amd.com>
Since the RA2L1 uses the macro "ICU_EVENT" instead of
"ELC_EVENT" (which is currently used) to input into
the IELSR register, the ek_ra2l1 board cannot assign
any interrupts for any driver.
This commit aim to correct the Event macro to input correct
value for IELSR register on all the Renesas SoC by using
"BSP_PRV_IELS_ENUM" macro.
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Fixes an issue in which "SDHC" had been incorrectly expanded to
"Secure Digital High Capacity" instead of "SD Host Controller".
Signed-off-by: Egill Sigurdur <egill@egill.xyz>
Initialize the cyhal_sdio_config, such that the init
function won't do the pin configuration.
The gpios are setup using the zephyr pinctrl driver already.
Before the latest hal update the values were ignored and
the gpio configuration completely skipped.
But this is no longer the case and this commit
fixes that by setting the gpio pins to nc,
Also, explicitly set sdio_config.clock to NULL, to make
it clearer that the driver will check for that.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The driver should use resource type SDHC not SDIODEV.
In a older HAL version the value was not used as parameter
for clock initialization so it didn't matter, but breaks
the initialization of the driver with the latest hal.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The SD physical layer specification requires that the operating supply
be stable for at least 1 millisecond before providing the required 74
clocks. The maximum VDD ramp time is specified at 35ms, giving a total
minimum delay of 36ms.
Signed-off-by: Jordan Yates <jordan@embeint.com>
This Kconfig has wrongly been added to defconfig files. It is not the
right place for it. It has never been the right place for it. Drivers
that need it should select the symbol in their Kconfig entries. Drop
PINCTL from Kconfig.defconfig and add proper select at Kconfig.sam*.
Fixes#78619
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The CONFIG_PINCTRL setting is removed from the board
_defconfig files. And "select PINCTRL" is added to
the appropriate driver files.
Signed-off-by: Bill Waters <bill.waters@infineon.com>
The imx USDHC driver previously queried the peripheral's internal card
detect signal to check card presence if no card detect method was
configured. However, some boards do not route the card detect signal and
do not work correctly with the DAT3 detection method supported by this
peripheral. As a fallback, assume the card is present in the slot but
log a warning to the user.
Fixes#42227
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Macros to write specific peripheral registers were removed as a
compile flag was added to hal_espressif requesting struct bitfields
to have strict volatile access (thus 32-bit access), allowing for
the cleanup.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Use the new `SPI_MOSI_OVERRUN_DT` macro to determine at compile-time
whether the 512 byte array of `sdhc_ones` is required.
Signed-off-by: Jordan Yates <jordan@embeint.com>
This is part of a series to move memory management functions
away from the z_ namespace and into its own namespace. Also
make documentation available via doxygen.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This renames z_phys_map() and z_phys_unmap() to
k_mem_map_phys_bare() and k_mem_unmap_phys_bare()
respectively. This is part of the series to move memory
management functions away from the z_ namespace.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Rework CMD12 failure logic for SDHC SPI driver. Previously, the error
code of CMD12 was not checked, so even if CMD12 failed to send the
initial command would be retried. Change this behavior to retry CMD12
until it succeeds. If CMD12 fails, its error code will be propagated to
the caller. Otherwise, the return code from the command being sent by
the caller will be propagated.
Fixes#72365
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Properly release SPI bus on transmit error within the SDHC SPI driver.
In these cases return code is not checked, as we wish to return the
error code from the failed transfer to the SD stack.
Fixes#72364
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
RCAR MMC driver previously had to report inaccurate maximum supported
frequency to SD subsystem so that the subsystem would select SDR104 mode
timing. Remove this logic, as it should no longer be needed.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Some instances of the USDHC peripheral take longer to reset, and will
timeout with the previous delay of 100 cycles. Extend this delay to 1000
cycles to resolve this.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Remove function for waiting for clock gate, as this is not used anywhere
within the USDHC driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Some USDHC IP instances do not have the voltage control bit present, as
they can only operate at 3.3V. Move code to select 1.8V mode into a
separate helper, and guard the call to UDSHC_SelectVoltage() behind a
feature macro from MCUX SDK.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add basic functionality of Renesas SD/MMC driver. It can be used
for both gen3 and gen4 R-car boards, but tested only with H3ULCB,
Salvator XS M3 and Spider boards. This driver working with SDHC
subsystem.
The driver supports regularal reading/writing throught SD/MMC
controller buffer, DMA mode w/o interrupts and timing tuning.
Add gpio5 and sd0 nodes to h3ulcb and salvator xs which are needed
for working with SD cards. The GPIO node is needed for switching
voltage on SD card through gpio regulator driver.
Notes:
* the driver doesn't support SPI mode;
* SCC tuning and DMA mode based on IRQs are enabled by default;
* an address of a data buffer has to be aligned to 128 bytes if it
is not, driver will use non-DMA mode automatically;
* Renesas MMC DMAC doesn't support 64-bit DMA addresses, so for
case when we have 64-bit xref data address we use non-DMA mode;
* SD/MMC controller supports block size between 512 and 1 with
a lot of restrictions, more details you can find in code;
* support of HS400 mode isn't implemented inside driver.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
This change marks each instance of the 'api' as 'static const'.
The rationale is that 'api' is used for declaring internal
module interfaces and is not intended to be modified at runtime.
By using 'static const', we ensure immutability, leading to usage of only
.rodata and a reduction in the .data area.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
In sdhc_spi_response_get, the logic for slow cards previously only
retried reads 16 times. Instead of using this approach, read from the
card every 10 ms until the command timeout is reached or it responds.
This way, the command timeout will be respected for cards that do not
respond.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
* Internal Clock not getting stable during initialization
* SD clock was not enabled
* Removed duplicate file.
* Removed write to readonly registers
* Moved function pointer structure from data section to RO section
* Wrong macro names
* Refactoring of lower layer header file.
Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@intel.com>
Fixes uninitialized variable return by returning zero
at the end of function.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
