In the original HAL, sl_si91x_psram_init() and sl_si91x_psram_uninit() were
also in charge of configuring the pinctrl and the clocks. A workaround
have been introduced to avoid change in pinctrl but they still changed the
clock configuration.
We definitely need to expose the clock configuration to Zephyr users. The
HAL has been patched to split the sl_si91x_psram_*init() function in
smaller pieces. So it is possible to configure the devic without changing
the clock or the pinctrl. Let's use these new functions.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Memory APS6404L does not support address shift feature.
Since it is being configured for different platforms that uses this
memory, this is cauing an error while building.
Signed-off-by: Missael Maciel <davidmissael.maciel@nxp.com>
This patch fixes PSRAM initialization logic in x8 mode by ensuring that
the data line mode configuration accurately reflects the io-x16-mode
property specified in the device tree.
Signed-off-by: Arthur Gay <arthur.gay@marshmallow.kids>
Limit a transaction to a boundary of aligned addresses. Each PSRAM may
specify different configuration.
Signed-off-by: Arthur Gay <arthur.gay@marshmallow.kids>
Limit a transaction to a boundary of aligned addresses. Each PSRAM may
specify different configuration.
Signed-off-by: Arthur Gay <arthur.gay@marshmallow.kids>
SDRAM1 / SDRAM2 / PSRAM sections were being referenced in order to make
them accessible for the framebuffer. This is now addressed via the
mechanism provided by Zephyr hence this is no more necessary.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
In order to allow the linker to place certain objects into external RAM,
e.g. heaps, adjust the memc initialization level to PRE_KERNEL_1, allowing
clock control and memc to come up before priority objects like heaps are
initialized.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Ensure NSBank values are validated at build time.
That helps to identify and fix incorrect bank values.
Signed-off-by: Georgij Černyšiov <geo.cgv@gmail.com>
Simplifies the driver code:
* Use existing FMC_NORSRAM_DEVICE and FMC_NORSRAM_EXTENDED_DEVICE
defines. No need to keep references to them in the driver's config.
* Refine initialization loop.
Signed-off-by: Georgij Černyšiov <geo.cgv@gmail.com>
CS hold time parameter is not correct which may cause bus fault
randomly.
System hang during status register reading after flash progromming which
is caused by parameter accessing in XIP mode.
Add dummy delay for READ command according the flash datasheet which is
required for SDR mode.
Use FlexSPI internal divider for clock updating instead of register in
CCM to avoid potential risk caused by flash access during clock updating
procedure.
Signed-off-by: Raymond Lei <raymond.lei@nxp.com>
Correct XSPI configuration in order to improve PSRAM access on the
STM32N6 discovery board.
Ideally, this should be defined by device tree, but I'm fixing
the only user for now.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Add a missing break statement in the pm_action function to ensure that
PM_DEVICE_ACTION_RESUME is not treated as an error.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
The utility may be used during development stage to get
ambiq platform specific timing parameters for mspi devices.
Signed-off-by: Swift Tian <swift.tian@ambiq.com>
Silabs siwx91x includes a memory controller for (Quad-)SPI PSRAM. It
allows the application to use the PSRAM as if it was any other RAM.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
On some STM32 lines, like the h7rs, there aren't XSPI prefetch options.
To support them in the PSRAM driver, conditionally exclude them from
compilation when the options are not available
Signed-off-by: Titouan Christophe <titouan.christophe@mind.be>
Add the MSPI controller support for apollo5x.
Add the MSPI controller to mspi API test.
Updated west.yml for hal updates.
Signed-off-by: Swift Tian <swift.tian@ambiq.com>
1. Moved ambiq specific macro to mspi_ambiq header.
2. Always fill rx&tx dummy settings regardless of transfer direction.
3. Add the CONFIG_MSPI_* macro for optional features.
4. Fixed the ID read process and add k_sleep during busy_wait in
atxp032 driver.
Signed-off-by: Swift Tian <swift.tian@ambiq.com>
For STM32 XSPI PSRAM driver, compute and set the prescaler automatically
according to the kernel clock and the max frequency of the PSRAM.
Copied from what is done in the STM32 XSPI Flash driver.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add memc driver for the MAX32 HyperBus peripheral, supporting HyperRAM
and Xccela PSRAM memory devices.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
New property of the st,stm32-xspi-psram compatible gives
the external PSRAM memory in bits.
The property of the st,stm32-xspi compatible gives
the external PSRAM memory base address
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Flexram is really not a memory controller, and does not belong in memc
namespace or directory. Move it to it's own misc directory and remove
memc_ from the namespace.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Moved to: include/zephyr/drivers/misc/flexram/memc_nxp_flexram.h
This change makes it so that the .h file does not need to be pulled in
using the CMakeLists.txt file, and can be included like other public
includes.
Removes drivers/memc/memc_nxp_flexram.h
Add memc_nxp_flexram.h to include/zephyr/drivers/misc/flexram
Modify drivers/memc/memc_nxp_flexram.c to use the new include path.
Modifies the mimxrt1170 magic_addr sample to include the driver using
the new include path.
Modify the soc file: soc/nxp/imxrt/imxrt11xx/soc.c to use the new path.
Add relevant information to migration-guide-4.2.rst.
Signed-off-by: Jacob Wienecke <jacob.wienecke@nxp.com>
Co-authored-by: Declan Snyder <declan.snyder@nxp.com>
Following the commit f98fde07b3, DT_REG_ADDR now expands with a 'U'
suffix as an unsigned value. However, for compatibility with IS_EQ,
a raw value without any suffix is required. Therefore, this update is
necessary.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
This commit deals with fixing various issues that prevents
the device from being built. In specific:
1. Fix default timing macro definitions to build with
an MSPI controller, other than AMBIG.
Add macro definition for MSPI_PORT.
2. Timing settings should be applied only when MSPI_TIMING
is defined. Otherwise, the APS6404 initialization routine
will fail with -EIO.
3. Similarly, use MSPI_XIP and MSPI_SCRAMBLE to apply XIP
and SCRAMBLE device settings, respectively (optimization).
4. MEMC_INIT_PRIORITY is assigned higher priority than
MSPI_INIT_PRIORITY which results in compiler error as
APS6404 device initialization depends on its underlying
MSPI bus controller.
5. The 'acquire' subroutine should be compiled when PM_DEVICE
is used (suppress compiler warning).
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
This Kconfig has wrongly been added to defconfig files. It is not the
right place for it. It has never been the right place for it. Drivers
that need it should select the symbol in their Kconfig entries. Drop
PINCTL from Kconfig.defconfig and add proper select at Kconfig.sam*.
Fixes#78619
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Some instances of the FLEXSPI IP permit limiting AHB bus access so that
no memory access requests will straddle a page boundary. Add a property
to manage this setting.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
is66wvq8m4 PSRAM always requires the address to be left shifted by
5 bits, regardless of which FLEXSPI port it is on. Fix the addressShift
assignment to be unconditional
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The ADDRSHIFT bit simply left shifts the address written to IPCR0[SFAR],
(or the address used for AHB access), by 5 bits before sending it to the
attached memory. This bit does not have an effect on the base address
used to access the flash/psram device.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Select PINCTRL subsystem by drivers which require it.
Prevent the need from enabling this symbol at board or soc level.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Some flash/memc drivers like flexspi will want to default the
value of the log level to off to avoid RWW hazard while XIP,
to do this, the logging template must be sourced after the driver
kconfig files so that the default value from the driver is able
to be checked, since logging template introduces an unconditional
default otherwise.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
REG_X_BASEADDR will be removed from all hal files.
This forces the use of the peripheral base address
Define MSPI_PORT macro for chip drivers
Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
This commit fixes a bug with the declaration of the Kconfig option
MEMC_STM32.
The option is defined in two files:
- `drivers/memc/Kconfig.stm32`, wich depends on
- `MEMC`
- `DT_HAS_ST_STM32_FMC_ENABLED`
-`soc/st/stm32/Kconfig.defconfig`, wich depends on
- `MEMC`
- `SOC_FAMILY_STM32`
So, if you have `CONFIG_MEMC=y` in your Kconfig options and you are on a
STM32 SoC, `CONFIG_MEMC_STM32` will be enabled, even if there is no
STM32 FMC enabled.
This Kconfig option causes the driver for the STM32 FMC to be compiled,
regardless of the presence of an enabled node for the FMC.
However, the driver fails to compile if there is no FMC node in the
devicetree. So, if you compile a project with `CONFIG_MEMC=y` on a board
with an STM32 SoC and no enabled FMC, the build will fail.
This commit deletes the Kconfig declaration in the `Kconfig.defconfig`,
as it isn't useful and is the one provoking the bug.
It also add in the `Kconfig.stm32` the compatible `st,stm32h7-fmc`, wich
use the same driver and so need to be enabled by the same Kconfig
option.
Signed-off-by: Miguel Gazquez <miguel.gazquez@bootlin.com>
Removed PM device runtime support from drivers in PD_SYS domain.
Update the rest device drivers to call pm_device_runtime_get/put()
functions when CONFIG_PM_DEVICE_RUNTIME is enabled.
Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
