When a eSPI slave needs to send back-to-back packets
updating status signal need to guarantee both status
reach the eSPI host, i.e. SCI=0 followed by SCI=1.
This change guarantees both packets are transmitted
over esSPI bus.
Allow to map eSPI host logical UART to a soc UART.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
In status variable in espi_pc_isr should have been a 32-bit unsigned int
as ESPI_PC_REGS->PC_STATUS is 32-bits.
Fixes#18359
Coverity-CID: 203521
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add eSPI Microchip XEC driver
Include support for peripheral & virtual wires (channel 0-1)
OOB and flash support can be added in the future
Fix compilation error in pinmux driver
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
