Add support for processing buffers with non-multiple-of-block-size
lengths.
Fix mchp_aes support for test_ctr_encrypt_partial which was added by:
e3ac7e9ed5 "tests: crypto: Add AES test cases for Infineon MXCRYPTO"
Signed-off-by: Tony Han <tony.han@microchip.com>
The key registers are chip-global but the key was written once
at session start with no lock held, so two sessions with
different keys could encrypt under each other's key with no
error. Program the key inside aes_lock on every operation.
Assisted-by: Claude:opus-4-8
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Crypto driver nested in the Infineon MXCRYPTO mfd driver.
The driver supports select AES and Hash operations.
Assisted-by: Claude:claude-opus-4.7
Signed-off-by: Laura Carlesso <laura.carlesso@infineon.com>
Select CONFIG_MBEDTLS_ENABLE_HEAP upon CRYPTO_MBEDTLS_SHIM=y
only when Mbed TLS library is embedded in Zephyr so that it uses
a dedicated heap, not the system heap.
This change also fixes a build issue occurring since commit c20d1c8646
("modules: tf-m: stop auto-enabling Mbed TLS/PSA Crypto") was merged
that lead to unexpected twister build failure with error message
like the line wrapped below when CRYPTO_MBEDTLS_SHIM is enabled while
Mbed TLS is not embedded in Zephyr (i.e. PSA_CRYPTO_PROVIDER_MBEDTLS
is disabled) as when TF-M provides the PSA Crypto services.
sample.mgmt.osdp.peripheral_device on nrf7120dk/nrf7120/cpuapp/ns
(zephyr/gnu) error (CMake build failure - warning: MBEDTLS_ENABLE_HEAP
(defined at modules/mbedtls/Kconfig.tf-psa-crypto:125,
modules/mbedtls/Kconfig.tf-psa-crypto:125) has direct
dependencies MBEDTLS || (MBEDTLS && 0) with value n, but is
currently being y-selected by the following symbols:)
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add AES and SHA-256 crypto drivers for Realtek Bee SoCs. The AES
supports 128-bit and 256-bit keys with ECB, CBC, CFB, OFB, and CTR
modes.
The SHA-256 driver supports one-shot hash operations. Add devicetree
bindings and disabled nodes for RTL8752H and RTL87x2G, so boards can
enable the accelerators explicitly.
Signed-off-by: Zhiyuan Tang <zhiyuan_tang@realsil.com.cn>
Co-Authored-By: Claude <noreply@anthropic.com>
Signed-off-by: Zhiyuan Tang <zhiyuan_tang@realsil.com.cn>
We updated the XEC clock control driver to support MEC174x/5x
and move away from hard to maintain CMSIS register structures.
Addition device tree properties were added for tuning the driver's
XTAL configuration sequence. Note: MEC15xx does not have the
clock monitor hardware for checking XTAL health and no way to
fallback if the XTAL fails.
Many MEC15xx/MEC172x legacy Zephyr drivers are using XEC specific
clock control driver PCR sleep and reset APIs. Until all old
drivers are converted to use the same functionality from the MEC SoC
layer we must keep these APIs. We converted them to call the SoC
layer. Once all drivers have been converted we can removed these
custom APIs from the clock control driver.
The domain clock-cells parameter was renamed to clkid matching usage
in the DW I2C driver and many other clock control drivers.
We changed domain to clkid in the only two drivers remaining that
use it, interrupt-controller and crypto.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Use #include <> instead of #include "" to include a header file which path
is not relative to the directory path of the file emitting the #include
directive.
This change was made running scripts/check_quoted_includes.py script
proposed in https://github.com/zephyrproject-rtos/zephyr/pull/112135
with Linux shell commands like the one below and manually selecting the
applicable changes: only those located in drivers/ since soc/, boards/,
samples/ and tests/ content related to Espressif is addressed in
pull request https://github.com/zephyrproject-rtos/zephyr/pull/112190.
$ ./scripts/check_quoted_includes.py -w \
`./scripts/get_maintainer.py list "Espressif Platforms"`
Also update drivers/clock_control/clock_control_esp32_priv.h that was
not listed by './scripts/get_maintainer.py list "Espressif Platforms"'.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add support for STM32H5 series to the stm32_hash driver.
Support is added through the STM32 HASH HAL v2 to remain generic.
Signed-off-by: Joel Guittet <jguittet@witekio.com>
All I2C access in crypto_ataes132a goes through
ataes132a_device_config. The i2c field in ataes132a_device_data
field is never written or read.
Signed-off-by: Flavio Ceolin <flavio@hubble.com>
Table 14-1. ATAES132A Configuration Memory Map says
that key config spans from 0xf080 to 0xf0bf for a total of
16 keys. (0xF080 + (keyid < 2)) uses the boolean operator
instead of bit shift operator and produces values.
Signed-off-by: Flavio Ceolin <flavio@hubble.com>
EncryptOK is represented by bits 1 and 2 and the proper
mask is (BIT(1) | BIT(2)) and not (BIT(1) & BIT(2)) that
evaluates always to 0b00.
Signed-off-by: Flavio Ceolin <flavio@hubble.com>
Make static the function ataes132a_atmel_crc implemented in
the private header to avoid possible linkage error if the file
is inlcluded ina different object unit.
Signed-off-by: Flavio Ceolin <flavio@hubble.com>
* Use if, endif to scope the configuration options.
* Add an option to use mbedtls_ct_memcmp instead of memcmp.
Signed-off-by: Georgij Černyšiov <geo.cgv@gmail.com>
Adds AES GCM and CCM support to the STM32 crypto driver.
As the implementation has only been validated on a
limited number of STM32 SoCs, it is enabled only
for platforms that set the DT boolean property
`gcm_ccm_supported`.
Note: To use CCM with additional authenticated data (AD),
the heap memory pool size must be large enough to
accommodate the AD length, rounded up to the nearest
multiple of 16 bytes. For an AD length of 8 bytes,
the heap size must be at least 16 bytes. For an AD
length of 17 bytes, you'll need at least 32 bytes.
Signed-off-by: Georgij Černyšiov <geo.cgv@gmail.com>
Device semaphore handling is being moved out of the do_aes function.
This is necessary to support upcoming GCM and CCM modes,
which require the semaphore to be held during tag generation.
Signed-off-by: Georgij Černyšiov <geo.cgv@gmail.com>
The HASH_InitTypeDef field in the session structure seems unused.
Get rid of it as well as the type alias created just for it.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Having an interface library named "mbedTLS" and the real library named
"mbedtls" (as provided by the Mbed TLS module) is misleading.
This commit replaces:
- mbedTLS -> mbedtls_iface for the CMake library. "mbedTLS" is still
available as alias to "mbedtls_iface" for backward
compatibility, but this should be removed in the future.
- mbedTLS -> Mbed TLS in comments and documentation.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
393350fd65 made it so that the `mbedTLS`
library is only created when `CONFIG_MBEDTLS_BUILTIN`.
Before this commit, users of Mbed TLS did the following:
`zephyr_library_link_libraries_ifdef(CONFIG_MBEDTLS mbedTLS)`
If the `mbedTLS` CMake library doesn't exist but is still linked to
(as is the case when `CONFIG_MBEDTLS && !CONFIG_MBEDTLS_BUILTIN`),
the linker command is populated with `-lmbedTLS` which makes the build
fail because there is no `libmbedTLS.a` in the build.
Make it so that users of Mbed TLS only link to the `mbedTLS` CMake
library when the builtin version is used.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
add driver support for TI MSPM0 AES module
Introduced a hardware accelerated AES driver for the TI MSPM0
enable support for encryption and decryption using ECB and CBC mode
of operation.
Signed-off-by: Girinandha Manivelpandiyan <girinandha@linumiz.com>
Updated PCR and GIRQ properties to use new macros.
Updated symcr and romapi node for mec174x/5x/165xb
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
This commit addresses two integer handling issues in the ataes132a
crypto driver identified by coverity scans.
1. In ataes132a_send_command, added a centralized validation check
to ensure the 'nparams' value, when combined with the 5-byte
packet overhead, does not exceed the 8-bit 'count' limit or the
physical 64-byte command buffer. This prevents a potential wrap-
around that would cause the chip to receive an invalid length byte.
2. In the Atmel CRC calculation, added an explicit cast to uint16_t
during the bit-shift operation. This prevents unintended integer
promotion and satisfies static analysis regarding potential
overflows during the 16-bit CRC generation.
Fixes#84683Fixes#84690
Signed-off-by: David J. Leach, Jr. <tasmar@gmail.com>
Utilize a code spell-checking tool to scan for and correct spelling errors
in all files within:
- `drivers/clock_control`
- `drivers/counter`
- `drivers/crypto`
- `drivers/dai`
- `drivers/debug`
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Adapt all Espressif SoC and driver code to the updated
hal_espressif module synced with IDF master branch.
Main changes:
- clock control: delegate peripheral clock gating to HAL
layer using new clock/reset APIs
- SPI/GDMA: adapt to restructured DMA HAL with new channel
allocation and configuration interfaces
- ethernet: add RMII clock configuration and PHY management
- GPIO: simplify using direct HAL function calls
- flash: adapt to updated SPI flash HAL interfaces
- linker scripts: update IRAM/DRAM mappings for new HAL
object files
- DTS: fix ESP32-S2 PSRAM dcache1 address to match actual
MMU mapping region (0x3f800000 DRAM1 instead of 0x3f500000
DPORT which lacks 8-bit access capability)
- west.yml: update hal_espressif revision
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add hardware crypto drivers for the Bouffalo Lab SEC Engine:
- AES: ECB, CBC, CTR modes with 128/192/256-bit keys
- SHA: SHA-224 and SHA-256 (SHA-384/512 not supported in HW)
- GMAC: Galois MAC (GF(2^128) multiply)
Each sub-block is a separate driver with its own Kconfig and
DT compatible. All drivers recover SEC_ENG_BASE from the DT
sub-block address to work with HAL register offsets.
Signed-off-by: William Markezana <william.markezana@gmail.com>
Remove inclusions that date back to the original addition of this driver
and that are no more required when PSA API is used.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
In ataes132a_aes_ecb_block(), error paths could return after
k_sem_take() without releasing device_sem, leading to a potential
deadlock on subsequent calls.
Ensure k_sem_give() is called on all early-return paths after the
semaphore is taken.
This fixes a potential deadlock when invalid buffer sizes are
detected after acquiring the device semaphore.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Use int return type for command results to avoid truncating negative
errno values and ensure proper error propagation.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
If the clock device (i.e., RCC) failed to initialize, we have bigger
problems than trying to call clock_control_{off,on,configure} on it.
Don't bother checking to save some footprint.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Addressed stability and security issues identified by Coverity in
the ATaes132a crypto driver:
- CID 434625: Added range validation for 'count' to prevent tainted
scalar usage and buffer underflow in response processing.
- CID 487700 & 487763: Implemented overflow guards for 'buf_len' to
prevent integer overflow and type truncation when calling
ataes132a_send_command.
- CID 487746: Applied explicit type casting to CRC calculations to
satisfy static analysis regarding integer promotion.
Signed-off-by: Shreya Kulkarni <kulkarnishreya2421@gmail.com>
As per Zephyr coding guideline #59, "operands shall not be of an
inappropriate essential type". This makes sure boolean variables are
assigned true/false values, not 1/0.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
ataes132a_state is an array of CRYPTO_MAX_SESSION length.
This constant must be used when iterating over its elements
and not ATAES132A_AES_KEY_SIZE (even they having the same
value).
Signed-off-by: Flavio Ceolin <flavio@hubblenetwork.com>
intel_sha_set_resume_length_dw1() never reports errors
and always returns 0.
The error check at the call site is therefore dead code.
Make the function void and drop the unused error handling.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
