Commit graph

124 commits

Author SHA1 Message Date
Evgeniy Paltsev ae79de1930 ARC: MWDT add TLS support
Add thread local storage support for ARC MWDT toolchain.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-11-29 09:48:23 +01:00
Stephanos Ioannidis a9d85ae472 cmake: Deprecate 'xtools' toolchain variant
The `xtools` toolchain variant (aka. Crosstool-NG) was originally
introduced to be used with the Crosstool-NG-based Zephyr SDK
toolchains (i.e. sdk-ng).

This is no longer necessary because the current Zephyr SDK (sdk-ng)
already has its own `zephyr` toolchain variant, which fully replaces
the `xtools` toolchain variant, and the `xtools` toolchain variant
serves no purpose at all.

Signed-off-by: Stephanos Ioannidis <stephanos.ioannidis@nordicsemi.no>
2022-11-17 15:42:48 +09:00
Torsten Rasmussen fd9e5429a3 cmake: detect sysroot for cross-compile toolchains
Fixes: #49587

Try to detect sysroot for cross-compile toolchain if not specified by
the user with `-DSYSROOT_DIR=<path>`.

First, the C compiler is asked if it knows its sysroot, some C compilers
are able to return the sysroot, as an example:
> $ arm-none-eabi-gcc -print-sysroot
> <path>/bin/../arm-none-eabi
> $

but majority of gcc-based C compilers seems to return empty string:
> $ arm-zephyr-eabi-gcc --print-sysroot
> $

in such cases, the cross-compiler target CMake file will try to discover
the sysroot by searching for libc.a, starting one level up from the
compiler location.

If no sysroot candidate is found, a warning will be printed to the user.
If a single sysroot candidate is found, this candidate will be selected.
If multiply sysroot candidates are found, a warning is printed, and the
first candiate in the list is selected. User may select another
candidate with `-DSYSROOT_DIR=<use-this>`.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2022-09-23 16:37:44 +02:00
Keith Packard 1dfc469bd5 toolchain/cross-compile: Allow TLS support selection.
Add a user-settable configuration value indicating whether the toolchain
selected by the cross-compile variant supports thread local storage, using
the default 'n' value to preserve compatibility with existing uses.

Signed-off-by: Keith Packard <keithp@keithp.com>
2022-09-08 21:36:37 +00:00
Keith Packard 7052d52b3b toolchain/xtools: Crosstools-ng supports TLS by default
The Zephyr cross tools configuration which the 'xtools' variant supports
enables TLS, so set TOOLCHAIN_SUPPORTS_THREAD_LOCAL_STORAGE when using it.

Signed-off-by: Keith Packard <keithp@keithp.com>
2022-09-08 21:36:37 +00:00
Torsten Rasmussen 56c827ac2c cmake: use zephyr_get in toolchains to ensure identical behavior.
Fixes: #40389

Update toolchain handling to use zephyr_get() to ensure consistent
handling of CMake cache variables, environment variable, and CMake
local variables.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2022-09-02 15:16:50 +02:00
Torsten Rasmussen 9913fd4f42 cmake: remove deprecated GCCARMEMB_TOOLCHAIN_PATH
Remove deprecated GCCARMEMB_TOOLCHAIN_PATH.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2022-09-02 15:16:50 +02:00
Torsten Rasmussen 8d2998d4f9 cmake: rework of host tools and generic toolchain handling
Follow-up: #41301

This commit is a rework and cleanup of the tools handling in Zephyr
CMake build system.

Instead of directly loading code a CMake modules for tool lookup, the
host tools now follows the CMake `find_package()` pattern for finding
programs / tools in module mode.

This makes it more clear which modules are responsible for finding tools
and which modules provides build integration / features.

The following tools can now be found using `find_package()`:
- Zephyr-sdk        : find_package(Zephyr-sdk <version>)
- Generic host tools: find_package(HostTools)

This further allows us to decouple the `verify-toolchain` CMake script
part required by `twister` into a tool lookup module and a dedicated
CMake script which utilizes the lookup module.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2022-09-01 15:59:43 +02:00
Felipe Neves 6ba5b21337 soc: xtensa: esp32_net: update kconfig
specific of soc to make it compatible to the new toolchain.

Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-08-16 18:06:02 +02:00
Felipe Neves 382b4144e3 soc: xtensa: esp32: fix app cpu boot
procedure by setting its PC to 0 before reset.

Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-08-16 18:06:02 +02:00
Felipe Neves bb6e656ec0 soc: esp32_net: added esp32_net as an option
to use esp32 core 1 as a separate CPU, also
provide infrastructure to load firmware to
that CPU

Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-08-16 18:06:02 +02:00
Chen Peng1 d8fa857b19 LLVM: add built-in lld linker support for x86.
add support to use LLVM built-in lld linker to build
zephyr applications for x86 platforms.

Signed-off-by: Chen Peng1 <peng1.chen@intel.com>
2022-06-05 14:10:25 +02:00
Yuval Peress 53ef68d459 include: Prefix includes to use a scope
Move include paths and add new target_include_directories to support
backwards compatibility:
* /include -> /include/zephyr
  example: <irq.h> -> <zephyr/irq.h>

Issue #41543

Signed-off-by: Yuval Peress <peress@google.com>
2022-04-08 19:03:32 +02:00
Nazar Kazakov 9713f0d47c everywhere: fix typos
Fix a lot of typos

Signed-off-by: Nazar Kazakov <nazar.kazakov.work@gmail.com>
2022-03-14 20:22:24 -04:00
Ederson de Souza 41d05fccd6 cmake: Add xcc-clang toolchain
Instead of setting XCC_USE_CLANG=1, this patch adds xcc-clang toolchain
that is basically xcc using the clang compiler.

Initially, the new toolchain simply includes files from current xcc
toolchain and (re)sets some variables. This should be a more scalable
approach to diverge the toolchains in the future than placing
"if($ENV{XCC_USE_CLANG})" at several places.

It should also help to filter tests that run (or not) exclusively with
the clang variant of XCC on twister.

The XCC_USE_CLANG flag is documented as deprecated, and a message is
emitted during build if still in use. Its new behaviour is to instruct
Zephyr to use `xcc-clang` toolchain.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-02-25 11:17:06 -05:00
Daniel Leung 83939c267c cmake: force assembler ID to be GNU for GCC-based XCC
GCC-based XCC uses GNU Assembler (xt-as). However, CMake doesn't
recognize it when invoking through xt-xcc. This results in CMake
going through all possible combinations of command line arguments
while invoking xt-xcc to determine assembler vendor. This multiple
invocation of xt-xcc unnecessarily lengthens the CMake phase of
build, especially when XCC needs to obtain license information
from remote licensing servers. So here forces the assembler ID
to be GNU to speed things up a bit.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-02-01 18:19:43 -05:00
Torsten Rasmussen 92a1ca61eb cmake: remove xtensa workaround in Zephyr toolchain code.
Remove xtensa specific workaround as this code is now present in Zephyr
SDK cmake code.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-12-17 14:23:49 +01:00
Torsten Rasmussen fb3a113eb8 cmake: zephyr toolchain code cleanup
With the revert of commit 820d327b4618d587a9cae0d085f00c6ab9c81cf2 then
some additional code can be cleaned up.

This removes the final left-overs from Zephyr SDK 0.11.1 support and
older.

It further aligns message printing when including Zephyr SDK toolchain
to other toolchain message printing.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-12-17 14:23:49 +01:00
Torsten Rasmussen e747fe73cd Revert "cmake: Zephyr sdk backward compatibility with 0.11.1 and 0.11.2"
This reverts commit 820d327b4618d587a9cae0d085f00c6ab9c81cf2.

Commit b973cdc9e8 updated the minimum
required Zephyr SDK version to 0.13.

Therefore revert commit 820d327b4618d587a9cae0d085f00c6ab9c81cf2 as
backward support for 0.11.1 and 0.11.2 is no longer required.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-12-17 14:23:49 +01:00
Sylvio Alves e47eeec810 toolchain: esp32: define target toolchain
In order to retrieve TOOLCHAIN_NAME from Kconfig,
generic.cmake points to any toolchain as a
boilerplate implementation. Now, target.cmake file handles
proper toolchain selection.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-09-28 20:06:25 -04:00
Torsten Rasmussen 36bb00d1f5 armclang: ARM Compiler C library support
Support for ARM Compiler C library.

This commit add support for the ARM Compiler C libary in:
- Kconfig
- libc/armstdc

A new Kconfig symbol is added to allow a toolchain to specify if they
support linking with the minimal C library.
Also the CMake variable `TOOLCHAIN_HAS_NEWLIB` is exported to Kconfig
so that CONFIG_NEWLIB_LIBS can only be enabled if the toolchain has
newlib.

The armclang toolchain selects the CMake scatter file generator and
disables support for the LD linker template which is not supported by
armlink.

For the ARM Compiler C library, a corresponding lib/libc/armstc/ folder
with a minimal implementation to work with the ARM Compiler C library
is added.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-08-30 08:54:23 -04:00
Torsten Rasmussen 93f0d0d528 armclang: warn on non-Ninja generator for CMake 3.20.
When using ARMClang linker and scatter files (armlink) then all
libraries are linked as object libraries using `$<TARGET_OBJECTS:lib>`.

CMake version 3.20 only has limited support for such linking:
> Referencing $<TARGET_OBJECTS> in target_link_libraries calls worked
> in versions of CMake prior to 3.21 for some cases, but was not fully
> supported.

One of those cases that do not work is Unix Makefiles generators.

As only Ninja is currently verified to work, this commit will check the
CMake version in use and the generator, and if CMake version <=3.21 is
used with non-Ninja generator then an error is raised informing user
to either use Ninja generator or update CMake.

As the Ninja generator has been confirmed to work as expected, then that
generator is accepted with CMake 3.20 and older.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-08-30 08:54:23 -04:00
Torsten Rasmussen 40a2ffd2ea armclang: support for armclang compiler and armlink linker
This is the initial support for the armclang compiler together with the
armlink linker.

Introduced in this commit:
- armclang compiler support
- armlink linker support
- armlink scatter file generator for scatter loading
- dual pass linker script generation

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-08-30 08:54:23 -04:00
Iuliana Prodan e310367c09 cmake: add support for NXP i.MX
Xtensa GCC needs a different toolchain per SOC,
so add support for i.MX8.
If SOC_SERIES is imx8, that's for i.MX8QM and
i.MX8QXP.
If SOC_SERIES is imx8m, that's for i.MX8MP.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-08-28 23:27:02 -04:00
Glauber Maroto Ferreira ed63e2a562 soc: esp32s2: add initial soc support files for esp32s2
by adding specific soc files for esp32s2 bring-up, such as:
- linker script
- soc initialization code
- initial device tree source files
- esp32s2 saola board support.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-07-28 21:09:27 -04:00
Chen Peng1 98f324000c cmake: oneApi: add oneApi support on windows
The icx compiler of oneApi will invoke clang-cl on windows,
this is not supported in zephyr now, so change to use
clang directly.
And the clang from oneApi can't recognize those cross
compiling target variables of cmake, such as
CMAKE_C_COMPILER_TARGET, so used other cmake functions
to pass them to clang.

Signed-off-by: Chen Peng1 <peng1.chen@intel.com>
2021-07-27 07:20:12 -04:00
Anas Nashif 29d35ced53 cmake: llvm: llvm has no newlib
llvm does not have newlib integrated for all architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-04-22 07:42:58 -04:00
Nicolas Pitre 5a1d069ae7 cmake: pick up some crumbs after the arm/arm64 split
Pick up some crumbs after the arm/arm64 split.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-04-01 01:03:04 -05:00
Carlo Caione 3539c2fbb3 arm/arm64: Make ARM64 a standalone architecture
Split ARM and ARM64 architectures.

Details:

- CONFIG_ARM64 is decoupled from CONFIG_ARM (not a subset anymore)
- Arch and include AArch64 files are in a dedicated directory
  (arch/arm64 and include/arch/arm64)
- AArch64 boards and SoC are moved to soc/arm64 and boards/arm64
- AArch64-specific DTS files are moved to dts/arm64
- The A72 support for the bcm_vk/viper board is moved in the
  boards/bcm_vk/viper directory

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-31 10:34:33 -05:00
Anas Nashif 1bb4e71bf2 toolchain: add support Intel oneApi toolchain based on llvm
This adds preliminary support for the oneApi toolchain for X86. The
toolchain is available from here:

   https://software.intel.com/content/www/us/en/develop/tools/oneapi/base-toolkit/download.html

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-03-25 08:54:10 -04:00
Anas Nashif 1d949ee20f cmake: llvm: use lld
Use lld linker instead of ld.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-03-25 08:54:10 -04:00
Anas Nashif 01b1ac8c7e xcc: do not assume clang by default
Some toolchain variants come with no clang support, so do not assume
clang by default and enable this using the enviornment variable
XCC_USE_CLANG.

export XCC_USE_CLANG=1

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-03-08 16:04:28 -05:00
Anas Nashif 7c15ccf8ca xcc: do not make assumptions about toolchain path
the toolchain path can either be part of a full SDK install or
standalone, support both modes.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-03-08 16:04:28 -05:00
Torsten Rasmussen d162e9e1ff cmake: twister: Using common script for toolchain setting verification
Fixes: #30713

Now using the common script `verify-toolchain.cmake` for verifying
toolchain settings.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-02-04 20:05:05 -05:00
Anas Nashif 08253db46b xtensa: set toolchain variant per SoC
The toolchain variant per SoC is not always the soc name, so set this
per SoC and use this in the SDK instead of hardcoding the soc name.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-20 14:30:50 -05:00
Martin Åberg e15297e7d9 cmake: Preparation for SDK 0.12 and SPARC
Zephyr SDK version 0.12 is distributed with SPARC cmake target support,
while version 0.11.3 and 0.11.4 need target.cmake from the Zephyr repo.

This commit has been tested with:
- zephyr-sdk-0.11.3 (currently used in CI)
- zephyr-sdk-0.11.4
- zephyr-sdk-0.12.0-beta-2

This commit is expected to be compatible with
- zephyr-sdk-0.12.0 (not yet released)

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-19 16:57:37 -05:00
Keith Packard 1201bd6418 xtools: Select correct ARM architecture for xtools
Just like the zephyr SDK code, the xtools toolchain needs to select
aarch64-zephyr-elf instead of arm-zephyr-eabi for the target triple when
building for 64-bit ARM processors.

Signed-off-by: Keith Packard <keithp@keithp.com>
2020-11-19 10:32:35 -06:00
Martin Åberg 97f6dfdd72 cmake: SPARC workaround for SDK toolchain 0.11
Zephyr SDK version 0.11.3, 0.11.4 and 0.12.0-beta-1 does not have
the required SPARC target support.

Zephyr CI is currently using SDK 0.11.3, which causes the following
build error:

CMake Error at /workdir/zephyr/cmake/compiler/gcc/target.cmake:10
(message):
  C compiler /opt/sdk/zephyr-sdk-0.11.3//bin/-gcc not found - Please
  check your toolchain installation

This patch adds a workaround such that the SDK target.cmake is picked
up from the directory 0.11 when ARCH=sparc.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-13 14:53:55 -08:00
Martin Åberg f8d1a9e5ea cmake: Added SPARC support
This commit defines the tool prefix and command line options for the
Zephyr SPARC architectural port.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-13 14:53:55 -08:00
Anas Nashif 03de10091a clang: use LLVM_TOOLCHAIN_PATH instead of CLANG_ROOT_DIR
Be consistent with other toolchains.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-02 14:30:37 -05:00
Anas Nashif 7fe8198102 llvm: add support for building x86_64-pc
set triplet for 64bit x86.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-02 14:30:37 -05:00
Anas Nashif 39bd354389 clang: remove cache handling
This is taking too long for every run and does not seem to work as
expected and wastes time instead of saving it. Remove for now..

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-02 14:30:37 -05:00
Anas Nashif 483b4ff030 cmake: work around sdk toolchain configuration for xtensa [REVERTME]
until we have this change in the SDK where we should not depend on
SOC_NAME but a new identifier.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-10-21 06:38:53 -04:00
Andy Ross 544a38ee62 soc/xtensa/intel_adsp: Upstream updates
Significant rework of the Intel Audio DSP SoC/board layers.  Includes
code from the following upstream commits:

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Thu Jun 25 16:34:36 2020 +0100

    xtesna: adsp: use 50k ticks per sec for audio

    Audio needs high resolution scheduling so schedule to nearest 20uS.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 24 13:59:01 2020 -0700

    soc/xtensa/intel_adsp: Remove sof-config.h includes

    This header isn't used any more, and in any case shouldn't be included
    by SoC-layer Zephyr headers that need to be able to build without SOF.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Sat Jun 20 15:42:58 2020 -0700

    soc/intel_adsp: Leave interrupts disabled at MP startup

    This had some code that was pasted in from esp32 that was inexplicably
    enabling interrupts when starting an auxiliary CPU.  The original
    intent was that the resulting key would be passed down to the OS, but
    that's a legacy SMP mechanism and unused.  What it actually did was
    SET the resulting value in PS.INTLEVEL, enabling interrupts globally
    before the CPU is ready to handle them.

    Just remove.  The system doesn't need to enable interrupts until the
    entrance to the first user thread on this CPU, which will do it
    automatically as part of the context switch.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 23 13:57:54 2020 +0300

    dts: intel_cavs: Add required label

    Add required label fixing build for CAVS15, 20, 25.
    Fixes following errors:
    ...
    devicetree error: 'label' is marked as required in 'properties:' in
    bindings/interrupt-controller/intel,cavs-intc.yaml,
    but does not appear in
    ...

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 23 15:19:56 2020 +0300

    soc: cavs_v18: Remove dts_fixup and fix build

    Remove unused now dts_fixup.h and fix build with the recent code base.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 23 15:12:25 2020 +0300

    soc: cavs_v20: Remove dts_fixup and fix build

    Remove unused now dts_fixup.h and fix build with the recent code base.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 23 14:59:23 2020 +0300

    soc: cavs_v25: Remove dts_fixup fix build

    Remove unused now dts_fixup and fix build with the latest code base.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri Jun 12 12:29:06 2020 +0300

    soc: intel_adsp: Remove unused functions

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 17:53:58 2020 +0300

    soc: intel_adsp: Clean up soc.h

    Remove unused or duplicated definitions.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 17:02:23 2020 +0300

    soc: intel_adsp: De-duplicate soc.h

    Move soc.h to common SOC area.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 15:54:19 2020 +0300

    soc: intel_adsp: Remove duplicated io.h

    Move duplicated io.h to common SOC area.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri Jun 12 12:39:46 2020 +0300

    cmake: Correct SOC_SERIES name for byt and bdw

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri Jun 12 12:39:02 2020 +0300

    soc: intel_adsp: Build bootloader only for specific SOCs

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Thu Jun 11 13:46:25 2020 +0100

    boards: xtensa: adsp: add byt and bdw boards WIP

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 10 10:01:29 2020 -0700

    soc/intel_adsp: Make the HDA timer the default always

    The CAVS_TIMER was originally written because the CCOUNT values are
    skewed between SMP CPUs, so it's the default when SMP=y.  But really
    it should be the default always, the 19.2 MHz timer is plenty fast
    enough to be the Zephyr cycle timer, and it's rate is synchronized
    across the whole system (including the host CPU), making it a better
    choice for timing-sensitive applications.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 15:21:43 2020 +0300

    soc: cavs_v25: Enable general samples build

    Enables general samples build for SOC cavs_v25.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 15:13:53 2020 +0300

    soc: cavs_v20: Enable general samples build

    Enable general sample build.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 14:35:13 2020 +0300

    soc: cavs_v18: Fix build general samples

    Fix building general samples for CAVS18.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 14:22:40 2020 +0300

    soc: intel_adsp: Add support for other SOCs

    Support other SOCs in the "ready" message to the Host.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 13:25:39 2020 +0300

    soc: intel_adsp: Move adsp.c to common SOC area

    Move adsp.c to common and clean makefiles.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 17:18:18 2020 +0300

    boards: intel_adsp: Remove dependency on SOF

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue Jun 9 14:29:44 2020 +0100

    soc: xtensa: cavs: build now good for cavs20 + 25

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 15:57:01 2020 +0300

    soc: cavs_v15: Fix build for hello_world

    Fix build for other then audio/sof targets.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 14:50:12 2020 +0300

    sample: audio/sof: Remove old overlays

    Removing old overlays used to switch logging backend.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon Jun 8 15:02:01 2020 +0300

    soc: intel_adsp: Correct TEXT area

    Correct HEADER_SPACE and put TEXT to:
    (HP_SRAM_WIN0_BASE +  HP_SRAM_WIN0_SIZE + VECTOR_TBL_SIZE)

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 14:44:47 2020 +0300

    soc: intel_adsp: Trivial syntax cleanup

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 14:41:07 2020 +0300

    soc: intel_adsp: Fix bootloader script path

    Make it possible to find linker script if build is done not inside
    ZEPHYR_BASE.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue Jun 9 12:10:17 2020 +0100

    soc: xtensa: cavs20/25: fix build with new headers - WIP

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 13:35:38 2020 +0300

    soc: intel_adsp: Fix include headers

    Fixes include headers

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue Jun 9 10:38:50 2020 +0100

    soc: xtensa: cav18: updated headers- WIP

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Fri May 1 15:29:26 2020 -0700

    soc/xtensa/intel_adsp: Clean up MP config logic

    CONFIG_MP_NUM_CPUS is a platform value, indicating the number of CPUs
    for which the Zephyr image is built.  This is the value kernel and
    device code should use to predicate questions like "is there more than
    one CPU?"

    CONFIG_SMP is an application tunable, controlling whether or not the
    kernel schedules threads on CPUs other than the first one.  This is
    orthogonal to MP_NUM_CPUS: it's possible to build a "SMP" kernel on a
    uniprocessor system or have a UP kernel on a MP system if the other
    cores are used for non-thread application code.

    CONFIG_SCHED_IPI_SUPPORTED is a platform flag telling an SMP kernel
    whether or not it can synchronously signal other CPUs of scheduler
    state changes.  It should be inspected only inside the scheduler (or
    other code that uses the API).  This should be selected in kconfig by
    soc layer code, or by a driver that implements the feature.

    CONFIG_IPM_CAVS_IDC is a driver required to implement IPI on this
    platform.  This is what we should use as a predicate if we have
    dependence on the IPM driver for a platform feature.

    These were all being sort of borged together in code.  Split them up
    correctly, allowing the platform MP layer to be unit tested in the
    absence of SMP (c.f. tests/kernel/mp), and SMP kernels with only one
    CPU (which is pathlogical in practice, but also a very good unit test)
    to be built.

    Also removes some dead linker code for SMP-related sections that don't
    exist in Zephyr.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Jun 8 16:41:55 2020 +0100

    soc: xtensa: bootloader - use linker script

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Jun 8 16:26:18 2020 +0100

    soc: xtensa: further fix headers - WIP

    Simplify the directory structure, WIP for cavs20 and cavs25

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon Jun 8 12:59:30 2020 +0300

    soc: cavs_v15: Remove unneeded include

    Remove include fixing build.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun Jun 7 12:37:35 2020 +0100

    soc:xtensa: adsp: remove sof specific code from soc headers

    TODO: v1.8+

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Marc Herbert <marc.herbert@intel.com>
 Date:   Thu Jun 4 23:19:37 2020 -0700

    intel_adsp_*/doc: fix duplicate .rst labels

    Quick fix purely to make the build green again.

    Signed-off-by: Marc Herbert <marc.herbert@intel.com>

 Author: Marc Herbert <marc.herbert@intel.com>
 Date:   Thu Jun 4 22:34:40 2020 -0700

    samples/audio/sof: use OVERLAY_CONFIG to import apollolake_defconfig

    This reverts commit 21f16b5b1d29fca83d1b62b1b75683b5a1bc2935 that
    copied it here instead.

    Signed-off-by: Marc Herbert <marc.herbert@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri Jun 5 12:34:48 2020 +0300

    soc: intel_adsp: Move soc_mp to common

    Moving soc_mp to common SOC area, it still needs fixes for taking
    number of cores from Zephyr Kconfig, etc.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Jun 4 16:05:06 2020 +0300

    soc: intel_adsp: Move memory.h from lib/

    For those files from SOF referencing platform/lib/memory.h we have
    include.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Jun 4 15:20:09 2020 +0300

    soc: intel_adsp: Rename platform.h to soc.h

    Rename to prevent including it from SOF.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Jun 4 11:47:55 2020 +0300

    soc: intel_adsp: Move headers

    Move headers to more convenient place

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Jun 4 11:21:51 2020 +0300

    soc: intel_adsp: More SOC cleaning

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Marc Herbert <marc.herbert@intel.com>
 Date:   Mon Jun 1 15:31:34 2020 -0700

    samples/audio/sof: import sof/src/arch/xtensa/  apollolake_defconfig

    Import modules/audio/sof/src/arch/xtensa/configs/apollolake_defconfig
    into prj.conf and new boards/up_squared_adsp.conf

    Signed-off-by: Marc Herbert <marc.herbert@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Jun 3 15:07:40 2020 +0100

    soc:xtensa: adsp: let SOF configure the DSP for audio

    Let SOF do this for the moment.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Jun 3 15:06:20 2020 +0100

    soc: xtensa: cavs: remove headers similar to cavs15

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 3 15:58:38 2020 +0300

    soc: intel_adsp: Move ipc header to common

    Remove duplicated headers from CAVS to common SOC part

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 3 13:02:09 2020 +0300

    soc: cavs_v15: Remove unneeded headers

    Remove also from CAVS15.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 18:34:11 2020 +0300

    Remove more headers

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Jun 3 14:12:09 2020 +0100

    soc: xtensa: remove cavs sod headers for drivers and trace.

    Duplicate cavs15 headers.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Jun 3 14:05:12 2020 +0100

    samples: move sof dai, dma and clk configs to SOF

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 17:38:45 2020 +0300

    soc: intel_adsp: Remove more duplicated headers

    Remove more headers

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue Jun 2 15:50:03 2020 +0100

    samples: sof: remove pm realted files.

    Use the SOF versions.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 16:55:40 2020 +0300

    WIP: Strip lib from include path

    WIP, pushed for sync

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 14:44:33 2020 +0300

    soc: intel_adsp: Remove more headers

    Remove even more common headers

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 14:00:47 2020 +0300

    soc: intel_adsp: Remove SOF headers

    The headers would be used by audio/sof app directly from SOF module.

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Sat May 30 11:01:26 2020 -0700

    soc/intel_adsp: Alternative log reading script

    This script speaks the same protocol and works with the same firmware,
    but:

    * Is a single file with no dependencies outside the python3 standard
      library and can be run out-of-tree (i.e. with setups where the
      firmware is not built on the device under test)

    * Operates in "tail" mode, where it will continue polling for more
      output, making it easier to watch a running process and acting more
      like a conventional console device.

    * Has no dependence on the diag_driver kernel module (it reads the DSP
      SRAM memory directly from the BAR mapping in the PCI device)

    * Is MUCH smaller than the existing tool.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu May 28 16:17:51 2020 +0300

    Decrease HEP pool size to 192000

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:27:00 2020 +0100

    soc: xtensa: cavs25: complete support for cavs25

    Builds, not tested on qmeu due to missing SOF ROM (TODO)

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:24:26 2020 +0100

    soc: xtensa: cavs20: complete cavs20 support

    Now boots on qemu.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:22:13 2020 +0100

    soc: xtensa: cavs18: complete boot support

    Now boots on qemu.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:19:23 2020 +0100

    soc: xtensa: cavs15: use cavs15 instead of apl as linker soc name

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:16:06 2020 +0100

    TODO: samples: sof: work  around missing trace symbols.

    Disable local trace.
    Needs trace updates finished before this can be removed.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed May 27 15:57:19 2020 +0100

    dts: xtensa: rename apl to cavs15 DTS

    This DTS is used by more than APL SOC. i.e. all CAVS15 SOCs

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed May 27 15:52:20 2020 +0100

    west: commands: sign: Add signing support for other CAVS targets

    Sign for CAVS15, CAVS18, CAVS20 and CAVS25 SOCs

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed May 27 15:50:07 2020 +0100

    boards: xtensa: cavs: used Zephyr mask macro

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed May 27 15:49:46 2020 +0100

    soc: xtensa: move code to SOF

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue May 26 11:40:36 2020 +0100

    soc: xtensa: use SOF versions of clk

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 18:38:45 2020 +0300

    soc: intel_adsp: Send FW ready for non SOF configuration

    Configure windows and send FW ready when used without SOF, should be
    loaded with fw_loader script.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 18:02:22 2020 +0300

    soc: intel_adsp: Use SOF version of the file

    Use exact copy from SOF module.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 17:47:27 2020 +0300

    soc: intel_adsp: Clean up include headers

    Remove SOF mentions from the SOC headers.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 17:43:05 2020 +0300

    soc: intel_adsp: Move SOF specific code to samples/audio/sof

    Move SOF specific code to the SOF sample.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 17:39:42 2020 +0300

    soc: intel_adsp: Use SOF module's version of mem_window.c

    Use exact copy from SOF module.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 17:36:41 2020 +0300

    soc: intel_adsp: Use exact copy from SOF module

    Use SOF module verion of the clk.c

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 14:03:35 2020 +0300

    soc: xtensa: Add {SOC_FAMILY}/common/include path

    Add ${SOC_DIR}/${ARCH}/${SOC_FAMILY}/common/include path if exist.
    Fixes issues for xtensa SOCs.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 25 16:18:50 2020 +0100

    soc: xtensa: cavs common: fix headers for build

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 25 16:10:57 2020 +0100

    soc: xtensa: adsp: add so_inthandlers.h for Intel platforms

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 25 16:08:26 2020 +0100

    cmake: xtensa: select correct compiler per CAVS target.

    TODO: what about XCC ?

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue May 19 14:59:26 2020 +0300

    boards: up_squared_adsp: Move SOF configuration to samples

    Move SOF-specific configuration to samples/audio/sof prj.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri May 15 15:29:50 2020 +0300

    soc: intel_adsp: Move SOF code to modules/audio/sof

    Move SOF dependent code out of SOC area.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu May 14 17:30:38 2020 +0300

    Move task_main_start() to audio/sof sample

    Start task_main_start() from main of audio/sof sample.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed May 13 15:37:20 2020 +0300

    Rename up_xtreme_adsp to intel_adsp_cavs18

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon Apr 27 14:12:59 2020 +0300

    Add sample audio/sof for SOF initialization

    Add dedicated sample where we put SOF specific initialization.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 11 18:49:36 2020 +0300

    WIP: soc: cavs_v18: Cleanup

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 11 15:44:06 2020 +0300

    soc: cavs_v15: Move soc init to common part

    Moving SOC init to the right place.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 11 15:02:28 2020 +0300

    soc: intel_adsp: Move common part to special dir

    Moving common part to common/adsp.c

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri May 8 14:37:50 2020 +0300

    boards: up_xtreme_adsp: Add initial up_xtreme_adsp board

    Add initial board copying existing up_squared_adsp board and using
    CAVS1.8 SOC family.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu May 7 15:30:51 2020 +0300

    soc: intel_adsp: Generalize bootloader

    Move bootloader to soc/xtensa/intel_adsp making it available for other
    boards.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue May 5 21:31:00 2020 +0100

    boards: xtensa: up_squared: Add support for all CAVS

    Add boot support for all CAVS versions. TODO: needs to be made common

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue May 5 21:25:34 2020 +0100

    soc: xtensa: intel_adsp: Manage cache for DMA descriptors

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 4 21:10:50 2020 +0100

    soc: xtensa: adsp: use 24M567 clock

    Use audio clock

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 4 10:04:01 2020 +0100

    xtensa: soc: adsp: enable system agent

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun May 3 15:03:07 2020 +0100

    soc: xtensa: intel_adsp: increase mem pool to 192k

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun May 3 15:02:31 2020 +0100

    soc: xtensa: intel_adsp: re-enable DMA trace

    Buffer will be empty (as trace items sent to Zephyr LOG) but
    logic is running.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun May 3 11:18:55 2020 +0100

    soc: xtensa: intel: dont use uncache region yet.

    Some code was still using this region. Use later.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun May 3 10:07:28 2020 +0100

    soc: xtensa: intel_adsp: fix notifier init

    Topology now loads.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 1 21:18:38 2020 +0100

    boards: up2: Need to use sof config for bootloader

    This will need uncoupled at some point. For testing today.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 1 21:16:38 2020 +0100

    boards: up2: increase heap to 128k

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Apr 30 11:35:19 2020 +0300

    boards: up_squared_adsp: Use bigger HEAP

    Use HEAP from old demo.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 1 16:06:32 2020 +0100

    soc: xtensa: intel_adsp: Fix config.h naming collisions

    Rename sof version to sof-config.h

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Apr 30 11:22:42 2020 +0300

    Small cleanups

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 29 22:00:44 2020 +0300

    tests: sof/audio: Test ll scheduler

    Add more tests for scheduler.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 29 18:38:35 2020 +0300

    tests: Add first schedule test

    Add initial test for testing scheduling.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 29 13:36:23 2020 +0100

    soc: xtensa: rmeove build warnings

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 28 18:04:33 2020 +0300

    soc/intel_adsp: Register sof logging

    Register sof logging for tracing

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 28 14:16:55 2020 +0300

    boards: up_squared_adsp: Define HEAP_MEM_POOL_SIZE

    Define HEAP_MEM_POOL_SIZE when SOF enabled.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 28 10:09:20 2020 +0300

    tests: audio/sof: Add interrupt API for testing

    Add initial interrupt API for testing.

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 27 15:54:28 2020 +0100

    soc: xtensa: adsp: Update linker script for SOF sections.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 27 11:20:01 2020 +0100

    soc: xtensa: adsp: send SOF FW metadata as boot message

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun Apr 26 21:47:20 2020 +0100

    soc: xtensa: adsp: re-enable all SOF IP init.

    Do all SOF IP init.

    TODO: ATOMCTL, WFI on LX6

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sat Apr 25 15:30:40 2020 +0100

    soc: xtensa: irq: Make sure IPC IRQ is registered.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 22 20:56:09 2020 +0300

    tests: sof: Enable console

    Enable console for the test.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 22 17:57:22 2020 +0300

    soc: cavs_v15: Fix XTENSA_KERNEL_CPU_PTR_SR

    Use correct value for XTENSA_KERNEL_CPU_PTR_SR.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 22 14:48:31 2020 +0300

    tests: audio/sof: Add tests for alloc API testing

    Add initial tests for allocation API testing. Can be extended for
    other later.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 21 17:49:32 2020 +0300

    logging: Enable xtensa simulator backend for ADSP

    Enable xtensa simulator backend for SOC_FAMILY_INTEL_ADSP.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 20:58:30 2020 +0100

    soc: xtensa: add common cpu logic

    Support for additional cores.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 21 10:11:07 2020 +0300

    Update west.yaml to point to the latest repo

    Update west.yaml

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:17:01 2020 +0100

    soc: xtensa: cavs: Fix build for clk.c on cavs18+

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:05:31 2020 +0100

    soc: xtensa: cavs15: removed unused headers.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:05:09 2020 +0100

    soc: xtensa: cavs25: align with SOF headers

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:03:52 2020 +0100

    soc: xtensa: cavs20: align with SOF headers

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:03:09 2020 +0100

    soc: xtensa: cavs18:  Align with SOF headers.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 11:42:39 2020 +0100

    west: sof: Updated to latest version.

    Now builds, links and runs SOF code (but not to FW ready).

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun Apr 19 13:28:53 2020 +0100

    xtensa: intel adsp: build in SOF symbols if CONFIG_SOF

    Code now fully links against SOF. Needs to be run tested.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Wed Apr 15 10:19:28 2020 -0700

    DO NOT MERGE: temporarily add thesoftproject as remote for sof module

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Wed Apr 15 10:33:40 2020 -0700

    ipm: cavs_idc: use the IPC/IDC definitions in SoC

    The SoC definitions have the necessary IPC/IDC bits so there is
    no need to define them separately.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 15 14:30:20 2020 +0100

    TODO: config: Use static config for SOF module.

    TODO: needs to be generated as part of SOF kconfig

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri Apr 10 21:56:07 2020 +0100

    HACK: Add SOF into build

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 15 13:55:15 2020 +0100

    west: modules: Add SOF audio module.

    Add support for building SOF as a Zephyr module. This is the starting
    point for add SOF audio into Zephyr. Currently builds but does not use
    any symbols yet.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 15 13:48:48 2020 +0100

    WIP soc: adsp-cavs15: Use same include directory structure as SOF

    Use the same directory structure as SOF to simplify porting and allow
    SOF to build without Zephyr until porting work is complete.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 15 13:43:44 2020 +0100

    WIP soc: adsp-common: Use same include directory structure as SOF

    Use the same directory structure as SOF to simplify porting and allow
    SOF to build without Zephyr until porting work is complete.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 14:36:32 2020 +0000

    WIP: soc: adsp-common: cache is common across all Intel ADSP platforms

    De-duplicate soc.h cache definitions.
    TODO: this needs done for other common functions.
    TODO: need to fix include path

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 30 11:07:43 2020 -0700

    WIP: soc: cavs25: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 30 11:07:12 2020 -0700

    WIP: soc: cavs20: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 30 11:06:40 2020 -0700

    WIP: soc: cavs18: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Mon Mar 30 12:37:17 2020 -0700

    soc: intel_adsp: use main_entry.S in common for cavs_v15

    The files are identical anyway.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Mon Mar 30 11:38:14 2020 -0700

    soc: intel_adsp/cavs_v15: link common code

    Let cavs_v15 link against the code compiled under common/.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 13:08:28 2020 +0000

    WIP: soc: common: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 14:37:32 2020 +0000

    WIP soc: adsp-cavs15: build power down support

    Build the power down support for CAVS1.5

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 12:40:17 2020 +0000

    WIP: soc: cavs15: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 14:30:08 2020 +0000

    soc: cavs15: Add missing SHIM registers.

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 9 15:43:01 2020 +0000

    xtensa: intel_adsp/cavs_v15: fix usage of LP SRAM power gating

    Remove LSPGCTL as it can cause confusion, use SHIM_LSPGCTL instead.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Feb 26 15:28:48 2020 +0000

    boards: up_squared_adsp: Use local xtensa HAL instead of SDK HAL

    SDK HAL is deprecated for Intel ADSP SoCs so fix and use local HAL
    module.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>
    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Mon Mar 30 10:45:15 2020 -0700

    soc: add Intel Audio DSP SoC family

    This creates a SoC family for the audio DSPs on various
    Intel CPUs. The intel_apl_adsp is being moved into
    this family as well, since it is part of the CAVS v1.5
    series of DSPs.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Mon Mar 30 11:29:02 2020 -0700

    soc: xtensa: add CMakeLists.txt

    Add CMakeLists.txt under soc/xtensa so that CMakeLists.txt
    inside each SoC directory will be included, similar to
    what ARM and RISCV have.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 17 12:30:43 2020 -0700

    Revert "boards: up_squared_adsp: Add flasher script"

    This reverts commit 80f295a9dd.

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 17 12:30:32 2020 -0700

    Revert "boards: up_squared_adsp: Update logtool tool"

    This reverts commit 7770d182c1.

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 17 12:30:23 2020 -0700

    Revert "soc: intel_adsp: Generalize bootloader"

    This reverts commit d6a33ef467.

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>

    soc: xtensa; intel: remove sof-config.h - SQUASH

    No longer used.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-10-21 06:38:53 -04:00
Wayne Ren b868018b51 cmake: add metaware toolchain support in build system
* add metaware toolchain support in build system:
   * compiler
   * linker
   * binutils
     * gcc objcopy is used because it can't be replaced
       with mwdt's binutils currently
* To use ARC metaware toolchain, you'd better:
   * in Linux/Unix environment
   * install arc gcc/zephyr toolchain to use gnu's objcopy
     tool
   * set ZEPHYR_TOOLCHAIN_VARIANT=arcmwdt

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-09-05 10:22:56 -05:00
Kumar Gala a15c8717e3 cmake: Set TOOLCHAIN_ARCH based on OS_PLATFORM
To support a host environment of aarch64 (arm64) or x86_64 set
TOOLCHAIN_ARCH based on what OS_PLATFORM reports (which Linux will be
result of 'uname -m').

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-08-07 06:54:18 -05:00
Torsten Rasmussen c519f6ee87 cmake: fix usage of Zephyr SDK tools with 3rd party toolchains
Fixes: #25183

This commit fixes the issue where combining a 3rd party toolchain with
Zephyr SDK Tools would result in the Zephyr SDK overruling the toolchain
in use.

This is fixed by keeping track of current toolchain variant.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-05-19 17:12:11 +02:00
Torsten Rasmussen b557bd90a6 cmake: Zephyr sdk backward compatibility with 0.11.1 and 0.11.2
This commit introduces backward compatibility with Zephyr SDK 0.11.1
and 0.11.2 so that users having one of those versions installed can
continue to use that version.

This remove the need to force users to update their SDK.

This is kept in independent commit to ensure it can easily be reverted
when minimum required Zephyr SDK is bumped to version 0.12.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-05-08 17:15:55 +02:00
Torsten Rasmussen 299a154fdd cmake: Zephyr sdk package handling
This commit introduces Zephyr SDK CMake config package.

This removes the need for setting ZEPHYR_SDK_INSTALL_DIR and
ZEPHYR_TOOLCHAIN_VARIANT when using Zephyr SDK in Linux.
It also allows to introduces never SDKs without breaking Zephyr.

For example, with this PR, the current Zephyr SDK is 0.11.1 but when
releasing 0.12 then the current Zephyr will no longer built.
This PR moves the Zephyr SDK CMake related code to the SDK and thus
allowing to use newer SDKs, as long as they are backwards compatible.

It also allows multiple SDK installations, and will automatically select
the version closet to the required version.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-05-08 17:15:55 +02:00
Martí Bolívar c5f8e9a84b cmake: toolchain: print what we find
Print the name of the discovered toolchain as well as the variable
used to initialize it.

This is nice to know when doing remote support, since users will
sometimes misconfigure their toolchain and not know what that means.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-03-10 14:53:28 +02:00