Add initial support for the nPM1100 EK. The EK is expected to be
connected to Arduino header pins (D2/3/4/5).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Set the name of binaries to be kept when doing device testing and ignore
unrelated subsystems using tags.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Since the commit 2ed292e1be, the HSI48
clock must be explicitly enabled in the devicetree when a peripheral
that depends on the HSI48 clock is enabled.
This commit enables the HSI48 clock for the `ronoth_lodev` board
because it enables the RNG, which requires the it.
Signed-off-by: Stephanos Ioannidis <stephanos.ioannidis@nordicsemi.no>
This restores the 'storage' partition (16 KiB) in the stock layout
(fstab-stock.dts), removed in 9a842588fb, probably by mistake (the
commit description refers to scratch area only).
This was found when building OpenThread Co-Processor sample.
Fixes#53689
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Adds a driver for TDK InvenSense 42688 six axis IMU. Verified using
the sensor shell sample app via:
- sensor info
- sensor get icm42688p@0
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Signed-off-by: Yuval Peress <peress@google.com>
The stm32l562e_dk and b_u585i_iot02a boards have same external NOR
memory. This harmonize both definitions and fix total partition size
to correct 64MB.
Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
* This board was originally configured through its Kconfig to use LSE
instead of LSI for the RTC source clock, so the dts is updated
accordingly.
* Remove the RTC source clock symbol from the Kconfig since it is now
deprecated.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The GCR, PINCTRL, I2C and WUC registers of the it82xx2 will be remapped,
so these device nodes will not be in the it8xxx2.dtsi, these should be
separated to create a it81xx2.dtsi.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
stm32cubeprogrammer runner takes a --reset-mode argument to specify the
type of reset used in the flashing process.
Though, argparse default configuration in python allows shortened command
arguments and it happened that --reset was used on most boards instead
of --reset-mode.
This argparse configuration is being changed in order to prevent shortened
command args (see #53495). As a consequence all board configs using
--reset should be updated to use the full length version.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
1. Add code to setup the PMIC voltages during low
power modes
2. Add Zephyr power states that are supported to
device tree
3. Add low power pin configration for Flash pins
to pinctrl
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
hal_espressif systimer HAL calls are based on 1MHz reference.
This changes systimer driver to allow max clocking reference of 16MHz
and increases soc tick resolution by reducing min delay interval.
This also sets all ESP32-C3 socs to 16MHz hardware cycles reference.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Enable APS64 PSRAM on FlexSPI2 bus, running at 200MHz. This PSRAM is
accessible via the memory mapped AHB region for FlexSPI2 when
CONFIG_MEMC=y
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
ESP32 and ESP32-S2 HW clock are tied to DTS clock configuration.
This changes updates the default configuration to retrieve
this information from DTS.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Fix all line-length errors detected by yamllint:
yamllint -f parsable -c .yamllint $( find -regex '.*\.y[a]*ml' ) | \
grep '(line-length)'
Using a limit is set to 100 columns, not touching the commandlines in
GitHub workflows (at least for now).
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The addresses of the flash and flash controller of the RP2040
SoC were mixed up. There was no clear distinction between the
flash and the flash controller, which was unclear but also
caused a DTC warning.
This commit makes the distinction clearer: The SSI peripheral at
0x18000000 is the flash controller, and the flash itself starts
at 0x10000000. The flash driver and rpi_pico.dts were fixed
accordingly.
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
Add STM32G4x boards support for Power Management with 2 low power
modes: STOP0 and STOP1. LPTIM used as clock source.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
led0 and pwm_led0 are both referring to the same LED. The usage is
mutualy exclusive, as only one pin muxing can be applied.
Disabling child nodes is currently neither supported by gpio-leds device
nor by pwm-leds device. We need to disable either of the devices
completely for correct operation.
Please note that even if disabling of child nodes would be supported, the
devices would be empty anyway, as both have only one singe LED defined at
the moment. Therefore we can completely disable one of the devices in any
case.
Fixes: b876ad9d6f ("boards: arm: rpi_pico: add pwm bindings to
devictree")
Signed-off-by: Oliver Barta <o.barta89@gmail.com>
Add support for Microchip MEC15xx to the XEC clock control driver.
MEC15xx 32KHz clock support uses the same 32KHz source for both the
PLL and peripherals. MEC152x does not include the PCR clock monitor
present in MEC172x. MEC15xx and MEC172x support internal silicon
oscillator, parallel and single ended crystal inputs, and the
32KHZ_PIN input. MEC152x supports fall back to internal silicon
OSC when VTR and 32KHZ_PIN are turned off. Therefore in MEC152x the
internal silicon oscillator can only be disabled if using an external
32KHz which is always on. For MEC152x the driver will only use the
PLL source clock device tree value.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Adds the DTS for the ADC4 on the nucleo_u575zi_q
with pin assignment
vref is the default value 3.3V
Note that b_u585i_iot02a board already has adc4 node.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Enable RTU.SWT (Real-Time Unit.Software Watchdog Timer) instances on
s32z270dc2_r52 boards. Module clock frequency is fixed to 48 Mhz.
Signed-off-by: Quang Bui Trong <quang.buitrong@nxp.com>
If sysclk is set to 72MHz, USB prescaler should be not be set in
order to achieve 48MHz USB clock.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Cleaning up the instances of CODE_LOCATION used in the soc
clock_init and replaced them with the Kconfig
FLASH_MCUX_FLEXSPI_XIP due to the correlation with
the flexspi clocks and the XIP feature of Flexspi.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
This Kconfig is moved to the soc level since it determines
the flexspi clock initialization for XIP.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Add support for SparkFun RED-V Things Plus board that is
a development board with a SiFive FE310-G002 RISC-V SoC.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Add cpu-power-states property in cpu0 node to describe the
two supported power states idle and suspend_to_ram
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Add configurations flashing and debugging for openocd.
The change makes `west debug` and `west flash` use the setting defaultly.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
