michaelh/zephyr

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Author	SHA1	Message	Date
Flavio Ceolin	596e77f562	x86: Early TLS initialization Allow early boot code using thread local storage when it is enabled. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>	2023-08-08 19:08:04 -04:00
Gerard Marull-Paretas	16811660ee	arch: migrate includes to <zephyr/...> In order to bring consistency in-tree, migrate all arch code to the new prefix <zephyr/...>. Note that the conversion has been scripted, refer to zephyrproject-rtos#45388 for more details. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>	2022-05-06 19:57:22 +02:00
Daniel Leung	4b38392ded	x86: add support for thread local storage Adds the necessary bits to initialize TLS in the stack area and sets up CPU registers during context switch. Signed-off-by: Daniel Leung <daniel.leung@intel.com>	2020-10-24 10:52:00 -07:00

Author

SHA1

Message

Date

Flavio Ceolin

596e77f562

x86: Early TLS initialization

Allow early boot code using thread local storage when
it is enabled.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>

2023-08-08 19:08:04 -04:00

Gerard Marull-Paretas

16811660ee

arch: migrate includes to <zephyr/...>

In order to bring consistency in-tree, migrate all arch code to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to zephyrproject-rtos#45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

2022-05-06 19:57:22 +02:00

Daniel Leung

4b38392ded

x86: add support for thread local storage

Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>

2020-10-24 10:52:00 -07:00

3 commits