Nios II does not have a power saving instruction, so there is nothing
to really do here other than ensure that interrupts are in the correct
state when leaving nano_cpu_atomic_idle().
Change-Id: I664c7542dc2fc1795a453d35e183a737dcb20c38
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
For the moment, NIOS2_CPU_SOF must be set with the path to the
CPU configuration. We are checking with Altera on whether we
can directly check in the binary to the source tree.
These scripts depend on tools provided by the Altera Quartus
Prime Lite Edition. This is available for free but requires
registration on Altera's website to obtain.
Change-Id: Ia6cb6c9e43c3e141807a887cb25c47b370a7d8e9
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Altera tools for creating .pof files for flashing onto their
FPGAs require UFM data to be in this special format. Extend
the current 'all' and 'zephyr' targets to additionally create
this .hex file using objcopy, with the same exclusions as the
existing rule for .bin files.
Change-Id: I75293fba47536545359f817a1f2c1ae905b9d25c
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
__start is the CPU's reset vector. In a typical Nios II configuration,
the exception vector is 0x20 bytes after the reset vector, severely
constraining the amount of code that can go in here.
Split this into __start and __text_start. The only thing that __start
really need to do is init the instruction cache and jump into
__text_start.
JIRA IDs placed in comments for missing items.
Change-Id: I3c6b8ed65e8fcf6b6a735b80cf007d0180599230
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Linker scripts for Nios II will also need these headers as it
specifies the device's physical layout and various important
vector addresses.
Change-Id: Ie9efaf19e53d2493eed7b9783052393d7ea9dd0f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Introduce a soc-cflags, soc-cxxflags, and soc-aflags as a means for
SoC specific compiler flags to be set without manipulating Kbuild
options directly.
Change-Id: I2c8f5019fb237429e59717ef96bd4251a61dc1a5
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now matches kernel/nanokernel/include/nano_internal.h.
Change-Id: I4dbbf50aa05c55de42100a6896fe0fa3b26955ec
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
BSP builds for Nios II generate a linker.h and system.h which reflects
the configuration for that CPU. This can vary depending on how the CPU
is wired up in QSYS, so it needs to be at the SOC level--we essentially
treat any given CPU configuration as a SOC in Zephyr build terms.
Include these files from <arch/cpu.h>.
Change-Id: I12f76600107fec1a14a2f9cb82b0f55915ec03a6
Origin: Altera Quartus tools, machine generated
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
ZEP-252 will handle implementation of the code here.
Change-Id: I3e9a6c7cdf2d5a3b0240317b772628fead528095
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
At the moment this just jumps into prep_c, with comments left
on other things that need to be done. Having this here ensures that
the early boot code isn't discarded by gc-sections.
vector_table.c removed, it isn't the right approach for this CPU.
Proper method for initializing reset and exception vectors still
being investigated.
Change-Id: Id7965c671f1a55c42ecfb65119497405a646bec4
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Avoids confusion with .gitignore rules, which were inadequate to
cover all the places where these files are found. At least in
VIM, these files are now syntax highlighted correctly.
Change-Id: I23810b0ed34129320cc2760e19ed1a610afe039e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
These are for any Nios II at this stage of bring-up.
Change-Id: Ie4d0c80df164f81f6615ac35d3f42235b04870f1
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Basic build framework for Nios2. Everything is stubbed out,
we just want to have a build going so that we can start to
parallelize implementation tasks.
This patch is not intended to be functional, but should be
able to produce a binary for all the nanokernel-based
sanity checks.
Change-Id: I12dd8ca4a2273f7662bee46175822c9bbd99202a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
