Commit graph

8 commits

Author SHA1 Message Date
Tahsin Mutlugun
784b3d6ea0 arch: xtensa: Add semihosting support
Add semihosting support for Xtensa architecture.

Existing semihosting instructions are based on ARM, so they are
converted to Xtensa codes before the semihosting call is invoked.

Return codes of read, write and seek calls had to be converted to match
semihosting API definitions.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-06-19 09:36:42 +02:00
Yong Cong Sin
588ccd9698 arch: remove CONFIG_LEGACY_MULTI_LEVEL_TABLE_GENERATION
`CONFIG_LEGACY_MULTI_LEVEL_TABLE_GENERATION` had been deprecated since
#66877 for 2 releases, interrupt controller drivers should have been
updated to use the new `IRQ_PARENT_ENTRY_DEFINE()` macro. Remove it.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2025-01-23 16:32:36 +01:00
Samuel Chee
d9eed167d0 arm: mpu: Unify ARM_MPU kconfig definitions
Previously, there were two separate Kconfig definitions
of ARM_MPU located at:
- arch/arm/core/mpu/Kconfig
- arch/arm64/core/cortex_r/Kconfig

This lead to incomplete default settings and unexpected
missing configurations.

This commit combines the two into a single unified definition
now located at arch/common/Kconfig to prevent this.

Signed-off-by: Samuel Chee <samche01@arm.com>
2025-01-09 11:55:22 +01:00
Yong Cong Sin
5107320075 arch: common: isr_tables: add shell command
Add a shell command to dump the isr_tables.

```CONFIG_SYMTAB=n
uart:~$ isr_table sw_isr_table
_sw_isr_table[1035]

   7: 0x800056e2(0)
  11: 0x80005048(0x80008148)
  22: 0x800054ee(0x80008170)
```

```CONFIG_SYMTAB=y
uart:~$ isr_table sw_isr_table
_sw_isr_table[1035]

   7: timer_isr(0)
  11: plic_irq_handler(0x80008188)
  22: uart_ns16550_isr(0x800081b0)
```

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-08-12 10:10:57 +02:00
Yong Cong Sin
7248efcd59 drivers: intc: update to use multi-level API
Update these multi-level interrupt drivers to use the new API.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-05-25 11:24:32 +03:00
Yong Cong Sin
5d9e266d13 drivers: interrupt_controller: irq_steer: use new multilevel irq impl
Update the NXP's irq_steer driver to use the new multi-level
interrupt implementation.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-05-25 11:24:32 +03:00
Yong Cong Sin
c5f5b964c1 arch: sw_isr: revamp multi-level interrupt architecture
Previously the multi-level irq lookup table is generated by
looping through the devicetree nodes using macros & Kconfig,
which is hard to read and flimsy.

This PR shifts the heavy lifting to devicetree & DT macros such
that an interrupt controller driver, which has its info in the
devicetree, can register itself directly with the multi-level
interrupt architecture, which is more straightforward.

The previous auto-generated look up table with macros is now
moved in a file of its own. A new compatibility Kconfig:
`CONFIG_LEGACY_MULTI_LEVEL_TABLE_GENERATION` is added and
enabled by default to compile the legacy look up table for
interrupt controller drivers that aren't updated to support the
new architecture yet.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-05-25 11:24:32 +03:00
Jordan Yates
070422db46 arch: common: dedicated SEMIHOST symbol
Control the usage of semihosting with a dedicated symbol, instead of
implying semihosting from the usage of `SEMIHOST_CONSOLE`. This allows
semihosting to be used without the semihost console.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2022-04-21 13:04:52 +02:00