Mapping large memory regions at the soc level will consume too
many l2 entries, adding l1 section mapping functionality to
reduce excessive use of l2 entries.
Signed-off-by: CHEN Xing <xing.chen@microchip.com>
Add a new AARCH32_ARMV8_A Kconfig symbol for ARMv8-A processors
running in AArch32 execution state, modelled after the existing
ARMv8-R AArch32 support. ARMv8-A AArch32 execution state is used
by processors such as the Cortex-A32 that implement only the AArch32
state as well as by other ARMv8-A processors that support AArch32
at specific exception levels.
A dedicated Kconfig symbol is needed (compared to simply reusing
ARMV7_A)because ARMv8-A AArch32 shares some code paths with ARMv7-A
and others with ARMv8-R AArch32. This also means that rather than
introducing a new standalone architecture port, the implementation
selectively extends the code paths used by either of these
architectures based on the architectural requirements as detailed
below.
MMU/fault handling: The implementation uses the existing short
descriptor translation table format used by ARMv7-A, sharing
the MMU programming and FSR encodings.
exception modes stack initialization: ARMv8-A AArch32 implements the
same exception modes as ARMv7-A and so reuses the ARMv7-A exception
mode stack initialization framework directly.
VBAR programming: Unlike ARMv7-A, ARMv8-A AArch32 mandates the use of
VBAR to store the vector table base address. So extend the vector
table relocation support already used by ARMv8-R AArch32. Also map
the vectors region from arch-level code rather than requiring each
SoC to provide this.
Arm generic timer support: The Generic Timer is mandatory in ARMv8-A
AArch32 and is accessed via the system register interface rather than
the memory-mapped I/O interface used by some ARMv7-A implementations.
The system-register-based timer path is therefore shared with ARMv8-R
AArch32.
interrupt masking: Reuse the CPSR based interrupt masking used by
ARMv7-A and ARMv8-R AArch32.
SVC based fatal error path: Reuse the SVC based fatal error path
shared by ARMv7-A and ARMv8-R AArch32.
Signed-off-by: Silesh C V <silesh@alifsemi.com>
Allow to configure the MMU for non-cacheable normal memories.
This mode is needed for instance by net samples to access to
to non word-aligned memory.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
IAR doesn't support the __volatile__ keyword, and since the
toolchain.h isn't included by these arm-specific files and
other arm-specific files already uses volatile, I've made
them all use volatile.
Signed-off-by: Lars-Ove Karlsson <lars-ove.karlsson@iar.com>
ARM has deprecated usage of non-shareable device memory.
K_MEM_CACHE_NONE flag used by devices to map physical memory translates
to MT_DEVICE but no MATTR_SHARED attribute is set in such a request.
This results in mapping device memory that is non-shareable.
Depending on the memory interconnect of a SoC, mapping the device memory
as non-shareable can prevent access to the device. Such behavior has
been observed on the TI AM3358 SoC.
To comply with the ARM deprecation notice and prevent access issues to
device memory, all device memory is mapped as shareable.
Signed-off-by: Abe Kohandel <abe.kohandel@gmail.com>
This commit adds implementation of GDB stub for 32-bit ARM. It has been
tested only on the Zynq-7000 SoC and I would like to get any feedback
from others.
The stub still has these issues:
- To implement single stepping, it uses instruction address mismatch
breakpoint, as recommended in ARMv7 reference. The breakpoint control
register is configured (the state control fields) for the "PL0,
Supervisor and System modes only" option. Otherwise the breakpoint
would also halt the processor in abort mode, in which the stub loop
runs. Zephyr kernel runs in the system mode. This works well until the
kernel enables interrupts, as interrupt handlers typically run in
Supervisor mode. Single stepping therefore sometimes "catches" a
handler instead of the next application instruction. I have not tried
User mode, because Cortex-A SoCs do not appear to have the
ARCH_HAS_USERSPACE flag.
Cc: Michal Sojka <michal.sojka@cvut.cz>
Signed-off-by: Marek Vedral <marek.vedral@gmail.com>
This moves the k_* memory management functions from sys/ into
kernel/ includes, as there are kernel public APIs. The z_*
functions are further separated into the kernel internal
header directory.
Also made a quick change to doxygen to group sys_mem_* into
the OS Memory Management group so they will appear in doc.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit follows the parent commit work.
This commit introduces the following major changes.
1. Move all directories and files in 'include/zephyr/arch/arm/aarch32'
to the 'include/zephyr/arch/arm' directory.
2. Change the path string which is influenced by the changement 1.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
It doesn't make sense to keep the aarch32 directory in the
'arch/arm/core' directory as the aarch64 has been moved out.
This commit introduces the following major changes.
1. Move all directories and files in 'arch/arm/core/aarch32' to
'arch/arm/core' and remove the 'arch/arm/core/aarch32' directory.
2. Move all directories and files in 'arch/include/aarch32' to
'arch/include' and remove the 'arch/include/aarch32' directory.
3. Remove the nested including in the 'arch/include/kernel_arch_func.h'
and 'arch/include/offsets_short_arch.h' header files.
4. Change the path string which is influenced by the changement 1
and 2.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
