Add ability to build a UF2 (https://github.com/Microsoft/uf2)
image as an additional output type. This leverages the code
partition offset for the UF2 base address, and a configurable
UF2 family ID.
Includes an unmodified (except for headers for licensing, pylit
disabling) version of the uf2conv.py script copied the UF2
format specification repository, used to convert the bin to UF2.
Origin: UF2 file format specification reference utilies
License: MIT
URL: https://github.com/microsoft/uf2/blob/master/utils/uf2conv.py
commit: 587abb8b909266e9b468d6284f2fbd425235d1b5
Signed-off-by: Pete Johanson <peter@peterjohanson.com>
We will need this to be able to DEVICE_DT_GET() bus devices from
tests/drivers/build_all in an upcoming commit.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Following the idiom used for system calls, add script support to read
the initial application binary to identify which devices are defined,
and to use their offset in the device array as their unique handle
rather than the externally-defined ordinal from devicetree. The
device dependency arrays are updated to use these handles.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This commit moves TFM CMakeLists.txt into Zephyr and relocates the
Kconfig.tfm file under the modules/tfm folder.
Updates the manifest to point to related TFM changes.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Following the idiom used for system calls, add script support to read
the initial application binary to identify which devices are defined,
and to use their offset in the device array as their unique handle
rather than the externally-defined ordinal from devicetree. The
device dependency arrays are updated to use these handles.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This patch implements a service that adds multiendpoint
capabilities to RPMsg. Multiple endpoints are intended to be used
when multiple modules need services from a remote processor. Each
module may register one or more RPMsg endpoints.
The implementation separates backend from the service, what
allows to extend this module to support other topologies like
Linux <-> Zephyr.
Co-authored-by: Piotr Szkotak <piotr.szkotak@nordicsemi.no>
Signed-off-by: Hubert Miś <hubert.mis@nordicsemi.no>
Add PAX[PCIE<->AXI] DMA driver which supports DMA
transfers between host and target memory over PCIe link.
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Firmware implementing the PSCI functions described in ARM document
number ARM DEN 0022A ("Power State Coordination Interface System
Software on ARM processors") can be used by Zephyr to initiate various
CPU-centric power operations.
It is needed for virtualization, it is used to coordinate OSes and
hypervisors and it provides the functions used for SMP bring-up such as
CPU_ON and CPU_OFF.
A new PSCI driver is introduced to setup a proper subsystem used to
communicate with the PSCI firmware, implementing the basic operations:
get_version, cpu_on, cpu_off and affinity_info.
The current implementation only supports PSCI 0.2 and PSCI 1.0
The PSCI conduit (SMC or HVC) is setup reading the corresponding
property in the DTS node.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This script is essentially a Python rewrite of the CMake code we're
using to print boards in cmake/boards.cmake, plus some extra features.
Having this in Python will simplify some later adjustments to our
'usage' build system target in ways that will make its output easier
to read, while simultaneously making 'west boards' more useful.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The QEMU RISC-V VirtIO board is capable:
- 8 x CPU
- 256 MiB RAM
- PMP
- PCI
- ISA string: RVnnIMAFDCSU
- mul/div
- FPU with double precision
- MMU
- Compressed instructions
Devicetree was extracted from QEMU as described in virt.dtsi.
The same .dtsi SOC description is used for 32-bit and 64-bit.
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
This commit is about the it8xxx2 i2c master driver which
includes six SMBus channels. The enhanced channel i2c3,
i2c4, i2c5 are controller which are designed to support
the I2C protocol.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This is a follow-up to commit 1c89837e79.
Update the path to dfu_usb.c after the file was moved, to prevent
compliance checks from failing because of non-existing file listed
in CODEOWNERS.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
I've been working on ESP WiFi drivers for some time now, so I would like
to help review new patches.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This reverts commit cabbd916cf.
This is considered to be useful enough that it should be restored
as a stable Zephyr API.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
NPCX7 includes a 10-bit resolution Analog-to-Digital Converter (ADC). Up
to 10 voltage inputs can be measured and a internal voltage reference
(VREF), 2.816V (typical) is used for measurement. It can be triggered
automatically in Autoscan mode. Each input channel is assigned a
separate result register, which is updated at the end of the conversion.
The CL also includes:
— Add npcx adc device tree declarations.
— Zephyr adc api implementation.
— Add adc definitions of npcx7 in
tests/drivers/adc/adc_api/src/test_adc.c for supporting test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
This adds a sample application for testing
the LiteX clock control driver.
Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This commit adds LiteX SoC Builder clock control driver for MMCM
module. It gives ability to change frequency, phase and duty cycle
on up to 7 clock outputs.
Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
The SAM4L have a unique I2C driver. It shares simultaneously pins for
both master and slave controllers. Each controller have their own
instance. This introduces the TWIM controller that handles only the
master part.
The TWIM controller uses no copy and the driver was prepared to work
with both 7 and 10 bits address. The controller can handler up to 256
bytes for a single transfer allowing long data communication with
almost no CPU intervention.
The driver was wrote specifically to Zephyr. It receives a transfer
list of from upper layers to a specific device on the bus. It programs
the first and second transfer, if it exists, before start. At end of
full read/write interrupt, will program the next data block. This
process repeats until all transfers be executed. The driver uses
interrupt from TWIM to check for erros or program next tranfer.
Future work can enable low power mode on the driver allowing long
transfers with low power consumption.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
