Commit graph

883 commits

Author SHA1 Message Date
Peng Fan 01002a3c8d nxp: imx: support i.MX8MP EVK board
Support i.MX8MP EVK A53 with/without jailhouse hypervisor
 - Add dts/dtsi
 - Add board file

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-03-14 11:28:35 +01:00
Peng Fan d1b8743b37 drivers: console: add jailhouse debug console
Support jailhouse hypervisor debug console

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-03-10 14:05:00 -05:00
Peng Fan 8bfdb6ad5e CODEOWNERS: update CODEOWNERS for i.MX8MM
Update CODEOWNERS for i.MX8MM

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-03-09 09:56:12 -06:00
Sam Hurst 6458649137 stm32: Add STM32 USB TCPC Driver
This commit adds a USB Type-C Port Controller Driver for
the STM32 USB Type-C / USB Power Delivery (UCPD) peripheral

Signed-off-by: Sam Hurst <sbh1187@gmail.com>
2022-03-08 11:08:43 +01:00
Dominik Ermel 92109e1f62 doc/guides/device_mgmt: SMP protocol documentation
The commit adds guide that describes format of SMP reqests/responses
as issued by Zephyr implementation within mcumgr.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2022-03-07 16:45:52 +01:00
Julien Massot c91cb0ce7e MAINTAINERS: add maintainers for Renesas R-Car platform
Update codeowners.
Add maintainers.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2022-03-03 07:46:24 -05:00
Henrik Brix Andersen bfb2471e59 CODEOWNERS: add myself as additional codeowner for CAN
Add myself as additional codeowner for the various CAN driver and
subsystem components.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-03-02 10:03:46 -08:00
Andy Ross 7e9e993796 CODEOWNERS: Add ipm_cavs_host
New driver needs owners (hijack the earlier cAVS wildcard for the
intra-DSP, it's now a legacy thing and essentially unrelated, but is
for the same platform).

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-03-01 09:59:15 -05:00
Jan Van Winkel 94960f72c3 CODEOWNERS: Removed vanwinkeljan
Removed vanwinkeljan as codeowner from:
 * drivers/display
 * dts/posix
 * include/drivers/display.h
 * include/display
 * lib/gui
 * samples/subsys/display
 * samples/drivers/display
 * subsys/cpp
 * subsys/debug/asan_hacks.c
 * subsys/fs/fuse_fs_access.c

Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2022-02-21 22:14:15 -05:00
Tom Burdick 1e9ada4eb9 dma: cavs: Add gpdma derivative of dw dma for cavs
Intel's adsp needs to set, at a minimum, a clocking bit before the driver
can initialize the designware dma controller. In many ways it is the
designware dmac IP but with additional registers and functionality added
on top of it. So the code structure here follows how the hardware
appears to be designed, layered on top of the designware driver.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-02-21 20:59:08 -05:00
Yuriy Vynnychek a8619169c4 drivers: pinmux: remove Telink B91 driver
Removed Telink B91 driver since it is replaced by Pincrl.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2022-02-21 19:41:44 -05:00
Torsten Rasmussen ea082ac2c9 cmake: only write devicetree files when there are changes.
As part of #40167 is was discovered that devicetree headers are always
generated when CMake re-runs.

This causes all source files that directly or indirectly through
included headers to recompile when CMake re-runs, even if there are no
changes to devicetree.

This commits introduces `zephyr_file_copy(...)` similar to
`file(COPY_FILE ...)` from CMake 3.21.
However, as CMake 3.20 is supported by Zephyr we need a zephyr variant
of this function to allow usage with CMake 3.20.

This ensures that only when there are changes to devicetree headers,
then source files will recompile.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2022-02-11 15:47:09 +01:00
Thomas Ebert Hansen 07193f04c3 codeowners: Add Bluetooth controller tests
Add Bluetooth controller tests directory and set it to Bluetooth
controller maintainer (cvinayak) and the Bluethooth controller LLCP
refactoring team.

Signed-off-by: Thomas Ebert Hansen <thoh@oticon.com>
2022-02-04 11:23:05 +01:00
Yonatan Schachter 3266e82055 boards: Added support for the Raspberry Pi Pico board
Added support for Raspberry Pi's Pico board, using
the RP2040 SoC.

Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2022-02-02 16:23:35 +01:00
Yonatan Schachter a2aa02dbc8 drivers: gpio: Added support for raspberry pi
Added GPIO support for the RP2040 SoC. Only one
core is supported.

Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2022-02-02 16:23:35 +01:00
Yonatan Schachter cd7bd5f450 drivers: serial: Added support for raspberry pi
Added a serial driver for the RP2040. Only polling
API is supported.

Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2022-02-02 16:23:35 +01:00
Yonatan Schachter fd59038312 drivers: pinctrl: Added pinctrl driver for RPi Pico
Added a pinctrl driver for the Raspberry Pi Pico series

Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2022-02-02 16:23:35 +01:00
Yonatan Schachter db5b2780bf soc: Added support for Raspberry Pi's RP2040 SoC
Added basic support for the RP2040 SoC. Support
includes booting and starting the kernel, on one
core only.

Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2022-02-02 16:23:35 +01:00
Torsten Rasmussen c8ddc34bb8 scripts: generate image info header file
This commit adds the `gen_image_info.py` script which supports creation
of a header file with image information from the EFL file.

This version populates the header file with:
- Number of segments in the image
- LMA address of each segment
- VMA address of each segment
- Size of each segment

The header file can be used by a secondary build system which needs this
information.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2022-01-22 16:57:31 -05:00
Antony Pavlov 05b9bde34a boards: mips: add Qemu Malta support
The MIPS Malta is an ATX form factor evaluation board made by MIPS
Technologies. Malta board is the most popular platform for MIPS
full-system emulation.

See https://www.linux-mips.org/wiki/MIPS_Malta for details.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2022-01-19 13:48:21 -05:00
Antony Pavlov 76769a42d0 soc: mips: add Qemu Malta support
The MIPS Malta is an ATX form factor evaluation board made by MIPS
Technologies. Malta board is the most popular platform for MIPS
full-system emulation.

See https://www.linux-mips.org/wiki/MIPS_Malta for details.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Remy Luisant <remy@luisant.ca>
2022-01-19 13:48:21 -05:00
Antony Pavlov 9175ed8244 timer: add support for MIPS CP0 timer
This commit adds a kernel device driver for the MIPS CP0 timer.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2022-01-19 13:48:21 -05:00
Antony Pavlov 0369998e61 arch: add MIPS architecture support
MIPS (Microprocessor without Interlocked Pipelined Stages) is a
instruction set architecture (ISA) developed by MIPS Computer
Systems, now MIPS Technologies.

This commit provides MIPS architecture support to Zephyr. It is
compatible with the MIPS32 Release 1 specification.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2022-01-19 13:48:21 -05:00
Flavio Ceolin 9dfbde980b codeowners: Add power domains to the list
Add power domains directory and set it to myself.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-01-19 13:35:32 -05:00
Daniel Leung 11c3b1d379 drivers: mm: add skeleton build files and common funcs
This adds skeleton Kconfig/CMakeLists.txt and common implementation
of some sys_mm_drv_*() functions.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-01-18 19:18:30 -05:00
Anas Nashif c025abd035 ci: remove .buildkite
We do not use buildkite since 11/2021. Remove the folder with buildkite
specific files.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-01-18 13:24:42 -05:00
Yasushi SHOJI 91970adb75 boards: Add Space Cubics OBC Module 1
This is a single board computer for spacecraft OBC (On-board Computer).
It has a Xilinx FPGA with Cortex ARM M3 core with peripherals, UART, CAN
and others.

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2022-01-18 13:21:50 -05:00
Gerard Marull-Paretas 412c051fbf codeowners: add GD32 RISC-V boards
Add myself as a code owner for GD32 RISC-V boards.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-01-11 11:50:35 +01:00
Jakub Rzeszutko f37f8a5dd5 CODEOWNERS: update getopt library location
Getopt has been moved from /lib/utils to /lib/posix hence
CODEOWNERS must be updated accordingly.

Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
2022-01-06 21:26:59 +01:00
Immo Birnbaum 10c046ce25 CODEOWNERS: owner for SoC Zynq-7000, board qemu_cortex_a9
Set code ownership for:
- soc/arm/xilinx_zynq7000
- boards/arm/qemu_cortex_a9

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2022-01-06 11:52:27 -05:00
Lukasz Majewski 23ca8d403a CODEOWNERS: Add entry for stm32 QSPI driver
I would like to add myself (@lmajewski) as the code owner for
stm32's QSPI driver.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2022-01-04 20:47:29 -05:00
Anas Nashif 0fe74a3f9f MAINTAINER: change microchip maintainer
Change maintainer from scottwcpg to jvasanth1

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-01-04 18:41:05 -05:00
Sylvio Alves 0bebdd9f21 CODEOWNERS: Add myself for ESP32 BT HCI driver
Add myself as codeowner for the ESP32 bluetooth HCI driver

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-01-04 09:08:19 -05:00
Krzysztof Chruscinski a2802d96a2 CODEOWNERS: Adding ztress codeowner
Adding nordic-krch as ztress codeowner.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-01-01 07:37:22 -05:00
Lingao Meng 422728e156 CODEOWNERS: Add LingaoM for bbc_microbit_v2 board
Add myself as codeowner for the bbc_microbit_v2 driver

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2021-12-24 20:56:29 -05:00
Dominik Ermel ca1cda28f0 CODEOWNERS: Add myself for mgmt/mcumgr/lib
Add myself as codeowner for the mcumgr library.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2021-12-23 11:18:36 +01:00
Nicolas Pitre faa0b2a848 net: introduce a network packet filter framework
This provides the infrastructure to create network packet filter rules
and to apply them to the RX and TX packet paths. Rules are made of
simple condition tests that can be linked together, creating a facility
similarly to the Linux iptables functionality.

A couple of generic and Ethernet-specific condition tests are also
provided.

Additional tests can be easily created on top of this.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-12-21 17:06:35 +01:00
TOKITA Hiroshi 5c7a0ef888 drivers: interrupt-controller: add Nuclei ECLIC driver
Add support for the ECLIC interrupt controller
which is used with the Nuclei processor core.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
TOKITA Hiroshi c21bc77169 boards: riscv: Add SiPeed Longan Nano platform
SiPeed Longan Nano is a minimal development board
based on GigaDevice's RISC-V processor.
There are 2 board variations.

longan_nano:      GDGD32VF103CBT6 (128K Flash/32K SRAM)
longan_nano_lite: GDGD32VF103C8T6 ( 64K Flash/20K SRAM)

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
TOKITA Hiroshi c9c04e491e soc: riscv: Add initial support for GigaDevice GD32V SoC
Add GigaDevice GD32V SoC.
GD32V has non-standard CSR. It doesn't use common startup code.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
Lukas Gehreke 53dea67733 drivers: modem: Added simcom sim7080 modem driver.
Implemented driver for the simcom sim7080 modem.
This driver features Socket offloading, TCP, UDP, DNS,
SMS, GPS and FTP.

Signed-off-by: Lukas Gehreke <lk.gehreke@gmail.com>
2021-12-20 17:48:47 +01:00
Lingao Meng 20fd6e7cd1 CODEOWNER: Add LingaoM for bluetooth mesh stack
Add muself ad codeowner for bluetooth mesh stack

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2021-12-16 11:02:45 -05:00
Kent Hall 24291b86fd CODEOWNERS: Add kentjhall for STM32 counter driver
Add myself as codeowner for the STM32 counter driver.

Signed-off-by: Kent Hall <kjh2166@columbia.edu>
2021-12-15 16:48:44 -05:00
Bartosz Bilas b8ca12ec14 CODEOWNERS: Add bbilas for INA23X driver
Add myself as codeowners for INA23X driver files.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-12-14 13:48:54 -06:00
Henrik Brix Andersen 33121983e9 doc: reference: promote the canbus subsystem documentation
Promote the Controller Area Network (CAN) subsystem reference
documentation from being part of the networking subsystem documentation
to having its own section.

The networking subsystem primarily deals with IP-based networking,
whereas CAN is a subsystem of its own.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-12-13 17:19:26 -05:00
Aymeric Aillet 50540ed594 driver: i2c: TCA9546A: Rename to TCA954x
Prepare the driver to upcoming support of more mux references.
Rename all TCA9546A related files to TCA954x.
Keep ti,tca9546a and ti,tca9546a-channel compatible
for backward compatibility reasons.
New tca954x-base binding embedding common properties,
tca9546a binding inherits from it and define its own compatibles fields.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-12-13 18:07:08 +01:00
Daniel DeGrasse 130f6eb816 drivers: regulator: add i2c regulator driver
This commit adds a generic i2c regulator driver, and enables the NXP
PCA9420 PMIC IC using this driver. The regulator driver also exposes an
additional API in include/drivers/regulator/consumer.h, which allows
drivers to implement support for adjusting voltage levels and current
limits, if their device supports it.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2021-12-08 08:27:44 -05:00
Dmytro Firsov 31b4e4124d xenvm: drivers: serial: Add consoleio Xen serial driver for Domain 0
This commit adds Xen consoleio serial driver. It is needed to receive
kernel messages from Zephyr in case it runs as Xen privileged domain
(Dom0). There is no console ring buffer for such domain, so regular
uart_hvc_xen driver can not be used (privileged domain input/output
are possible only through consoleio interface).

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2021-12-07 12:15:38 -05:00
Gerard Marull-Paretas 0735160336 codeowners: drivers: timer: include Kconfig files
Make the timer drivers expression more generic to cover both
implementation and Kconfig files.

Missing drivers were added to pass compliance checks. Owners added based
on maintainership, driver author, etc.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-12-04 07:34:53 -05:00
Gerard Marull-Paretas d47700177a scripts: utils: add pinctrl migration script for nRF boards
This script can be used to automatically migrate the Devicetree files of
nRF-based boards using the old <signal>-pin properties to select
peripheral pins. The script will parse a board Devicetree file and will
first adjust that file by removing old pin-related properties replacing
them with pinctrl states.  A board-pinctrl.dtsi file will be generated
containing the configuration for all pinctrl states. Note that script
will also work on files that have been partially ported.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-26 14:20:51 +01:00
Andy Ross ab1baca03f drivers/ipm: Remove intel_adsp_mailbox driver
This is dead code.  It's based on the cAVS "IPC" mechanism to allow
communication to and from the host CPU.  But there is no test rig in
the Zephyr tree for the protocol defined.  And in fact the only
Zephyr-based user of the IPC mechanism (Sound Open Firmware) has its
own IPC driver and speaks its own protocol with the host kernel.  That
driver needs to migrate into Zephyr soon and this legacy bit is just
confusing.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-11-23 13:23:54 -05:00
Jim Shu 73a957e4b3 codeowners: update codeowners of andes_v5 SoC series
Add Andes developers, kevinwang821020 and jimmyzhe as reviewers for
andes_v5 soc, board, dts, and drivers.

Remove Teng-Shih-Wei from reviewers because he doesn't maintain
Zephyr RTOS currently.

Signed-off-by: Jim Shu <cwshu@andestech.com>
2021-11-20 16:07:57 -05:00
Wealian Liao 5a9bc389f0 driver: gpio: nct38xx: Add NCT38XX gpio driver support
NCT38XX series, which are i2c-based chips, support a different number
of GPIO functionality. For NCT3807, it has 2 GPIO ports on the same i2c
device address. For NCT3808, it has 2 GPIO ports on different i2c
device addresses. This commit adds NCT38XX GPIO driver support &
provides the interrupt handler for the share alert pin.

The following is NCT3807 devicetree node example:
```
&i2c0_0 {
	nct3807_0: nct3807@70 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "nuvoton,nct38xx-gpio";
		reg = <0x70>;
		label = "NCT3807_0";

		gpio@0 {
			compatible = "nuvoton,nct38xx-gpio-port";
			reg = <0x0>;
			label = "NCT3807_0_GPIO0";
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <8>;
			pin_mask = <0xff>;
			pinmux_mask = <0xf7>;
		};

		gpio@1 {
			compatible = "nuvoton,nct38xx-gpio-port";
			reg = <0x1>;
			label = "NCT3807_0_GPIO1";
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <8>;
			pin_mask = <0xff>;
		};
	};
};
```

Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
2021-11-20 08:00:38 -05:00
Tim Lin e29a15c0e3 ITE: drivers/serial: add the UART driver for the PM callback function
IT8XXX2 uses shared ns16550.c driver which does not provide a power
management callback(pm_action_cb), so create driver to handle
IT8XXX2 specific UART features.

note: pm_action_cb(old name: pm_control_fn)

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-11-16 21:23:42 -05:00
Ioannis Glaropoulos 2aa9a76700 MAINTAINERS: remove maintainer-ship status for ioannisg
Removing maintainer and/or collaborator status on
- nRF platforms
- TF-M
- userspace
- cmsis-dsp
- MAINTAINERS file

for ioannisg. Replace with @anangl or others, where applicable.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-11-16 20:14:34 -05:00
Aleksander Wasaznik b4bcffb4de CODEOWNERS: Replace joerchan with alwa-nordic
I'm taking over for joerchan at Nordic Semiconductor as a Zephyr
Bluetooth host collaborator.

Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
2021-11-16 07:44:40 -05:00
Gerson Fernando Budke 0de934b2a7 scripts: runner: Introduce gd32isp flash runner
Add GigaDevice ISP console flash runner.  This tool enable uses ROM
bootloader to flash devices using serial port.

The GD32_ISP_Console tool can be found at
  http://www.gd32mcu.com/download/down/document_id/175/path_type/1

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-11-07 05:20:50 -05:00
Sylvio Alves d5aa5c2a77 drivers: esp32: uart: use hal functions
In order to have Espressif SoCs working with
the same uart drivers, all low level functions
are now replaced to hal_espressif HAL calls.

This also changes pinmux, gpio and uart
init order to meet its dependencies.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-11-03 16:47:32 -04:00
Krzysztof Chruscinski 9174cd8dbc drivers: watchdog: Add software watchdog based on counter
Added watchdog implementation which is using counter device
to implement watchdog driver API. Watchdog timeout is called from
counter interrupt context. Some counter implementations support
using ZLI interrupt level which can be use here as well. Watchdog
like this can be used along hardware watchdog to cover for its
limitations, i.e. Nordic watchdog resets unconditionally after
62uS after triggering watchdog interrupt. It is not enough time
to dump logging data.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-11-02 13:22:58 +01:00
Dmytro Firsov d9a3efb834 xenvm: drivers: serial: Implement serial interface to Xen PV console
This commit adds minimal support of Xen hypervisor console via UART-like
driver. Implementation allows to use poll_in/poll_out char interface for
uart_console.c driver directly to HV console instead of using Xen
virtual PL011 UART. Future implementation will support interrupt driven
interface on Xen event channels, currently it is under development.

Also this commit introduces early console_io Xen interface, which allows
to receive printk/stdout messages quickly after start, but requires Xen,
built with CONFIG_DEBUG option.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2021-10-29 15:23:33 +02:00
Immo Birnbaum f668474e4d soc: arm: dts: arm: xilinx: Zynq-7000 SoC init code, device tree data
Add SoC-specific code, the basic device tree and Kconfig data as well
as the corresponding linker command file for the Xilinx Zynq-7000
family of SoCs. This SoC - either as a QEMU simulation or on actual
hardware such as the Avnet/Digilent ZedBoard - is suitable as an ini-
tial target for the ARMv7 Cortex-A support.

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2021-10-28 15:26:50 +02:00
Glauber Maroto Ferreira dcf26d72f5 soc: esp32s2: drivers: flash: add support
to host SPI Flash driver.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-10-28 06:47:21 -04:00
Gerson Fernando Budke 57ca5298b3 CODEOWNERS: Add nandojve for gigadevices
Add myself as codeowners for GigaDevice related files.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-10-28 11:17:25 +02:00
Henrik Brix Andersen 3c6177a445 MAINTAINERS: include the CANopenNode module in the CAN bus group
Include the CANopenNode module integration files in the CAN bus
maintainers group and assign ownership to me.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-10-27 13:44:10 -04:00
Carlo Caione 1976f33e87 drivers: mbox: Introduce MBOX driver class
One limitation of the current IPM API is that it is assuming that the
hardware is only exporting one single channel through which the data can
be sent or signalling can happen.

If the hardware supports multiple channels, the IPM device must be
instantiated (possibly in the DT) several times, one for each channel to
be able to send data through multiple channels using the same hw
peripheral. Also in the current IPM API only one callback can be
registered, that means that only one driver is controlling all the
signalling happening on all the channels.

This patch is introducing a new MBOX API that is supporting
multi-channel signalling and data exachange leveraging and extending the
previous (and outdated) IPM API.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-10-27 18:27:21 +02:00
Nicolas Pitre bc41234104 ethernet: Synopsys DesignWare MAC driver
This is a driver for the Synopsys DesignWare MAC. It should work
with the "DesignWare Cores Ethernet Quality-of-Service" versions 4.x
and 5.x.

This driver uses a zero-copy strategy, meaning that the hardware
reads and writes data directly from/to packet fragment buffers
provided by the network subsystem without first copying the data into
a dedicated DMA bounce buffer.

Platform specific setup is necessary for the hardware to work.
Currently, only the STM32H7X series is implemented and tested.
While this part needs refinement, this driver performs better and uses
far less code space than the HAL-based alternative.

Not yet implemented:

- MDIO (it is WIP, currently relying on default PHY config)
- PTP support
- VLAN support
- various hardware offloads (when available)

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-10-27 10:43:05 -04:00
Gerard Marull-Paretas a0bd3b09ab CODEOWNERS: add myself to pinctrl
Add myself as code owner for pinctrl drivers.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-10-25 15:26:47 -05:00
Martí Bolívar f259790bf8 dts: bindings: fix file names
Make sure binding file names match their compatibles.

Done with a script.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-10-20 07:33:04 -04:00
David Brown 536f511e63 CODEOWNERS: Add myself and Flavio for Mbed TLS
Add us as maintainers for the Mbed TLS module and associated files.

Signed-off-by: David Brown <david.brown@linaro.org>
2021-10-19 19:30:55 -04:00
Henrik Brix Andersen 02fceed732 CODEOWNERS: take ownership of neorv32 specific files
Take ownership of all the neorv32 specific files (dts bindings, soc
implementation, drivers, and board definition).

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2021-10-15 09:46:53 -04:00
Szymon Janc 293a7b2849 codeowners: Add sjanc to Bluetooth tester app
This is used by autoPTS project so make sure Szymon is aware of all
changes in tester application.

Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
2021-10-14 14:51:56 +02:00
Siew Chin Lim 76888a8c4e codeowners: Add code owners for Intel SoC FPGA Agilex
Add code owners for Intel SoC FPGA Agilex board and clock drivers.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-10-12 08:37:03 -04:00
Glauber Maroto Ferreira 26131ba5d4 esp32: drivers: spi: driver refactoring
in preparation to support other esp32-family socs

on top of existing driver.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-10-10 14:52:41 -04:00
Martí Bolívar 51f8588fb8 west.yml: allow users to easily add more modules
Import any manifest files in a new 'submanifests' directory into
west.yml.

This lets users define custom zephyr modules or easily override
built-in modules by dropping their own manifest files into
submanifests/some-user-file.yaml.

Provide an example and a README with links to the relevant
documentation in 'submanifests' to get users started.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-10-07 13:45:42 +02:00
Sam Hurst cb4785542e lib: smf: Add State Machine Framework
Add an application agnostic State Machine Framework library to
Zephyr that provides an easy way for developers to integrate
state machines into their application.

Twister passed:
twister -T tests/lib/smf/

Signed-off-by: Sam Hurst <sbh1187@gmail.com>
2021-10-04 20:33:11 -04:00
Glauber Maroto Ferreira feb340d990 esp32: drivers: clock_control: add ownership
into CODEOWNERS file.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-09-27 22:02:08 -04:00
Yuval Peress a1f6d97978 drivers: syscon: Add support for multiple regions
1. Add support for multiple syscon entries (as a side effect, this also
   fixed syscon.c implementations which weren't being linked to their
   syscon.h counterparts).
2. Add support for different width registers in syscon.
3. Add tests for syscon

Signed-off-by: Yuval Peress <peress@chromium.org>
2021-09-22 10:32:11 -04:00
David Leach a50a16e710 MAINTAINERS: Update NXP platforms maintainer
Maureen Helm is moving on from NXP so moving David Leach to
NXP platforms maintainer.

Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 20:09:49 -04:00
Mateusz Sierszulski a64ce1fc6b drivers: fpga controller: add eos_s3 fpga driver
This adds driver for EOS_S3 SoC FPGA.

Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
2021-09-03 09:54:00 -04:00
Andrzej Głąbek 1bf7c391b8 drivers: audio: dmic: Add support for nRF PDM peripherals
Add a shim that allows using the nrfx PDM driver via the Zephyr API.
Add also missing devicetree nodes representing the PDM peripherals
in the nRF52 Series SoCs.
Extend the "nordic,nrf-pdm" binding with a new property that allows
specifying the clock source to be used by the PDM peripheral (so that
it is possible to use HFXO for better accuracy of the peripheral clock
or, in the nRF53 Series SoCs, to use the dedicated audio oscillator).

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-09-03 09:34:06 -04:00
Christopher Friedt 6c37258f5b scripts: add script to extract top-ten bug-bashers
This script allows us to programmatically query bug-bashers within
a user-supplied time-window.

For example, we held a "Bug Bash Week" August 1-7, 2021 (it was
announced a week early though). The output of the script prints
the "top ten" bug bashers in tab-separated columns in descending
order. The first column is the number of bugs squashed and the
second column is the github user id.

Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2021-09-01 17:06:50 -04:00
Yuriy Vynnychek fde0b96bb7 drivers: i2c: introduce new Telink B91 I2C driver
I2C driver basic support for Telink B91 platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-09-01 06:36:56 -04:00
Jim Shu 9651eae279 codeowners: add owners to andes_v5 soc, board, dts, and drivers.
Add myself and Teng-Shih-Wei as owners for andes_v5 soc series, dts,
adp_xc7k_ae350 board, and device drivers from Andes.

Signed-off-by: Jim Shu <cwshu@andestech.com>
2021-08-30 13:40:14 -04:00
Iuliana Prodan c352413b61 CODEOWNERS: add codeowner for SOF with Zephyr on NXP i.MX8
Add myself and Daniel Baluta as codeowners for i.MX8 related files for
SOF with Zephyr OS.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-08-28 23:27:02 -04:00
Glauber Maroto Ferreira 7da555621c esp32: drivers: gpio: code refactoring
to ease driver code reuse between socs.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-08-27 17:34:41 -04:00
Glauber Maroto Ferreira 17f3792abf esp32: drivers: pinmux: code refactoring
to make use of Espressif's hal in order to ease both
driver maintenance and code reuse between socs.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-08-27 17:34:41 -04:00
Arvin Farahmand f845cddcf7 drivers: Add Ethernet PHY API
This commit adds support for Ethernet PHY drivers via a PHY API.

It also includes a driver for a generic MII compliant PHY
which supports most PHYs on the market.

Separating PHY driver from the SoC specific Ethernet driver
simplifies the Ethernet driver code and enables code re-use.
Drivers for specific PHYs with more advanced features, such as
RGMII delay in PHY can be developed independent of the Ethernet
MAC driver.

Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
2021-08-27 11:43:48 -04:00
Arvin Farahmand 419b103dd6 drivers: Add mdio API
This commit adds support for MDIO bus. The bus is used by Ethernet
MACs to communicate with PHYs.

Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
2021-08-27 11:43:48 -04:00
Evgeniy Paltsev 4aff397f1d CODEOWNERS: add owners for ARC MWDT libC layer
Add condeowner for ARC MWDT libC layer files

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-08-26 11:51:06 -04:00
Maxime Bittan 39614b8960 boards: arm: Add Legend 2.5" boards
This commit adds support for the Legend 2.5" boards (legend25_ssd and
legend25_hdd) based on the STM32F070CB MCU. These boards can be found in
the Seagate FireCuda Gaming Drive, Gaming Drive for Xbox, SSD Gaming
Drive for Xbox, and Gaming Drive for PlayStation devices. Both boards
contain the following hardware components:
- A B1414 LED strip connected to the PA7 pin (SPI MOSI)
- A SPI flash (FM25F005) connected on SPI2 bus

The Legend 2.5" HDD board also contains an activity LED connected on
TIM3 CH3

Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2021-08-23 08:26:23 -04:00
Yuriy Vynnychek 87018c50cc drivers: spi: introduce new Telink B91 SPI driver
SPI driver basic support for Telink B91 SoC.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-08-19 17:18:23 -04:00
Glauber Maroto Ferreira 8e865a7a88 esp32s2: drivers: serial: add minimal uart driver
based on uart rom functions, also enable console driver
on top of this driver, which enables logging

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-08-09 13:03:14 -04:00
HaiLong Yang 9ebbd6771c CODEOWNERS: add owners for stm32 hsem ipm driver
Add condeowner for STM32 HSEM IPM driver files.

Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
2021-08-09 16:11:28 +02:00
Ryan Erickson aec754bd40 CODEOWNERS: @LairdCP/zephyr team owns HL7800
Change owner of the HL7800 modem driver to the
@LairdCP/zephyr team.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2021-08-09 08:00:05 -04:00
Mulin Chao ab87854d9b driver: serial: replace suffix nuvoton with numicro
Replace the suffix "nuvoton" with "numicro" for Nuvoton microcontroller
serial driver.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-08-07 20:37:24 -04:00
Mulin Chao 3cfdf3e81e soc: arm: rename soc/arm/nuvoton as soc/arm/nuvoton_numicro
We try to reduce the ambiguity between 'soc/nuvoton/' and
'soc/nuvoton_npcx' folders. Most if soc vendors name their soc folder by
the company name with SOC_FAMILY suffix instead of the company name
directly. It is clearer if the soc company has different product lines
that aim to specific markets.

In this CL, the 'numicro' suffix is used for Nuvoton Microcontroller
production line. It distinguishes the 'npcx' suffix that used for
Nuvoton Embedded Controller (EC) of Notebook PC product line.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-08-07 20:37:24 -04:00
Yuval Peress 268f9bf163 nuvoton: battery-backed ram
Add bindings and entry for the battery-backed ram in the nuvoton
npcx. This commit is an upstream port of
https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/platform/ec/zephyr/dts/bindings/cros_bbram/nuvoton,npcx-cros-bbram.yaml;l=1;drc=e9af813c36b7b411bf2a01cbc1b09d5fdec49b8a

Along with a bit of cleaning up and an emulator.

Signed-off-by: Yuval Peress <peress@chromium.org>
2021-08-07 20:32:33 -04:00
Yuriy Vynnychek 84db9cd36a drivers: pwm: introduce new Telink B91 PWM driver
PWM driver basic support for Telink B91 SoC.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-08-05 16:11:41 +02:00
Guillaume Lager ca5921845d driver: i2c: Add TCA9546a I2C switch driver
The driver only support use case where the channels are used in mutual
exclusion.
Origin: Original

Signed-off-by: Guillaume Lager <g.lager@innoseis.com>
2021-08-05 11:48:30 +02:00
Yuriy Vynnychek 3e4e9496a1 drivers: entropy: introduce new Telink B91 Entropy driver
Entropy driver basic support for new Telink B91 platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-08-04 15:45:32 +02:00
Yuriy Vynnychek 1c0ed94601 drivers: ieee802154: introduce new Telink B91 IEEE802154 driver
IEEE802154 driver basic support for Telink B91 platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-08-04 11:58:02 +02:00
Felipe Neves d368087fc0 drivers: serial: added minimal uart driver for esp32c3
based on uart rom functions, also enable console driver
on top if this driver enabling logging

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-08-03 11:20:06 -05:00
Yuriy Vynnychek fe0b9e85a3 drivers: flash: introduce new Telink B91 Flash driver
Flash driver basic support for Telink B91 platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-30 19:53:04 -04:00
Enjia Mai c6ef58c4fb CODEOWNERS: add owners for acrn development
Adding myself @enjiamai as codeowners for /board/x86/acrn
for development.

Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
2021-07-29 20:54:28 -04:00
Glauber Maroto Ferreira ed63e2a562 soc: esp32s2: add initial soc support files for esp32s2
by adding specific soc files for esp32s2 bring-up, such as:
- linker script
- soc initialization code
- initial device tree source files
- esp32s2 saola board support.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-07-28 21:09:27 -04:00
Andrzej Głąbek 32da1078da drivers: i2s: Add support for nRF I2S peripherals
Add a shim that allows using the nrfx I2S driver via the Zephyr API.
Add also missing devicetree nodes representing the I2S peripherals
in the nRF52 Series SoCs.
Extend the "nordic,nrf-i2s" binding with a new property that allows
specifying the clock source to be used by the I2S peripheral (so that
it is possible to use HFXO for better accurracy of the peripheral clock
or, in the nRF53 Series SoCs, to use the dedicated audio oscillator).

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-07-28 18:41:26 -04:00
Francois Ramu 8fe0831c6b include: dt-bindings: remove dma header for stm32 soc
All the macro for dma-cells are now in the
include/drivers/dma/dma_stm32.h header file.
So the include/dt-bindings/dma/stm32_dma.h is no more
useful and removed from #include.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-07-22 04:52:53 -04:00
Anas Nashif dfc259d13c action: footprint tracking
Add action and scripts for footprint tracking.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-07-21 14:54:30 +03:00
Yuriy Vynnychek 15818a8245 drivers: serial: introduce new Telink B91 Serial driver
Serial driver basic support for new Telink B91 platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-21 05:37:12 -04:00
Yuriy Vynnychek 6c76b416ee drivers: pinmux: introduce new Telink B91 Pinmux driver
Pinmux driver basic support for new Telink B91 platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-21 05:37:12 -04:00
Yuriy Vynnychek 215cdc7a3c drivers: gpio: introduce new Telink B91 GPIO driver
GPIO driver basic support for new Telink B91 platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-21 05:37:12 -04:00
Jun Lin ec3cc43819 CODEOWNERS: add code owners to dts/arm/nuvoton/
Move @MulinChao, @WealianLiao, and myself from code owners entry
dts/arm/nuvoton/npcx to dts/arm/nuvoton.
So we will be chosen as reviewers automatically when dtsi files under
dts/arm/nuvoton are touched.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2021-07-19 12:14:28 -05:00
Carlo Caione bc30598456 drivers: syscon: Add generic syscon API
A syscon device is a device managing a memory region containing a set of
registers that are not cohesive enough to represent as any specific type
of device. We need a driver for that because several other drivers could
use the same region at the same time and we need to io-map the region at
boot for MMU enabled platforms.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-07-16 21:31:38 -04:00
Glauber Maroto Ferreira 9ae5fd1b34 esp32: drivers: interrupt_controller: add interrupt allocation support
Add interrupt allocation support for ESP32.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-07-16 07:19:28 -04:00
Aymeric Aillet 573d77cff2 drivers: i2c: add Renesas R-Car driver
This patch add support for I2C on the Renesas R-Car.

This I2C hardware block can be found on various Renesas R-Car
SoC series.

It allows to perfom read and write on I2C buses in an
interrupt based way on R-Car Gen3 H3ULCB board.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-07-14 20:58:50 -04:00
Thomas Stranger 94f7ed356f drivers: serial: add a dummy driver for vnd,serial
This commit adds a serial dummy driver compatible to vnd,serial.
This is needed that devices can access the uart device in tests
like tests/drivers/build_all/... .

Add myself as codeowner to avoid complicance check failure.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-07-14 11:10:08 -05:00
Thomas Stranger 15d8f1ea18 dts: arm: introduce seeed lora-e5 module
This commit adds the dts definitons for the seeed lora-e5 module.
Additionally I add myself as codeowner for the new dts/arm/seeed
directory.

This module packages a stm32wle5jc Sub-GHz Wireless Soc,
together with a 32MHz TCXO, a 32.768KHz crystal oscillator, and
power and RF circuitry.

With the introduction of lora support definitions for the radio
will be added in a future commit.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-07-13 09:37:29 -04:00
Felipe Neves 132ab922a8 drivers: timer: esp32c3: add esp32c3 systimer driver to CODEOWNERS
Also added maintainer to the entry

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-07-07 20:58:50 -04:00
Jun Lin 9d5da14a33 CODEOWNERS: PS/2: npcx: add owners for npcx PS/2 driver
Add Nuvoton developers as code owners for npcx PS/2 driver.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2021-07-02 15:41:28 -04:00
Ruibin Chang d0ce9bb877 ITE drivers/pwm: add PWM for it8xxx2
Add pulse width modulator (PWM) for it8xxx2.

Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
2021-07-01 13:21:06 -04:00
Jose Alberto Meza 2159393316 CODEOWNERS: Remove myself of KSCAN and PS/2 subsytem codeowner
Not enough time to review changes in these subsystems.
Propose to have VenkatKotakonda as KSCAN subsystem owner instead.
Adding SoC-specific driver owners.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2021-06-28 14:09:57 -04:00
Immo Birnbaum 442ccd9ad0 CODEOWNERS: add code owner for Xilinx GEM driver
Add the code owner entries for all files related to the Xilinx GEM
Ethernet device driver.

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2021-06-24 14:34:24 -04:00
Jukka Rissanen 3eb4ea25e5 MAINTAINERS/CODEOWNERS: Removing myself from maintainer role
I cannot invest the time required for maintaining the networking
stack anymore, so I am stepping down from the maintainer role.
I am proposing Rober Lubos to be a new network maintainer.
I have been working with him for several years, and he is always
very helpful and knowledgeable to review and comment patches and
issues. He knows the network stack well and will for sure be able
to handle the task as he has been doing the maintenance already
for a long time.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-23 11:16:37 -04:00
Rajnesh Kanwal 1c584127ba boards: risc-v: add BeagleV Starlight JH7100 board support
Adding support for beagleV Starlight board based on Starfive JH7100
SoC. It's a base support, no drivers other than uart has been tested.

Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal49@gmail.com>
2021-06-22 08:45:00 -04:00
Henrik Brix Andersen c16d7f1919 MAINTAINERS: include samples/drivers/eeprom under EEPROM area
Include the samples/drivers/eeprom folder under the EEPROM maintainer
area.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-06-18 07:56:41 -05:00
Henrik Brix Andersen 588d22a755 drivers: ht16k33: convert keyscan driver from gpio API to kscan API
Convert the keyscan portion of the Holtek HT16K33 driver to adhere to
the kscan API instead of the GPIO API.

When this driver was introduced the kscan API was not present. The
keyscan driver was therefore implemented as a GPIO interrupt driver.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2021-06-18 11:22:40 +02:00
Ruibin Chang d45668480a ITE driver/watchdog: add watchdog timer for it8xxx2
Add watchdog timer for it8xxx2.

Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
2021-06-18 11:21:53 +02:00
Emil Gydesen 0e148b13c7 CODEOWNERS: Add @Thalley and @asbjornsabo to bsim audio test
Adds @Thalley and @asbjornsabo (and the others
from the parent directory) to the babblesim audio
test directory.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2021-06-15 10:16:18 -05:00
NavinSankar Velliangiri c9aa260f0c samples: compression: lz4: lz4 sample application
This PR add sample application for minimal lz4 library.

lz4 library RFC requested here: #28535

Fixes: #26648

Signed-off-by: NavinSankar Velliangiri <navin@linumiz.com>
2021-06-12 17:21:55 +02:00
Julien Massot 3ced1ddb85 drivers: can: Add Renesas R-Car driver
This driver is for classic CAN, it makes use of CAN interface
in FIFO mode.

This driver support Standard ID as well as Extended ID.

Tested on H3ULCB, Ebisu platform, with external adapter and
in loopback mode.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-06-07 12:06:21 +02:00
Bob Recny 8039ab4887 boards: arm: Modify BMD-345-EVAL support
Modify support for u-blox BMD-345-EVAL which uses the nRF52840
and a Skyworks RFX2411 FEM.

These edits follow the naming cnoventions that is used
with the other u-blox EVKs recently added, or in progress

This board is similar to the nRF52840dk_nrf52840 with the
addition of a FEM. Four Arduino GPIO pins have been
reassigned to the PA_LNA control pins.

u-blox would prefer to use this naming convention to match
other BMD-3xx-EVAL and EVK-NINA-Bx boards recently submitted.

Tested with blinky, button, and Bluetooth peripheral_hr
Checking dts files
Updated CODEOWNERS to rename bmd_345_eval to ubx_bmd345eval_nrf52840
Added CMakeLists.txt, updated board.c

Signed-off-by: Bob Recny <bob.recny@u-blox.com>
2021-05-18 11:26:31 -05:00
Siddharth Chandrasekaran 491fb7aa32 CODEOWNERS, MAINTAINERS.yml: Update github username
GitHub username @cbsiddharth was changed to @sidcha. Update CODEOWNERS
and MAINTAINERS.yml entries.

Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
2021-05-11 12:59:25 -05:00
Carlo Caione e2333269ae cache: Introduce external cache controller system support
The cache API currently shipped in Zephyr is assuming that the cache
controller is always on-core thus managed at the arch level. This is not
always the case because many SoCs rely on external cache controllers as
a peripheral external to the core (for example PL310 cache controller
and the L2Cxxx family). In some cases you also want a single driver to
control a whole set of cache controllers.

Rework the cache code introducing support for external cache
controllers.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-05-08 07:00:33 +02:00
Andy Ross 662b0bf765 drivers/timer: Add x86 APIC TSC_DEADLINE driver
Modern hardware all supports a TSC_DEADLINE mode for the APIC timer,
where the same GHz-scale 64 bit TSC used for performance monitoring
becomes the free-running counter used for cpu-local timer interrupts.
Being a free running counter that does not need to be reset, it will
not lose time in an interrupt.  Being 64 bit, it needs no rollover or
clamping logic in the driver when presented with a 32 bit tick count.
Being a proper comparator, it will correctly trigger interrupts for
times set "in the past" and thus needs no minimum/clamping logic.  The
counter is synchronized across the system architecturally (modulo one
burp where firmware likes to change the adjustment value) so usage is
SMP-safe by default.  Access to the 64 bit counter and comparator
value are single-instruction atomics even on 32 bit systems, so it
beats even the RISC-V machine timer in complexity (which was our
reigning champ for "simplest timer driver").

Really this is just ideal for Zephyr.  So rather than try to add
support for it to the existing APIC driver and increase complexity,
make this a new standalone driver instead.  All modern hardware has
what it needs.  The sole gotcha is that it's not easily emulatable
(qemu supports it only under kvm where they can freeload on the host
TSC) so it can be exercised only on hardware platforms right now.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-05-07 16:48:58 -04:00
Aymeric Aillet c5a057bc63 drivers: serial: add Renesas R-Car driver
This patch add support for polling based UART
on the Renesas R-Car SCIF (Serial Communication Interface
with FIFO)

This hardware block can be found on various Renesas R-Car
SoC series.

It allows to get console on R-Car Gen3 H3ULCB board.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-05-07 13:08:48 +02:00
Marcin Niestroj b4854debd1 drivers: wifi: esp_at: rename driver from esp
Recently WiFi ESP32 driver (utilizing WiFi radio in ESP32 SoC) was
introduced into drivers/wifi/esp32/ and it already caused confusion as
there was existing drivers/wifi/esp/ directory for ESP-AT
driver (utilizing external WiFi chip, by communicating using AT commands
from any serial capable platform). So question has arisen whether it is
good to merge both, while they are totally different drivers.

Rename ESP-AT driver to be placed in drivers/wifi/esp_at/, so that it is
easier to figure out difference between "esp32" and "esp_at" just by
looking at driver name. Rename also DT compatible and all Kconfig
options for the same reason.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-05-06 13:21:39 -04:00
Gerard Marull-Paretas 605a3d1a8a samples: pm: move to pm folder
Adjust naming to make things more consistent.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-05-05 18:35:49 -04:00
Gerard Marull-Paretas 99cbee3f16 pm: move power subsystem to pm
Adjust naming to make things consistent.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-05-05 18:35:49 -04:00
Gerard Marull-Paretas 25bb163dc2 pm: reorganize headers
- Move PM related APIs to `include/pm` so that it follows API `pm_`
  prefix namespace. In order to make transition easier
  `include/power/power.h` is kept pointing to `include/pm/pm.h`.
- Move most of device PM related content from `include/device.h` to
  `include/pm/device.h` and `include/pm/runtime.h`.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-05-05 18:35:49 -04:00
Kalyan Sriram cf6a7f3ca6 codeowners: add code owner for blackpill_f401ce, blackpill_f411ce
Add @coderkalyan (Kalyan Sriram <coder.kalyan@gmail.com>) as code owner
for blackpill_f401ce, blackpill_f411ce boards.

Signed-off-by: Kalyan Sriram <kalyan@coderkalyan.com>
2021-04-30 12:40:24 -05:00
Daniel Leung a5ab1a7518 logging: add support for dictionary based logging
This adds dictionary based logging support. Dictionary based
logging is binary based where one big difference is that
static strings are stored as pointers instead of the whole
string. This results in reduced space requirements for
storing log messages in certain scenairos.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-04-28 22:25:42 +02:00
Daniel Leung 1117169980 kernel: generate placeholders for kobj tables before final build
Due to the use of gperf to generate hash table for kobjects,
the addresses of these kobjects cannot change during the last
few phases of linking (especially between zephyr_prebuilt.elf
and zephyr.elf). Because of this, the gperf generated data
needs to be placed at the end of memory to avoid pushing symbols
around in memory. This prevents moving these generated blocks
to earlier sections, for example, pinned data section needed
for demand paging. So create placeholders for use in
intermediate linking to reserve space for these generated blocks.
Due to uncertainty on the size of these blocks, more space is
being reserved which could result in wasted space. Though, this
retains the use of hash table for faster lookup.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-04-27 13:32:00 -04:00
Carlo Caione 0427d93f4a board: arm64: Add FVP Base RevC 2xAEMv8A board
Add support for the FVP Base RevC 2xAEMv8A board to be emulated using
the same FVP. For now the virtual platform is only exposing one core and
the basic set of peripherals (GICv3, ARM arch timer, PL011, etc...).

INFO    - Total complete:  256/ 256  100%  skipped:  933, failed:    0

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-04-27 13:30:07 -04:00
Erwan Gouriou 45418dedc0 CODEOWNERS: Add code owner for dts/common
Add @galak as codeowner for dts/common


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-27 11:53:37 +02:00
Kumar Gala e1032ad2c3 include: Move emul.h to drivers/emul.h
Move emul.h out of the top level include/ dir into
include/drivers/emul.h and deprecated the old location.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-04-22 12:51:01 -04:00
Jiafei Pan 6f46a92849 board: nxp_ls1046ardb: add 2 cores smp for running in Jailhouse
1. add a seperate 2 cores SMP board configuration to run in Jailhouse
   inmate Cell, root Cell Linux will use Core0 and Core1, Zephyr will
   run on Core2 and Core3.
2. Refine the code of dts, move SoC common dts nodes into dtsi fiel in
   dts/arm64/nxp/ directory.
3. Add myself to be code owner of directory dts/arm64/nxp/.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2021-04-22 11:29:54 +02:00
Julien Massot d86c61fd57 drivers: gpio: add Renesas RCar gpio
Add GPIO controller driver that can be found on Renesas
RCar gen3 soc series.

Controller can handle up to 32 GPIOs per banks.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-04-22 10:38:45 +02:00
Julien Massot 20fdb6cbfb drivers: timer: add R-Car cmt driver
Compare Match Timer is a 32 bit compare match timer
that can be found on various Renesas R-Car SoC.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-04-22 10:38:45 +02:00
Julien Massot 2ad6e4e376 drivers: clock_control: add R-Car CPG MSSR driver
Clock Pulse Generator, Module Standby Software Reset, are registers
presents in Renesas Gen3 SoC series.

MSSR is used to supply clock to the different modules, shuch as timer,
or UART, it's also possible to issue a reset the different module.

CPG registers allow to get the rate or to set some divider like for
the CAN clock.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-04-22 10:38:45 +02:00
Julien Massot b21a0d0116 boards: arm: Add support for R-Car H3ULCB board
Add basic configuration for H3ULCB, just enough to see the
Zephyr boot banner on the ram console.

This configuration make use of the Cortex-R7 present on
r8a977951 SoC.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-04-22 10:38:45 +02:00
Julien Massot dc26d6bb4a soc: arm: add Renesas rcar_gen3 series support
Most of the Renesas RCar Gen3 based SoC contains a Cortex R7
processor.
This processor has access to the same memory mapped devices than
the Cortex-A5x cores.

- CPU operates upto 800MHz
- Can use ram area from 0x40040000 to 0x42000000
- Has 512 interrupts on GIC-400 compliant with Arm GICv2

Add support for r8a77951 as first SoC of this series which is also
known as H3 ES2.0 and is present present on different boards such as
Salvator and R-Car Starter Kit(H3ulcb).

This first SoC definition is just enough to print Hello World in a
ram console.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-04-22 10:38:45 +02:00
Anas Nashif f63c9b1893 codeowner: path updates
path updates after moving directories.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-04-20 08:45:05 -04:00
Guillaume Paquet d3d789d7ee boards: arm: Add RAK4631 Wisblock Core LPWAN board
Add rak4631 board from RAKWireless based on nrf52840 and SX1262.
Board Documentation is completed

Signed-off-by: Guillaume Paquet <guillaume.paquet@smile.fr>
2021-04-19 11:01:24 -04:00
Jaxson Han 985b03340d board: arm64: Add FVP BaseR AEMv8R board
Add essential files to create a new board. Enable arch timer, uart,
multi-threading. Set memory map for flash and sram. The new board name
is fvp_baser_aemv8r with the fvp_aemv8r_aarch64 soc.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2021-04-13 07:47:44 -04:00
Jaxson Han 30ed92c218 arch: arm64: Armv8-R AArch64 MPU implementation
Armv8-R AArch64 MPU can support a maximum 16 memory regions, and the
actual region number can be retrieved from the system register(MPUIR)
during MPU initialization.
Current MPU driver only suppots EL1.

Signed-off-by: Haibo Xu <haibo.xu@arm.com>
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2021-04-13 07:47:44 -04:00
Jaxson Han 475374ce2f include: arm64: Add mpu data struct definition
According to Armv8-R64 Spec, MPU related meta data(region base/limit)
is 64 bits. So we need to re-define MPU related data structure here.

Signed-off-by: Haibo Xu <haibo.xu@arm.com>
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2021-04-13 07:47:44 -04:00
Jaxson Han 8f46bc97a3 dts: arm64: Add dtsi and dts binding for cortex-R82
Add armv8-r dtsi.
Add dts binding yaml file for cortex-R82.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2021-04-13 07:47:44 -04:00
Jaxson Han ade060ed1f soc: arm64: Add FVP AEMv8R AArch64 soc
Add essential files to create a new soc.
Introduce a new type of soc series named fvp_aemv8r.
Add a new soc named fvp_aemv8r_aarch64.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2021-04-13 07:47:44 -04:00
Jiafei Pan 865c81889d CODEOWNERS: add myself as Layerscape code-owner
Add myself to be NXP Layserscape SoC and LS1046A board
code-owner.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2021-04-09 13:25:15 +02:00
Gerard Marull-Paretas 89c8a4f09e known-issues: delete out of date content
It turns out that current known issues folder contains issues that are
no longer valid or present. I have searched for some of the regex
snippets listed but I have not been able to find any. Documentation was
the last active user of the known-issues folder, but has moved to
another solution.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-04-08 09:55:16 +02:00
Sun Amar 252f1b8e0d gecko pwm: add pwm driver for the gecko.
pwm driver + Kconfig and Cmake files for the
efr32 soc family.

Signed-off-by: Sun Amar <sun681@gmail.com>
2021-04-02 18:45:33 -04:00
Carlo Caione a43f3bade8 arm/arm64: Fix misc and trivials for ARM/ARM64 split
Fix the header guards, comments, github labeler, CODEOWNERS and
MAINTAINERS files.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-31 10:34:33 -05:00
Lukasz Majewski a1c0821b46 arm: Add code owner for the Segger's ip_k66f board
I would like to add myself as a co-maintainer for the ip_k66f
board.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2021-03-31 10:26:44 -05:00
Maureen Helm cdd2c451f0 MAINTAINERS: CODEOWNERS: Add NXP collaborators
Add @mmahadevan108 and @dleach02 as collaborators for NXP SoCs, boards,
and drivers.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-03-31 07:51:26 -04:00
Gerard Marull-Paretas 3282cf8ef2 doc: move scripts to _scripts
Move Sphinx related content to folders with underscore prefix.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-03-31 10:39:48 +02:00
Kumar Gala 0bb4665df7 include: Move ptp_clock.h to drivers/ptp_clock.h
Move ptp_clock.h out of the top level include/ dir into
include/drivers/ptp_clock.h and deprecated the old location.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-25 10:09:33 +02:00
Kumar Gala 95e4b3eb2c arch: arm: Add initial support for Cortex-M55 Core
Add initial support for the Cortex-M55 Core which is an implementation
of the Armv8.1-M mainline architecture and includes support for the
M‑profile Vector Extension (MVE).

The support is based on the Cortex-M33 support that already exists in
Zephyr.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-23 13:13:32 -05:00
Johann Fischer ae7097ddd9 CODEOWNERS: add myself as disk subsystem code-owner
Add myself as disk subsystem code-owner

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-03-23 12:16:01 +01:00
Johann Fischer 69a5f07d16 drivers: disk: cleanup after driver relocation
Add common SDMMC_LOG_LEVEL and SDMMC_VOLUME_NAME.
Initialize drivers at POST_KERNEL level.
Update CODEOWNERS after sdmmc drivers relocation.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-03-23 12:16:01 +01:00
Eugeniy Paltsev 11aedbc460 CODEOWNERS: Add evgeniy-paltsev as an ARC part owner
Add @evgeniy-paltsev as an ARC part owner in addition to
@abrodkin and @ruuddw, so he will be chosen as a reviewer
automatically.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-03-22 15:46:51 -04:00
Hubert Miś 7d8f78a08b drv: display: Initial FT800 display driver
This patch includes initial support for FT800 display driver.
It includes basic features. It can be easily extended with more
FT800 display list and co-processor features.

Signed-off-by: Hubert Miś <hubert.mis@gmail.com>
2021-03-19 19:05:53 +01:00
Johann Fischer 46f53332f8 CODEOWNERS: add codeowner for modbus
Add myself as codeowner for modbus subsys.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-03-19 15:50:21 +01:00
Dean Weiten 5e82563601 board: arm: ronoth_lodev: add Ronoth LoDev board support
The Ronoth LoDev in an open source board which uses
the AcSIP S76S.

Signed-off-by: Dean Weiten <dmw@weiten.com>
2021-03-18 08:48:30 -05:00
Dean Weiten ed1b220ba5 dts: arm: s76s: add AcSIP S76S SiP support
The AcSIP S76S is a STM32L073+SX1276+PA SoC which
supports LoRa communications.

Signed-off-by: Dean Weiten <dmw@weiten.com>
2021-03-18 08:48:30 -05:00
Peter A. Bigot 16f4a47694 CODEOWNERS: remove my assignments
I won't be supporting Zephyr for the foreseeable future, so remove my
association with specific subsystems.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2021-03-18 06:16:23 -04:00
Yonatan Schachter 1d9f0e35a9 soc: silabs_exx32: Add support for EFR32FG13P SoC
This commit adds support for Silicon Labs EFR32FG13P (Flex Gecko) SoC.

Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2021-03-17 19:33:35 -05:00
Gerson Fernando Budke 68dcac3be6 dts: arm: cypress: Introduce PSoC-6 pinctrl
Introduce PSoC-6 pinctrl infraestructure and definitions.  This add
files to handle devicetree entries and following modifications:

 - add pinctrl bindings
 - update gpio bindings with pin-cells
 - add pinctrl node and move gpio nodes inside
 - declare pinctrl for current uart entries

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-03-16 13:36:15 -05:00
Martin Jäger 1aaf508bde task_wdt: add task-level watchdog subsystem
This new subsystem can be used to supervise individual threads. It
is based on a regularly updated kernel timer, whose ISR is never
actually called in regular system operation.

An existing hardware watchdog can be used as an optional fallback if
the task watchdog itself gets stuck.

Signed-off-by: Martin Jäger <martin@libre.solar>
2021-03-15 12:24:54 +01:00
Wojciech Tatarski 35dd66b6c4 drivers: gpio: add EOS S3 GPIO driver
Add GPIO driver for QuickLogic EOS S3 SoC.

Co-authored-by: Jan Kowalewski <jkowalewski@antmicro.com>

Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
2021-03-11 08:58:20 -05:00
Anas Nashif 7567f232cc CODEOWNERS: update file path for samples
Adapt to new location of samples.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-03-09 17:48:18 -05:00
Andrei Emeltchenko 17cd6fe90d MAINTAINERS: Remove myself as a USB maintainer
I have not had time to work with USB recently, so removing myself from
MAINTAINERS and CODEOWNERS for the USB subsystem.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2021-03-08 10:06:11 -05:00
Nicolas Pitre 14e5e98822 lib: cbprintf: add support for deferred formatting
In applications like logging the call site where arguments to
formatting are available may not be suitable for performing the
formatting, e.g. when the output operation can sleep.  Add API that
supports capturing data that may be transient into a buffer that can
be saved, and API that then produces the output later using the
packaged arguments.

[ Documentation and commit log from Peter Bigot. ]

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-03-05 09:29:35 +01:00
Asbjørn Sæbø 66f699b8ea Bluetooth: Audio: Add maintainers/codeowners
Add Thalley (emil.gydesen@nordicsemi.no) and asbjornsabo
(asbjorn.sabo@nordicsemi.no) as additional maintainers/codeowners for
bluetooth audio.

(Also adds empty audio.h file, that will later be expanded, so that
the include/bluetooth/audio directory now listed in CODEOWNERS
actually exists.)

Signed-off-by: Asbjørn Sæbø <asbjorn.sabo@nordicsemi.no>
2021-03-04 18:00:35 -05:00
Carlo Caione 0f9406277d aarch64: pm_cpu_ops: Introduce pm_cpu_ops subsystem
AArch64 has support for PSCI. This is especially useful for SMP because
PSCI is used to power on the secordary cores.

When the PSCI driver was introduced in Zephyr it was designed to rely on
a very PSCI-centric subsystem / interface.

There are two kinds of problems with this choice:

1. PSCI is only defined for the non-secure world and it is designed to
   boot CPU cores into non-secure state (that means that PSCI is only
   supposed to work if Zephyr is running in non-secure state)

2. There can be other ways or standards used to start / stop a core
   different from PSCI

This patch is trying to fix the original wrong assumption by making the
interface / subsystem a generic one, called 'pm_cpu_ops', and using PSCI
only as an actual driver that is a user of this new interface /
subsystem.

For now the new subsystem is only exposing two methods: cpu_on and
cpu_off, others will probably follow according to the needs.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-04 06:53:19 -05:00
Jakub Rzeszutko 74ebf5dba2 codeowners: add getopt library
Add owner for newly created getopt library.
Extend ownership of fnmatch library.

Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
2021-03-01 09:50:32 -05:00
Pavlo Hamov 5ae781d7d0 drivers: watchdog: cc32xx: Add support
Impelement watchdog for ti_cc32xx family

Signed-off-by: Pavlo Hamov <pasha.gamov@gmail.com>
2021-02-24 08:35:27 -06:00
NavinSankar Velliangiri a4ce7e3dea boards: arm: bmd_345_eval: Add BMD 345 EVAL Board Support.
Add support for BMD 345 EVAL BSP with PA/LNA support
Fixes: #31585

Signed-off-by: NavinSankar Velliangiri <navin@linumiz.com>
2021-02-23 16:31:41 -06:00
Pete Johanson 310a464acf cmake: Add UF2 as an additional build output option.
Add ability to build a UF2 (https://github.com/Microsoft/uf2)
image as an additional output type. This leverages the code
partition offset for the UF2 base address, and a configurable
UF2 family ID.

Includes an unmodified (except for headers for licensing, pylit
disabling) version of the uf2conv.py script copied the UF2
format specification repository, used to convert the bin to UF2.

Origin: UF2 file format specification reference utilies
License: MIT
URL: https://github.com/microsoft/uf2/blob/master/utils/uf2conv.py
commit: 587abb8b909266e9b468d6284f2fbd425235d1b5
Signed-off-by: Pete Johanson <peter@peterjohanson.com>
2021-02-23 21:11:04 +01:00
Martí Bolívar 7bbead6786 drivers: i2c: add dummy driver for vnd,i2c
We will need this to be able to DEVICE_DT_GET() bus devices from
tests/drivers/build_all in an upcoming commit.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-02-23 10:34:19 -05:00
Mulin Chao d21412e96d CODEOWNERS: Add reviewers on Nuvoton NPCX series.
Adding Nuvoton developers as reviewers on NPCX EC (Embedded Controller)
SoC, device-tree, and driver sources.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-02-22 14:36:51 -05:00
Peter Bigot d554d34137 device: add post-process of elf file to manage device handles
Following the idiom used for system calls, add script support to read
the initial application binary to identify which devices are defined,
and to use their offset in the device array as their unique handle
rather than the externally-defined ordinal from devicetree.  The
device dependency arrays are updated to use these handles.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-02-19 15:46:16 -05:00
Torsten Rasmussen dfa52a3ba7 module: moving TFM CMakeLists.txt into Zephyr repo
This commit moves TFM CMakeLists.txt into Zephyr and relocates the
Kconfig.tfm file under the modules/tfm folder.

Updates the manifest to point to related TFM changes.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-02-16 10:01:36 +01:00
Anas Nashif 72191f37a7 CODEOWNERS: cleanup and replacing few entries
Replace andreboie in the file.
Temporary until we completely move to MAINTAINER file.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 08:47:25 -05:00
Anas Nashif 3c3504f7e5 CODEOWNERS: Remove inactive users and minor cleanup
Remove wentong and other changes based on MAINTAINER file.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-28 10:10:45 -05:00
Kumar Gala bd20ee5c2e MAINTAINERS/CODEOWNERS: Remove nategraff-sifive
Nate hasn't been active for some time and its my understanding that
Nate is no longer at SiFive.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-01-26 14:44:32 -05:00
Andrew Boie 9a12d6028b CODEOWNERS: add demand paging subdir
Adding myself as original author.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Peter Bigot affa7a1c7e Revert "device: add post-process of elf file to manage device handles"
This reverts commit 40d3653758.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-01-23 18:01:03 -05:00
Anas Nashif f62ba9fe13 Revert "CODEOWNERS: add demand paging subdir"
This reverts commit 5f0a7201c7.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Andrew Boie 5f0a7201c7 CODEOWNERS: add demand paging subdir
Adding myself as original author.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-21 16:47:00 -05:00
Peter Bigot 40d3653758 device: add post-process of elf file to manage device handles
Following the idiom used for system calls, add script support to read
the initial application binary to identify which devices are defined,
and to use their offset in the device array as their unique handle
rather than the externally-defined ordinal from devicetree.  The
device dependency arrays are updated to use these handles.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-01-21 14:49:04 -06:00
Andrei Emeltchenko 61409a6d2f CODEOWNERS: Adding drivers/edac owner
Adding myself to the list for drivers/edac.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2021-01-21 08:34:07 -05:00
Hubert Miś b0ec7a63ab ipc: RPMsg service to register multiple endpoints
This patch implements a service that adds multiendpoint
capabilities to RPMsg. Multiple endpoints are intended to be used
when multiple modules need services from a remote processor. Each
module may register one or more RPMsg endpoints.

The implementation separates backend from the service, what
allows to extend this module to support other topologies like
Linux <-> Zephyr.

Co-authored-by: Piotr Szkotak <piotr.szkotak@nordicsemi.no>
Signed-off-by: Hubert Miś <hubert.mis@nordicsemi.no>
2021-01-19 22:07:09 +01:00
Raveendra Padasalagi 228a3cffd6 drivers: dma: Add iProc PAXDMA driver
Add PAX[PCIE<->AXI] DMA driver which supports DMA
transfers between host and target memory over PCIe link.

Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
2021-01-18 16:58:55 -05:00
Carlo Caione 57f7e31017 drivers: PSCI: Add driver and subsystem
Firmware implementing the PSCI functions described in ARM document
number ARM DEN 0022A ("Power State Coordination Interface System
Software on ARM processors") can be used by Zephyr to initiate various
CPU-centric power operations.

It is needed for virtualization, it is used to coordinate OSes and
hypervisors and it provides the functions used for SMP bring-up such as
CPU_ON and CPU_OFF.

A new PSCI driver is introduced to setup a proper subsystem used to
communicate with the PSCI firmware, implementing the basic operations:
get_version, cpu_on, cpu_off and affinity_info.

The current implementation only supports PSCI 0.2 and PSCI 1.0

The PSCI conduit (SMC or HVC) is setup reading the corresponding
property in the DTS node.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-01-18 19:06:53 +01:00
Martí Bolívar 8bd6d08b0b scripts: add list_boards.py
This script is essentially a Python rewrite of the CMake code we're
using to print boards in cmake/boards.cmake, plus some extra features.

Having this in Python will simplify some later adjustments to our
'usage' build system target in ways that will make its output easier
to read, while simultaneously making 'west boards' more useful.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-01-15 15:07:49 -05:00
Martin Åberg 152d3e46ad soc/riscv: add the QEMU "RISC-V VirtIO board"
The QEMU RISC-V VirtIO board is capable:
- 8 x CPU
- 256 MiB RAM
- PMP
- PCI
- ISA string: RVnnIMAFDCSU
  - mul/div
  - FPU with double precision
  - MMU
  - Compressed instructions

Devicetree was extracted from QEMU as described in virt.dtsi.
The same .dtsi SOC description is used for 32-bit and 64-bit.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2021-01-15 13:06:33 -05:00
Tim Lin 981166eb8e drivers/i2c: add i2c driver on it8xxx2 platform
This commit is about the it8xxx2 i2c master driver which
includes six SMBus channels. The enhanced channel i2c3,
i2c4, i2c5 are controller which are designed to support
the I2C protocol.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-01-15 11:22:57 -05:00
Katsuhiro Suzuki a688b4da73 drivers: watchdog: implement SiFive FE310 watchdog driver
This patch adds watchdog driver for HiFive1 rev.B that has SiFive
Freedom E310 SoC.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2021-01-14 21:31:05 -06:00
Henrik Brix Andersen 714b6b15ba CODEOWNERS: take ownership of PWM capture helper functions
Take ownership of the PWM capture helper functions.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-01-12 19:43:06 +01:00
Rafael Dias Menezes c25358d68e soc: silabs_exx32: Add support for SiLabs EFM32PG1B SoC
This commit adds support for Silicon Labs EFM32PG1B (Pearl Gecko) SoC.

Signed-off-by: Rafael Dias Menezes <rdmeneze@gmail.com>
2021-01-11 10:22:37 -06:00
Andrzej Głąbek 4931fc0aef CODEOWNERS: Update path to usb_dfu.c
This is a follow-up to commit 1c89837e79.

Update the path to dfu_usb.c after the file was moved, to prevent
compliance checks from failing because of non-existing file listed
in CODEOWNERS.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-12-21 05:18:13 -05:00
Marcin Niestroj 77d628fefb CODEOWNERS: add myself for ESP WiFi
I've been working on ESP WiFi drivers for some time now, so I would like
to help review new patches.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-12-17 10:23:52 -05:00
Tomasz Bursztyka 5951cbda65 CODEOWNERS: Adding /drivers/virtualization owner
Adding myself there.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-12-16 18:47:35 -05:00
Peter Bigot 96fa707e0c Revert "drivers: move eeprom_slave driver to tests directory"
This reverts commit cabbd916cf.

This is considered to be useful enough that it should be restored
as a stable Zephyr API.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-12-16 16:39:49 -05:00
Cheryl Su 968dd2107b boards/riscv: add new riscv platform-it8xxx2
We create a new platform for our chip series it8xxx2.
It is a riscv base soc.

Signed-off-by: Cheryl Su <cheryl.su@ite.com.tw>
2020-12-16 08:47:36 -05:00
Johan Hedberg 8bd43ddf61 CODEOWNERS: Add missing x86 entries
Add a new entry for x86 DTS files and add Johan to x86 architecture
changes.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2020-12-12 14:16:23 +02:00
Anas Nashif 8ef56e6a82 CODEOWNERS: rename sanitycheck
Also replace things in CODEOWNER file.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-11 14:13:02 -05:00
Andrzej Puzdrowski 90d06cffec CODEOWNERS: add codeowner for usb dfu class
Added myself as USB DFU class code-owner.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2020-12-11 08:49:35 -05:00
Guillaume Paquet 40f2524859 boards: arm: nordic: rakwireless Introduce rak5010_nrf52840 board
Add rak5010 board from RAKWireless based on nrf52840.
Board Documentation is completed

Signed-off-by: Guillaume Paquet <guillaume.paquet@smile.fr>
2020-12-07 14:51:28 -06:00
Michael Scott a6fd7a0546 CODEOWNERS: remove myself from driver/modem files
Stepping down as maintainer of modem drivers

Signed-off-by: Michael Scott <mike@foundries.io>
2020-12-07 12:33:30 -05:00
Mulin Chao ad539e5a1c CODEOWNERS: npcx7: arrange the owners for all npcx7 ec drivers.
This CL arranges the owners for the npcx7 ec driver files made by
nuvoton team in CODEOWNERS file.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2020-12-07 12:11:17 -05:00
Mulin Chao a279b4cfb7 drivers: adc: add adc support in npcx7 series
NPCX7 includes a 10-bit resolution Analog-to-Digital Converter (ADC). Up
to 10 voltage inputs can be measured and a internal voltage reference
(VREF), 2.816V (typical) is used for measurement. It can be triggered
automatically in Autoscan mode. Each input channel is assigned a
separate result register, which is updated at the end of the conversion.

The CL also includes:
— Add npcx adc device tree declarations.
— Zephyr adc api implementation.
— Add adc definitions of npcx7 in
  tests/drivers/adc/adc_api/src/test_adc.c for supporting test suites.

Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
2020-12-07 12:11:17 -05:00
Pawel Czarnecki 748e7b6d75 samples: drivers: clock control: add sample
This adds a sample application for testing
the LiteX clock control driver.

Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-12-06 12:35:16 -05:00
Pawel Czarnecki ed6c0103a9 drivers: clock control: Add LiteX clock control driver
This commit adds LiteX SoC Builder clock control driver for MMCM
module. It gives ability to change frequency, phase and duty cycle
on up to 7 clock outputs.

Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-12-06 12:35:16 -05:00
Mateusz Holenko 21542749eb CODEOWNERS: simplify LiteX-related entries
This adds a generic entry for all LiteX-related
drivers.

Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-12-06 12:35:16 -05:00
Jukka Rissanen 517fd3b91b codeowners: Add myself for GSM modem files
I have been working on the GSM modem files so would like to
review future patches.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-12-04 12:16:54 -06:00
Jukka Rissanen f0f4b334b9 codeowners: Update scripts/net/ owners
Patrik Flykt (pfl) is no longer working on this.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-12-04 12:16:54 -06:00
Ioannis Glaropoulos a953ac8307 CODEOWNERS: add code owners for Kconfig.tfm
Add the TFM Module maintainers as
code owners for Kconfig.tfm.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-12-01 14:19:03 +02:00
Gerard Marull-Paretas 94d74277b5 CODEOWNERS: add myself to memc drivers
Add myself to memc (memory controller) drivers.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-24 16:33:17 +01:00
Alexander Kozhinov 9cd2b8cd2f CODEOWNERS: civetweb
update path

Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
2020-11-24 12:59:00 +02:00
Anas Nashif f8a45863ed CODEOWNERS: populate entry for kernel docs
Add owners for kernel docs.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-19 13:18:59 -05:00
Gerson Fernando Budke bc00f19724 drivers: i2c: Introduce SAM4L i2c TWIM driver
The SAM4L have a unique I2C driver.  It shares simultaneously pins for
both master and slave controllers.  Each controller have their own
instance.  This introduces the TWIM controller that handles only the
master part.

The TWIM controller uses no copy and the driver was prepared to work
with both 7 and 10 bits address.  The controller can handler up to 256
bytes for a single transfer allowing long data communication with
almost no CPU intervention.

The driver was wrote specifically to Zephyr.  It receives a transfer
list of from upper layers to a specific device on the bus.  It programs
the first and second transfer, if it exists, before start.  At end of
full read/write interrupt, will program the next data block.  This
process repeats until all transfers be executed.  The driver uses
interrupt from TWIM to check for erros or program next tranfer.

Future work can enable low power mode on the driver allowing long
transfers with low power consumption.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-11-19 10:52:49 -06:00
Henrik Brix Andersen c6f1469bf6 drivers: pwm: add driver for the Xilinx AXI Timer
Add PWM controller driver for the Xilinx AXI Timer v2.0 IP.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-11-17 19:30:20 -05:00
Johann Fischer 591740b3ea codeowners: update due to Github user name change
Update CODEOWNERS and MAINTAINERS due to Github user name change.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2020-11-16 10:34:50 +02:00
Martin Åberg d8ab65d780 codeowners: add owner for SPARC
Add myself as an owner for SPARC related files.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-13 14:53:55 -08:00
Christopher Friedt e7e58439e7 net: dns: dns-sd: support dns service discovery
This change adds support for DNS Service Discovery (DNS-SD)
as described in RFC 6763.

Fixes #29099

Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2020-11-09 16:15:02 -08:00
Gerson Fernando Budke 0d216924d5 samples: net: cloud: Introduce TagoIO IoT cloud http post
Introduce TagoIO IoT Cloud HTTP post client example.  This explorer
Zephyr network resources to demonstrate an end to end application.
The TagoIO allows that any user can test on a easy way Ethernet, WIFI
and Modem (PPP) with BSD sockets.  The example provides overlays to
configure WIFI and Modem.

The application consists an a pseudo temperature sensor that sends
periodically data to TagoIO IoT Cloud platform.  The data can be
visualized on a web browser dashboard, cellphone or tablet.  The
steps to configure TagoIO are described on the example documentation.

Special Variables:
 - CONFIG_TAGOIO_DEVICE_TOKEN   DEVID  token generated by TagoIO
 - CONFIG_TAGOIO_HTTP_WIFI_SSID SSID   when using WIFI
 - CONFIG_TAGOIO_HTTP_WIFI_PSK  PASSWD when using WIFI
 - CONFIG_MODEM_GSM_UART_NAME   UART   label when using MODEM
 - CONFIG_MODEM_GSM_APN         APN    when using MODEM

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-11-04 09:06:23 +02:00
Gerson Fernando Budke 76215339c2 boards: shields: Introduce inventek es-WIFI shield
Add Inventek es-WIFI modules shield.  This shield exposes es-WIFI driver
using Arduino Uno R3 header by UART or SPI interfaces.  It shows how
user can create their own overlay and expose es-WIFI driver.

The current Inventek's EVB doesn't have all pins necessary to control
the module by Arduino hearder.  This shows how to wire to get ISM43xx
EVB working.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2020-11-03 11:05:43 +01:00
Gerson Fernando Budke d8c9cb8d89 drivers: wifi: eswifi: Add uart bus interface
Add uart bus interface to extended esWIFI driver.  This enables all
Inventek modules with IWIN AT Commands firmware.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2020-11-03 11:05:43 +01:00
Christopher Friedt 8e2978d577 drivers: ieee802154: cc13xx_cc26xx: use ti rf driver api
This change reworks the cc13xx_cc26xx IEEE 802.15.4 driver to use
the TI RF driver API that is available in modules/hal/ti.

There are a number of benefits to using TI's API including
 - a stable multi-OS vendor library and API
 - API compatibility with the rest of the SimpleLink SDK and SoC family
 - potential multi-protocol & multi-client radio operation
   (e.g. both 15.4 and BLE)
 - coexistence support with other chipsets via gpio
 - vetted TI RF driver resources, such as
   - the radio command queue
   - highly tuned / coupled RTC & RAT (RAdio Timer) API

Fixes #26312

Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2020-11-03 11:03:35 +01:00
Peter A. Bigot f951566e56 drivers: regulator: add GPIO-controlled regulator driver
This provides structure for the regulator device hierarchy and a
driver for GPIO-controlled regulators along with its binding.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2020-10-28 15:22:53 +01:00
Robert Lubos 7cfc612de7 CODEOWNERS: Add entries for CoAP, LwM2M and MQTT headers
Add myself as a reviewer for the aforementioned headers.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-10-26 15:42:05 +01:00
Gerson Fernando Budke 4042150876 boards: arm: Add PSoC-62 BLE Pioneer Kit
Introduce PSoC-62 BLE Pioneer Kit.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2020-10-22 08:18:27 -05:00
Gerson Fernando Budke 73e9217e73 soc: arm: cypress: Introduce PSoC-63 BLE
Add initial support for PSoC-63 BLE Series.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2020-10-22 08:18:27 -05:00
Nicolai Glud 8c4090cc03 codeowners: Add myself to winc1500
Add myself as code owner for winc1500 driver.

Signed-off-by: Nicolai Glud <nicolai.glud@prevas.dk>
2020-10-22 15:04:48 +02:00
Ioannis Glaropoulos d3a8aba3dd CODEOWNERS: add code owners for the TF-M integration samples
Adding code owners for the TF-M integration samples.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-10-19 21:08:34 +02:00
Ryan Erickson 3371d809b9 codeowners: add owner for hl7800 driver
Add myself as an owner for the hl7800 modem driver.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2020-10-16 09:44:36 +02:00
Andrew Boie 95bbc742ba kernel: move kernel object APIs to own header
Part of an effort to break up the gigantic kernel.h.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-12 12:21:46 -04:00
Alexander Kozhinov fc7e49fe19 zephyr: codeowners:
add Nukersson as /samples/net/sockets/*civetweb* codeowner

Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
2020-10-09 11:47:34 +02:00
Manivannan Sadhasivam 0e0339ba76 CODEOWNERS: Add entry for LoRaWAN
Add CODEOWNERS entry for LoRaWAN

Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2020-10-08 12:15:38 +02:00