The check for assertion on the "config_func" was added to
validate that the function pointer is valid. However, in
the code we are invoking the "config_func" and comparing
its output with NULL. This causes build failures with
CONFIG_ASSERT=1. Caused by PR-25393.
Tested on Nucleo F767Zi board.
Fixes#25427
Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
This commit introduces an early error in case a valid C compiler is not
found in the system.
This will help to early identify misconfigured systems with the error:
C compiler <compiler> not found - Please check your toolchain
installation
instead of an obscure error, such as:
No such file or directory: LIBGCC_FILE_NAME: ''
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
The transport segmented TX nack and seg_pending fields must be at least
6 bits to avoid overflow for 32 segment messages. This change rearranges
the seg_tx fields to gather all state flag fields in one byte, while
making the counter fields whole bytes.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
The existing uart driver ns16550 did not have ISR locking that
effected IO APIC working in fixed delivery mode in SMP system
x86_64. This commit adds ISR locking mechanism using spinlock
for the interrupt related services.
The CONFIG_IPM_CONSOLE_STACK_SIZE is increased to lift
limitation of stack size experienced in IPM driver test with
this spinlock impelentation.
Fixes#23026
Signed-off-by: Jennifer Williams <jennifer.m.williams@intel.com>
Current dma struture code didn't allowed only rx channel removal,
disabling tx channel (in spi client node) was leading compilation
issue.
Fix this by moving conditional code inside SPI_DMA_CHANNEL macro and
get the part of code which is present or removed (SPI_DMA_CHANNEL_INIT)
outside of {}.
Additionally, fix indentation on '\' in whole instance init macros
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
OpenOCD currently uses a single-bank STM32 configuration for the
B_L072Z_LRWAN1 board. This causes flashing to fail when the firmware
image is larger than the first bank. Switch to the dual bank
configuration to make this work.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
Since introduction of #24374 this test fails on STM32 boards.
Due to 1Hz frequency of RTC used, the 'diff' could be 0.
But then 'counter_us_to_ticks(dev, processing_limit_us)' is also 0.
We should allow the equality in the assert.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
When switching from rising edge to falling edge of test:
test_gpio_deprecated(),
because exti callback is already configured (from rising edge test),
the pin configuration abort for EBUSY reason.
It is necessary to disable interrupt,
so that next test will start with clean configuration.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
All initialization of the Ethernet interface is done in the
eth_initialize function which is invoked by the boot code.
This function sets up DMA, programs the Ethernet module and
enables IRQs. However, this function does not setup "netif"
interface info which is done when the ethernet device is
enumerated by the NET stack via the "iface_api.init" func.
However, after the eth_initialize func is called, it is
possible that the system receives RX interrupts, and the
"rx_thread" accesses the "netif" pointer to get iface info.
However, because the "netif" info is not necessarily
populated at this time, we get a crash (as OS does NULL
access).
Fixed by enabling Ethernet IRQ after the interface is
properly setup.
Tested on Nucleo F767Zi board.
Fixes#25408
Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
Update hal_nordic to fix compilation issue with nrfx_nvmc, compilation
issue for NRF_UICR not defined in non-secure build.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Add missing sample.yaml file to enable CI build tests. Local tests can
be executed executing sanitycheck:
./scripts/sanitycheck -l --testcase-root samples/net/updatehub
Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
Based on the current platform a warning can raise becase of missing
string.h include file.
Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
The conversion from DT_FLASH_AREA to FLASH_AREA macros don't add the
storage flash_map.h include file.
Fixes: #25332
Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
This commit fixes the assertion in test_timer_remaining() that checks
whether the remaining ticks on a timer is less than or equal to half of
the timer duration after a busy wait of that time. If the timer
duration corresponds to an odd number of ticks, 1 should be added to
the upper bound given k_timer_remaining_ticks() returns
<ticks til next deadline> - <elapsed ticks>,
and <elapsed ticks> is truncated to closest integer tick count.
For example, if
dur_ticks = 3277
<ticks til next deadline> = 3277
<elapsed ticks> = 1638.5 rounded to 1638
rem_ticks would be 1639, which is 1 greater than dur_ticks/2.
Fixes#25331
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Use device tree provided configurations for arm architecture timer
PPIs.
This fixes issue of timer ppi not working on most hardware where
edge-triggered PPI are not supported.
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Hardware does not seem to support triggering interrupts to
itself by setting line as both input/output and setting
output to desired level. So just say interrupt triggering
is not supported when line is set to output.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The esp32 offload driver is used by shield esp_8266. This shield
doesn't have tests enabled to ensures that dependencies are ok.
This enables wifi sample to validate shield esp_8266 on CI and
consequently esp32 offload driver.
Fixes: #25386
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
fixes#24706
Fixed issue of possible try to erase non page aligned
size of flash while serving image write command.
The new version has this bug fixed.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
GPIO 050/051 are being used for tachometer sensor as
CONFIG_TACH_XEC is enabled by default. So for the gpio_basic_api
test, another set of GPIOs are needed. GPIO 156/157 are chosen
as they are (more or less) dedicated for two LEDs on board and
not being used for other functions (pinmux-wise).
Fixes#25272
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Fix missing transmit buffer demutiplexing before checking if
slave latency needs to be maintained or cancelled.
This bug was detected when new transmit buffer was enqueued
overlapping with on-air radio transmission of empty PDU
preceding the handling of radio event done.
Symptoms of this bug being data transmission latency of upto
slave latency plus one times connection interval.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Increases the transport segmentented tx seg_o counter to 6 bits to avoid
overflow when sending 32 segments. The check in the send loop would
previously never be false, which causes segments to repeat
unnecessarily.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
Fixes bug where the transport segmented tx would decrement the attempt
counter every time it ran out of buffers. If transport ran out of
buffers 4 times before the sending could complete, the transfer would
end prematurely.
Moves the attempt decrement to only execute when all segments have been
sent.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
Ensures that friend messages are enqueued, even if the packet is
received with an appkey is unknown to the friend. Previously, sdu_recv
would return EINVAL if the appkey was unknown, which would prevent the
lower transport layer from adding the packet to the friend queue. This
is irrelevant for the logic in lower transport, and should not be
returned as an error.
Fixes#24014.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
If LE Read PHY fails the code was still trying to parse the buffer as a
valid response.
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
This fix creates class variables SAMPLE_FILENAME & TESTCASE_FILENAME
in Class TestSuite and remove the hardcoded sample.yaml & testcase.yaml
from add_testcases function. This makes testing for sanitylib script
easier so that shippable do not detect the test_data for sanitylib
as actual zephyr testcases.
Signed-off-by: Aastha Grover <aastha.grover@intel.com>
The nodelabel references for the GPIO region MMU setup were incorrect.
The nodelabel names didn't match what is in the dts. Fix this otherwise
we get a compile error when enabling the functionality.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Enable icount mode for qemu_xtensa platform, The icount shift value
is selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Enable icount mode for hifive1 platform, The icount shift value is
selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Enable icount mode for qemu_riscv64 platform, The icount shift value
is selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Enable icount mode for qemu_riscv32 platform, The icount shift value
is selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Enable icount mode for qemu_cortex_a53 platform, The icount shift
value is selectd based on cpu clock frequency of this platform.
The virtual cpu will execute one instruction every 2^shift ns of
virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Enable icount mode for qemu_cortex_m3 platform, The icount shift value
is selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Enable icount mode for qemu_cortex_m0 platform, The icount shift value
is selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Enable icount mode for qemu_x86 platform, The icount shift value is
selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
