When CONFIG_SYS_POWER_DEEP_SLEEP_STATES is not set, we have an unused
function that causes a build failure.
Enclose that function in the #ifdef.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Remove leading/trailing blank lines in .c, .h, .py, .rst, .yml, and
.yaml files.
Will avoid failures with the new CI test in
https://github.com/zephyrproject-rtos/ci-tools/pull/112, though it only
checks changed files.
Move the 'target-notes' target in boards/xtensa/odroid_go/doc/index.rst
to get rid of the trailing blank line there. It was probably misplaced.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Enables the high-speed spi instance 8 on the lpcxpresso55s69 board.
Configures pinmuxes and clocks, and updates board documentation
accordingly.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
As ISR stack size depends on application code, its best set
in the application's prj.conf file. Hence, remove it from
soc Kconfig files.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Add device tree fixups for the NXP LPI2C bus timeout property to the
NXP i.MX RT and Kineties KE1xF SoC series.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Created MEC1501 deep and light sleep example for MCHP MEC1501.
Modifications were made to SoC, board, timer, and hello world
sample program. Power management split into SoC power
implementing the interface and device power for device specific
logic.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
We remove the custom fixed MPU region definition from ST
STM32 SoC definitions, as the common fixed MPU
region definition is now used.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We remove the custom fixed MPU region definition from ARM
- Beetle
- Musca_a
- Musca_b1
- MPS2 (an385 and an521)
SoC definitions, as the common fixed MPU region definition
is now used.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We remove the custom fixed MPU region definition from Silicon
Labs exx32 SoC definitions, as the common fixed MPU region
definition is now used.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
For the NXP Kinetis SoCs with the NXP MPU regions, we keep
the confiruation of the fixed SoC MPU regions at each SoC
definition.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We remove the custom fixed MPU region definition from NXP IMX
RT, Kinetis, and LPC SoC definitions, as the common fixed MPU
region definition is now used.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We remove the custom fixed MPU region definition from Atmel
SAM SoC definition, as the common fixed MPU region definition
is now used.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We remove the custom fixed MPU region definition from Nordic
nRF SoC definition, as the common fixed MPU region definition
is now used.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We move the configuration of the fixed MPU regions for ARM
Cortex-M SoCs in a common place under soc/arm/common/cortex-m,
instead of having this configuration present in each ARM SoC or
SoC Series definition. The rationale behind this is that for all
SoCs the fixed MPU regions configured at SoC definition are only
used for enforcing default Flash and SRAM access policies, and
currently, this is common to all ARM SoCs with MPU support.
We also simplify the Flash and SRAM MPU region definition,
aiming at using a single MPU region index to program each
of them.
We still support the possibility for ARM SoCs to opt-out and,
instead, define their own custom fixed MPU regions at SoC
definition. We do it using a Kconfig option, introduced
explicitly for this purpose.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Bool symbols implicitly default to 'n'.
A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.
Also replace some
config
prompt "foo"
bool/int
with the more common shorthand
config
bool/int "foo"
See the 'Style recommendations and shorthands' section in
https://docs.zephyrproject.org/latest/guides/kconfig/index.html.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The type of SOC_ATMEL_SAME70_DISABLE_ERASE_PIN is bool, yet its default
is specified as an int value of 0.
This commit removes the implied `default 0`, which is equivalent to
`default n`.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This header contains encoding offsets for all the eSPI channels which
communicate data from/to the host.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
Enable SWO debug output during system initialization and not as part of
GPIO driver initialization. After the modification the logger output
becomes available earlier during the boot process. Also, it's not
necessary anymore to build full GPIO driver only to enable SWO. This may
be critical when building small images.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
We need to fix the formato of the macros for nRF CACHE and NVMC
peripherals in soc.c, so the _S and _NS suffixes are skipped.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Since the nRF5340 DK contains the required DC/DC circuitry,
enable it by default while keeping it configurable. This
reduces power consumption in application core , network
core and high voltage use.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Add device tree elements for all gpio ports of the efr32mg12p including
the dts fixup entries.
Also remove gpio port e since this is not available in efr32mg12p socs.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
SoC initialization had an incorrect comment regarding system clock.
Corrected from 48Mhz -> 96Mhz.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
This commit adds basic support for nRF52833 SoC.
Changes affect introducing:
- architecuture files (dtsi)
- configuration of nrfx drivers
- adaptation of inclusions based on chosen SoC
- configuration of NFCT_PINS_AS_GPIOS depends on HAS_HW_NRF_NFCT.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
This patch introduces the support of the Low Power Timer
for the STM32WBxx from STMicroelectronics.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Enables the arm v7m mpu on the efr32mg soc and the board
efr32mg_sltb004a.
Tested on hardware with samples/mpu/mpu_test and
tests/kernel/mem_protect
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
This patch introduces the support of the Low Power Timer
for the STM32L4xx from STMicroelectronics.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Calls to nrfx HAL functions in various nRF platform related source
files are complemented with pointers to relevant peripherals.
Additionally, TIMER HAL functions that got renamed in nrfx 2.0.0 are
updated in the qemu_cortex_m0 board supporting code.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Update the hal_nordic module revision to switch to nrfx 2.0.0.
Add Kconfig options that enable to use the newly introduced nrfx
drivers in Zephyr.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Promote the private z_arch_* namespace, which specifies
the interface between the core kernel and the
architecture code, to a new top-level namespace named
arch_*.
This allows our documentation generation to create
online documentation for this set of interfaces,
and this set of interfaces is worth treating in a
more formal way anyway.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
There is no imx ccm shim driver in drivers/clock_control. This config
was only used to conditionally compile nxp hal drivers, even though the
imx6/7 soc init always needs them.
Updates the nxp hal to unconditionally compile the ccm drivers and
removes the unnecessary config symbol.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This adds supoprt for the Atmel SAME53 SoC.
The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals
with the sam0 Cortex-M0+ and saml1x Cortex-M23 parts.
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
This adds supoprt for the Atmel SAME51 SoC.
The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals
with the sam0 Cortex-M0+ and saml1x Cortex-M23 parts.
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
This adds supoprt for the Atmel SAMD51 SoC.
The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals
with the sam0 Cortex-M0+ and saml1x Cortex-M23 parts.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
The SERCOMS on SAMD5x/SAME5x are connected to different MCLK
APBMASKs. There is no systematic way to tell whether a SERCOM
is connected to APBA, APBB, APBC or APBD, so rely on the
information from ASF instead of replicating it elsewhere.
This is needed for SPI, I2C and UART support on the SAMD5x/SAME5x
platform.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
This adds supoprt for the Atmel SAME54 SoC.
The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals
with the sam0 Cortex-M0+ and saml1x Cortex-M23 parts.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
This commit refactors kernel and arch headers to establish a boundary
between private and public interface headers.
The refactoring strategy used in this commit is detailed in the issue
This commit introduces the following major changes:
1. Establish a clear boundary between private and public headers by
removing "kernel/include" and "arch/*/include" from the global
include paths. Ideally, only kernel/ and arch/*/ source files should
reference the headers in these directories. If these headers must be
used by a component, these include paths shall be manually added to
the CMakeLists.txt file of the component. This is intended to
discourage applications from including private kernel and arch
headers either knowingly and unknowingly.
- kernel/include/ (PRIVATE)
This directory contains the private headers that provide private
kernel definitions which should not be visible outside the kernel
and arch source code. All public kernel definitions must be added
to an appropriate header located under include/.
- arch/*/include/ (PRIVATE)
This directory contains the private headers that provide private
architecture-specific definitions which should not be visible
outside the arch and kernel source code. All public architecture-
specific definitions must be added to an appropriate header located
under include/arch/*/.
- include/ AND include/sys/ (PUBLIC)
This directory contains the public headers that provide public
kernel definitions which can be referenced by both kernel and
application code.
- include/arch/*/ (PUBLIC)
This directory contains the public headers that provide public
architecture-specific definitions which can be referenced by both
kernel and application code.
2. Split arch_interface.h into "kernel-to-arch interface" and "public
arch interface" divisions.
- kernel/include/kernel_arch_interface.h
* provides private "kernel-to-arch interface" definition.
* includes arch/*/include/kernel_arch_func.h to ensure that the
interface function implementations are always available.
* includes sys/arch_interface.h so that public arch interface
definitions are automatically included when including this file.
- arch/*/include/kernel_arch_func.h
* provides architecture-specific "kernel-to-arch interface"
implementation.
* only the functions that will be used in kernel and arch source
files are defined here.
- include/sys/arch_interface.h
* provides "public arch interface" definition.
* includes include/arch/arch_inlines.h to ensure that the
architecture-specific public inline interface function
implementations are always available.
- include/arch/arch_inlines.h
* includes architecture-specific arch_inlines.h in
include/arch/*/arch_inline.h.
- include/arch/*/arch_inline.h
* provides architecture-specific "public arch interface" inline
function implementation.
* supersedes include/sys/arch_inline.h.
3. Refactor kernel and the existing architecture implementations.
- Remove circular dependency of kernel and arch headers. The
following general rules should be observed:
* Never include any private headers from public headers
* Never include kernel_internal.h in kernel_arch_data.h
* Always include kernel_arch_data.h from kernel_arch_func.h
* Never include kernel.h from kernel_struct.h either directly or
indirectly. Only add the kernel structures that must be referenced
from public arch headers in this file.
- Relocate syscall_handler.h to include/ so it can be used in the
public code. This is necessary because many user-mode public codes
reference the functions defined in this header.
- Relocate kernel_arch_thread.h to include/arch/*/thread.h. This is
necessary to provide architecture-specific thread definition for
'struct k_thread' in kernel.h.
- Remove any private header dependencies from public headers using
the following methods:
* If dependency is not required, simply omit
* If dependency is required,
- Relocate a portion of the required dependencies from the
private header to an appropriate public header OR
- Relocate the required private header to make it public.
This commit supersedes #20047, addresses #19666, and fixes#3056.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Replace CONFIG_WDT_0_NAME with DT_ALIAS_WATCHDOG_0_LABEL in samples and
test code. Now that all drivers are DT aware we don't ever set the
Kconfig option.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit adds driver support for DMA on f0/f1/f2/f3/f4/l0/l4
series stm32.
Notice due to some bugs, this is currently not working with f7.
There are two kinds of IP blocks are used across these stm32, one is the
one that has been used on F2/F4/F7 series, and the other one is the one
that has been used on F0/F1/F3/L0/L4 series.
Memory to memory transfer is only supported on the second DMA on
F2/F4 with 'st,mem2mem' to be declared in dts.
This driver depends on k_malloc to allocate memory for stream instances,
so CONFIG_HEAP_MEM_POOL_SIZE must be big enough to hold them.
Common parts of the driver are in dma_stm32.c and SoC related parts are
implemented in dma_stm32_v*.c.
This driver has been tested on multiple nucleo boards, including
NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/L073RZ/L476RG with the
loop_transfer and chan_blen_transfer test cases.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
This commit moves DMA parameters previously hard coded in the driver
to the dts.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
1) Add cryptographically secure random functions to provide
FIPS 140-2 compliant random functions.
2) Add name to random function choice selectors to ease
selection in SOC .defconfig files
3) Add bulk fill random functions.
Signed-off-by: David Leach <david.leach@nxp.com>
Introduce a Kconfig symbol that utilizes a dt function to determine if
we have STM32 CCM functionality being utilized. This removes the
dependance on parsing symbols from generated_dts_board.conf.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use this short header style in all Kconfig files:
# <description>
# <copyright>
# <license>
...
Also change all <description>s from
# Kconfig[.extension] - Foo-related options
to just
# Foo-related options
It's clear enough that it's about Kconfig.
The <description> cleanup was done with this command, along with some
manual cleanup (big letter at the start, etc.)
git ls-files '*Kconfig*' | \
xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /'
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Clean up space errors and use a consistent style throughout the Kconfig
files. This makes reading the Kconfig files more distraction-free, helps
with grepping, and encourages the same style getting copied around
everywhere (meaning another pass hopefully won't be needed).
Go for the most common style:
- Indent properties with a single tab, including for choices.
Properties on choices work exactly the same syntactically as
properties on symbols, so not sure how the no-indentation thing
happened.
- Indent help texts with a tab followed by two spaces
- Put a space between 'config' and the symbol name, not a tab. This
also helps when grepping for definitions.
- Do '# A comment' instead of '#A comment'
I tweaked Kconfiglib a bit to find most of the stuff.
Some help texts were reflowed to 79 columns with 'gq' in Vim as well,
though not all, because I was afraid I'd accidentally mess up
formatting.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Move the definition of INIT_ENET_PLL to soc/arm/nxp_imx/rt/Kconfig.soc,
which is where the other INIT_*_PLL symbols are defined, and consistenly
enable it with 'select' like for the other symbols, instead of via
Kconfig.defconfig.mimxrt{1052,1062,1064}.
Remove an old empty INIT_ENET_PLL definition from
soc/arm/nxp_imx/rt/Kconfig.defconfig.series, which was just there to
hack around a dependency on NET_L2_ETHERNET. If the symbol does not
depend on NET_L2_ETHERNET in all cases, it's better to not add the
dependency.
Also add a help text to hint what's going on there.
Found with a script (INIT_ENET_PLL was only defined in Kconfig.defconfig
files).
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
SOC_SERIES is already defined with a type in arch/Kconfig, which is
always included.
Trying to get rid of unnecessary "full" symbol definitions in
Kconfig.defconfig files, to make the organization clearer. It can also
help with finding unused symbols.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Put a common definition of the SOC_PART_NUMBER symbol in
soc/arm/Kconfig, to make it always available for ARM SoCs. Have the
other definitions extend the base definition, without repeating the
type.
Also put the help text on just the base definition. It will show up in
the generated documentation and when looking at the symbol information
at any of the definition locations in the menuconfig (after going into
show-all mode).
Trying to get rid of unnecessary "full" symbol definitions in
Kconfig.defconfig files, to make the organization clearer. It can also
help with finding unused symbols.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Add a common definition for NUM_IRQS in arch/arm/core/Kconfig and
arch/riscv/Kconfig. That way, the type doesn't have to be given for
NUM_IRQS in all the Kconfig.defconfig files.
Trying to get rid of unnecessary "full" symbol definitions in
Kconfig.defconfig files, to make the organization clearer. It can also
help with finding unused symbols.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Same deal as in commit 7fdb525754 ("kconfig: Use 'default' instead of
'def_bool' in Kconfig.defconfig files"), but I hacked Kconfiglib to also
find cases where the type is given separately as e.g.
config FOO
int
default 3
Motivation (from a note in
https://docs.zephyrproject.org/latest/guides/kconfig/index.html):
For a symbol defined in multiple locations (e.g., in a
Kconfig.defconfig file in Zephyr), it is best to only give the
symbol type for the "base" definition of the symbol, and to use
'default' (instead of 'def_<type>' value) for the remaining
definitions. That way, if the base definition of the symbol is
removed, the symbol ends up without a type, which generates a
warning that points to the other definitions. That makes the extra
definitions easier to discover and remove.
It's also nice if 'def_bool' and the like turn into a semi-reliable flag
that the symbol is only defined in Kconfig.defconfig files. That might
be a sign that things could be cleaned up.
Will do a separate pass later to remove some symbols only defined in
Kconfig.defconfig files.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Replace:
dt_chosen_reg_addr
dt_chosen_reg_size
dt_node_reg_addr
dt_node_reg_size
with:
dt_chosen_reg_addr_int
dt_chosen_reg_size_int
dt_chosen_reg_addr_hex
dt_chosen_reg_size_hex
dt_node_reg_addr_int
dt_node_reg_size_int
dt_node_reg_addr_hex
dt_node_reg_size_hex
So that we get the proper formatted string for the type of symbol.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that everything is DT based for I2C drivers we can rename the
CONFIG_I2C_[0..5]_NAME define to DT_I2C_[0..5]_NAME.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add binding for arm,mps2-fpgaio-gpio and update device tree and change
FPGA GPIO init code to utilize device tree defines.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Configures the default sdhc driver for the imx rt soc series so
applications don't have to configure it explicitly.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Unused after commit 4973787c10 ("pinmux: Remove the k64 pinmux driver").
Found with a script.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Move the selection of the IP clock source for the modules in the NXP
Kinetis KE1xF SoCs from being hardcoded in soc.c to being specified in
the device tree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add missing definitions for the base addresses of the NXP LPUARTs to
the NXP KE1xF SoC DTS fixup.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
For nordic_nrf, this commit relocates HAS_CMSIS_CORE selection from
SoC Kconfig to the HAL module Kconfig, as done for other SoCs.
For nxp_kinetis, remove redundant HAS_CMSIS_CORE selection in SoC
Kconfig, as it is already selected by the HAL Kconfig.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates all references to HAS_CMSIS to use HAS_CMSIS_CORE
instead. With the changes introduced to allow multiple CMSIS variants
to be specified, the latter is semantically equivalent to the former.
For more details, see issue #19717.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
STM32L151XB-A SoC is almost similar to the STM32L151XB SoC except that
it has more RAM (32KiB). Hence add devicetree and Kconfig support.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Remove the inclusion of kernel_includes.h from soc.h and replace
it with including the board-specific auto-generated headers. This
aligns the soc.h header with the current policy not to include
kernel headers in soc.h.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We enable Memory Protection on stm32 nucleo_g071rb board,
since the respective SoC series implements the ARM MPU.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Remove the
# Omit prompt to signify a "hidden" option
comments that appear on some symbols. They seem to have been copy-pasted
at random, as there are lots of promptless symbols that don't have them
(that's confusing in itself, because it might give the idea that the
ones with comments are special in some way).
I suspect those comments wouldn't have helped me much if I didn't know
Kconfig either. There's a lot more Kconfig documentation now too, e.g.
https://docs.zephyrproject.org/latest/guides/kconfig/index.html.
Keep some comments that give more information than the symbol having no
prompt.
Also do some minor drive-by cleanup.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
STM32L1 uses the same spi controller as STM32F1 so we can just set the
right addresses and enable them. We also need to add the fixup names and
to correctly include the header for ST LL HAL.
Signed-off-by: Karl Palsson <karlp@etactica.com>
Move systick activation in soc/ as a Kconfig.defconfig file and
remove activation in boards _defconfig files.
This will allow to deactivate it in a more flexible way
with upcoming LPTIMER as tick source when power management
features are enabled.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
For LL header inclusion, use _STM32 Kconfig symbol
(related to the driver), rather than generic symbol,
that could theoretically use an alternate solution.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The patch adds initial support for STM32F030X4 SoC.
STM32F0 Cube package advises to use 'stm32f030x6' code
for both STM32F030x4 and STM32F030x6 SoC variants.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Add soc and dts files to support for most of the common peripherals
in the STM32G4 series. Add specific support for the STM32G431RB.
Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
Add KConfig board support to match board jumper settings
Failing to update bank selection will affect GPIOs tied to VTR3
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
This patch re-namespaces global variables and functions
that are used only within the arch/arm/ code to be
prefixed with z_arm_.
Some instances of CamelCase have been corrected.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Add a set of build time assertions that checks if the peripheral base
addresses defined in dts nodes match the values provided by nrfx/MDK.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Enable CMSDK GPIO driver on v2m_musca_b1 SoC/Board. Add LEDs that are
on the board and init the pinmux for those LEDs to work.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This adds support for Kinestis K22
Co-authored-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Co-authored-by: Oliver Stäbler <oliver.staebler@bytesatwork.ch>
Co-authored-by: Tom Burdick <thomas.burdick@gmail.com>
Signed-off-by: Tom Burdick <thomas.burdick@gmail.com>
We shall not include core kernel headers in soc.h
header of ARM SoCs. We should try to only include
the vendor headers and auto-generated board header
from DTS. This commit implements this policy for
the SoCs, whose builds have shown to fail due to
header inclusion cycles.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This file contains redundant definitions of a bunch of nRF IRQ numbers
(not all, however) that only generates confusion, as enumeration values
provided by MDK can be used instead.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This change is done so that there is no need to additionaly include
<nrfx.h> before <soc/nrfx_coredep.h> (what might be a bit surprising)
and so that <nrfx_config.h> doesn't need to be include separately for
nRF SoCs requiring a special mapping of peripheral accessing symbols.
This commit removes also no longer needed inclusions and updates
the hal_nordic module with required minor correction of nrfx_glue.h.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Header files of nrfx HALs are not supposed to be included directly
but only with their names prepended with the hal/ directory (so that
an inclusion of an nrfx HAL header clearly differs from an inclusion
of an nrfx driver header).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
A commit that organizes the soc.h header of NXP SoCs:
- removing redundant inclusions of sys/util.h
- removing inclusions of device.h and kernel_includes.h
- including the auto-generated DTS board header
- including the fsl_common.h header
- fixing minor style issues
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We, now, have multiple nRF52x SoCs with 2.4GHz
Radio with LE Coded PHY Capabilities. Therefore,
we would like to have a Kconfig option and select
it in the corresponding SoCs. This allows us to
simplify several #ifdef blocks in the nRF Bluetooth
Controller that would, otherwise, require listing
all nRF SoCS with LE Coded PHY support.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Enable CMSDK GPIO driver on v2m_musca SoC/Board. Add LEDs that are on
the board and init the pinmux for those LEDs to work.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
A 16bits on/off based PWM, found on MEC1501.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add RTC timer driver for CC13X2/CC26X2, and use it instead of systick
as system clock. It is necessary to use this timer for power
management support, so that the system can exit from deep sleep upon
expiry of timeouts.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
No users of this driver after dropping quark platforms.
COUNTER_0_NAME was only defined by the QMSI driver and was defined but
not used in DTS fixup files of ateml_sam0 SoCs. Removing those leftover
defines as well.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
RT SOCs have several memory areas (OCRAMs, DTCM, ITCM, SDRAM, FLASH...)
but only two are selected for FLASH (code) and RAM (data).
It would be good to let the linker be aware about other regions, which
could then be used by drivers or application to create dedicated
sections and relocate memory. For example if we have code in ITCM and
data in DTCM, we still need a dma-able region/section for e.g.
video/camera buffers.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
There are 2 other timers that could be selected, let's just take the
first 32bits one. This should be sufficient to verify the driver.
Enabling the timer in relevant board's dts file as well.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Such basic timer is found on MEC150x for instance.
Since instances have dedicated data, let's define specifice instance
based on unique DT base address definition.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Refactors the kinetis flash configuration field so it can be shared
across all kinetis SoCs. Defaults are overridden for the k8x and ke1xf
series to preserve values used prior to this refactoring.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Kinetis SoCs have a 16-byte flash configuration field that must be
loaded at a specific address in flash. This field is not needed if we
are building an image to be chainloaded by MCUboot or a RAM-only image,
so we can exlude it in these cases and recover some wasted flash.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Convert use of dt_int_val/dt_hex_val to dt_node_reg_{addr,size}. As
we want to remove dt_int_val/dt_hex_val.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert how we get the various chosen properties like "zephyr,console"
to use the new kconfig functions like dt_chosen_to_label.
Because of how kconfig parses things we define a set of variables of the
form DT_CHOSEN_Z_<PROP> since comma's are parsed as field seperators in
macros.
This conversion allows us to remove code in gen_defines.py for the
following chosen properties:
zephyr,console
zephyr,shell-uart
zephyr,bt-uart
zephyr,uart-pipe
zephyr,bt-mon-uart
zephyr,uart-mcumgr
zephyr,bt-c2h-uart
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Configuration item custom busy wait is required for all MEC1501
series if its RTOS timer driver is enabled. We moved the selection
of the timer from board level to MEC1501 SoC level.
Frequency selection remains at the board level.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Enables the arm v7m mpu on the lpc54114 m4 core. Reuses the mpu
configuration from the i.mx rt, which has the same mpu.
Tested on hardware with tests/kernel/mem_protect
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The driver for STM32's independent watchdog already exists and is
compatible with the stm32wb SoC. Enable the independent watchdog
for the stm32wb series for use with this driver.
Signed-off-by: Robert Weber <robertweber95@gmail.com>
The KE1xF SoC family SIM unit differs from the other Kinetis family
SoCs. Add a unique compatiable and binding for it.
Fixes#18160
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update the module revision so that the following commits become
effective:
* nrfx_config: Use common mappings of Kconfig options to nrfx macros
* nrfx_config: Unify the way of enabling instances in nrfx drivers
* nrfx_config: Add missing mappings of Kconfig option symbols
* CMakeLists: Add missing inclusions of driver implementation files
The above changes require a minor correction in the nrf91/soc.h file,
so it is also modified in this commit.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This patch adds HAS_SWO selections to all STM32 SoCs supporting Serial
Wire Output via the Trace Port Interface Unit (TPIU).
Signed-off-by: Markus Fuchs <markus.fuchs@de.sauter-bc.com>
This is required to get the watchdog test and sample working since the
required wdt device name macro is generic there.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
There are only 178 interrupt lines on CC3220SF. Hence we should not set
NUM_IRQS to a value exceeding that value. We are changing it to 178.
Fixes#18593
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Consistently place C++ use of extern "C" after all include directives,
within the negative branch of _ASMLANGUAGE if used.
Remove extern "C" support from files that don't declare objects or
functions.
Background from issue #17997:
Declarations that use C linkage should be placed within extern "C"
so the language linkage is correct when the header is included by
a C++ compiler.
Similarly #include directives should be outside the extern "C" to
ensure the language-specific default linkage is applied to any
declarations provided by the included header.
See: https://en.cppreference.com/w/cpp/language/language_linkage
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Remove extern "C" support from files that don't declare symbols subject
to language linkage effects.
Consistently place C++ use of extern "C" after all include directives,
within the negative branch of _ASMLANGUAGE if used.
Background from issue #17997:
Declarations that use C linkage should be placed within extern "C"
so the language linkage is correct when the header is included by
a C++ compiler.
Similarly #include directives should be outside the extern "C" to
ensure the language-specific default linkage is applied to any
declarations provided by the included header.
See: https://en.cppreference.com/w/cpp/language/language_linkage
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Move the tail include file outside the extern "C" block.
Background from issue #17997:
Declarations that use C linkage should be placed within extern "C"
so the language linkage is correct when the header is included by
a C++ compiler.
Similarly #include directives should be outside the extern "C" to
ensure the language-specific default linkage is applied to any
declarations provided by the included header.
See: https://en.cppreference.com/w/cpp/language/language_linkage
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Remove extern "C" support from files that don't declare symbols subject
to language linkage effects.
Background from issue #17997:
Declarations that use C linkage should be placed within extern "C"
so the language linkage is correct when the header is included by
a C++ compiler.
Similarly #include directives should be outside the extern "C" to
ensure the language-specific default linkage is applied to any
declarations provided by the included header.
See: https://en.cppreference.com/w/cpp/language/language_linkage
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
'timeout' needs to be a signed variable, so that the
check for less-than-zero is able to result to true (if
the timeout actually expires). Addresses the coverity
issue [Coverity CID :203493] reported in #18379.
Fixes#18379.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The HAL/SDK code for imx6sx utilizes floating point support in
CCM_ANALOG_GetPllFreq function which is utilized by drivers to determine
clock information. As such we should enable hardware FP support by
default so we don't get pure soft-float emulation and pull in a bunch of
extra code.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit adds support for the Zynq UltraScale+ MPSoC as a qemu based
platform for Cortex-R based testing. This SoC only supports an
interrupt controller and serial port for limited testing.
Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
Use address based defines in the dts_fixup.h instead of DT_INST_ based
ones. The DT_INST_ will not get us the consistent mapping that is
needed (as we should assume the order of DT_INST_).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In nRF9160 the reset pin is a dedicated one, it cannot be configured
as a regular GPIO pin, so this option should not be presented to users
building for this SoC, to not generate confusion.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In order to increase code coverage, we force building a Secure
Firmware image by default (i.e. with option
CONFIG_TRUSTED_EXECUTION_SECURE set), when building for
mps2_an521 board. CONFIG_TRUSTED_EXECUTION_SECURE enables
compiling-in all TrustZone-related code in the tree, that is,
all ARM-specific code inside #ifdef CONFIG_ARM_SECURE_FIRMWARE.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Use clock specified in the device tree for obtaining the source clock
frequency for the pwm_mcux_ftm driver instead of relying on having an
NXP Kinetis MCG clock available in all SoCs supporting FlexTimer (FTM)
modules.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Perform OTP override when selecting 32Khz internal oscillator
to ensure 32KHz is enabled.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
i.MX RT10XX processors have four eFlexPWM modules, each containing
four 2-channels PWM submodules.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Changes to MEC1501 HAL for eSPI changed loop constant used by SoC
code initializing the ECIA registers. Fixed by using HAL constants
that are invariant.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
pinmux: Add the relevant definition of the spi3 pin
dts: Fix a bug, spi3 does not have a label
soc: Supplement spi3 related definition
Signed-off-by: Findlay Feng <i@fengch.me>
Add a hidden Kconfig option indicating that a given SoC is equipped
with the IEEE 802.15.4 capable radio so that the corresponding driver
configuration can depend on it.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Because NXP MPU's regions are dynamically enabled/disabled, USB
device's access maybe restricted when switching out of a task.
Background DMA transfers to/from RAM may happen during MPU region
reconfiguration or core idling.
Enabled USB (Kinetis MPU Master 4) to always have access to RAM address
space.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
The SoC clock init code for USB was using a deprecated DTS define.
Switch to using the non-deprecated form.
Fixes: #17772
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a kernel timer driver for the MEC1501 32KHz RTOS timer.
This timer is a count down 32-bit counter clocked at a fixed
32768 Hz. It features one-shot, auto-reload, and halt count down
while the Cortex-M is halted by JTAG/SWD. This driver is based
on the new Intel local APIC driver. The driver was tuned for
accuracy at small sleep values. Added a work-around for RTOS
timer restart issue. RTOS timer driver requires board ticks per
second to be 32768 if tickless operation is configured.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
The uart_stellaris driver used system clock frequency
as a base for baudrate calculation. This commit corrects
that by obtaining the needed value from DTS.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The uart_msp432p4xx driver used system clock frequency
as a base for baudrate calculation. This commit corrects
that by obtaining the needed value from DTS.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The uart_pl011 driver used system clock frequency
as a base for baudrate calculation. This commit corrects
that by obtaining the needed value from DTS.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The log_backend_swo used system clock frequency
as a base for SWO clock calculation. This commit
corrects that by obtaining the needed value from DTS.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The SoC initialization code used timer clock frequency
as a system clock frequency. This commit corrects that by
obtaining the needed value from DTS.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The SoC initialization code used system clock frequency
as a CPU clock frequency. This commit corrects that by
obtaining the needed value from DTS.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The SoC initialization code used system clock frequency
as a CPU clock frequency. This commit corrects that by
obtaining the needed value from DTS.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The SoC initialization code used system clock frequency
as a CPU clock frequency. This commit corrects that by
obtaining the needed value from DTS.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The SoC initialization code used system clock frequency
as a CPU clock frequency. This commit corrects that by
obtaining the needed value from DTS.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The SoC initialization code used system clock frequency
as a CPU clock frequency. This commit corrects that by
obtaining the needed value from DTS.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The SoC initialization code used system clock frequency
as a CPU clock frequency. This commit corrects that by
obtaining the needed value from DTS.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The SoC initialization code used system clock frequency
as a CPU clock frequency. This commit corrects that by
obtaining the needed value from DTS.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The SoC initialization code used system clock frequency
as a CPU clock frequency. This commit corrects that by
obtaining the needed value from DTS.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The SoC initialization code used system clock frequency
as a CPU clock frequency. This commit corrects that by
obtaining the needed value from DTS.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The i2c_cc32xx driver used system clock frequency
as a base for I2C clock frequency calculation.
This commit corrects that by obtaining the needed value from DTS.
Please note, that for I2C devices the clock-frequency property
specifies SCK frequency, instead of frequency of the clock driving
peripheral. To solve that problem, a new property was added.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Have the SoC dtsi files for microchip mark the devices (uart & i2c) as
disabled by default and let the board dts files enable which one's they
need/use (which is what's happening already).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Because NXP MPU's regions are dynamically enabled/disabled, ENET
device's access maybe restricted when switching out of a task.
Background DMA transfers from RAM to MAC/PHY may happen during MPU
region reconfiguration or core idling.
Enabled ENET (Kinetis MPU Master 3) to always have access to RAM address
space.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
This patch populates "clocks" property in stm32 usb nodes
for clock related usb configuration code of each dtsi files
Signed-off-by: Francois Ramu <francois.ramu@st.com>
uint8_array values are now generated as structure initializers. Update
the code accordingly. The implementation assumes that existing
devicetree source does not provide the correct OUI so preserves the
in-driver override of the value provided by devicetree and its setting
for random/unique addresses.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Implementation of pinmux of usdhc depends on board design.
Usdhc driver could change pinmux according to SD mode, SoC
should provide API for this. Board pinmux should register
its pinmux function to SoC.
Signed-off-by: Jun Yang <jun.yang@nxp.com>
Add flash support for STM32G0X SoC series.
Signed-off-by: Philippe Retornaz <philippe@shapescale.com
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This patch adds support for the STM32G071xx
from STMicroelectronics.
Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Protect gpio_configure function in dual core context.
This operation is not needed for other fuctions of the api:
* init
* read
* write
Protecting gpio_configure also protects access to
interrupt_controller IP.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add support for C-M4 core on STM32H7 series.
It is enabled in Dual core context with 2 alternatives boot methods:
* Boot CM4 CM7: Both core boot at reset, then CM4 enters Stop mode.
CM7 performs system configuration then finally wakes up CM4
* Boot CM7, CM4 Gated: Only CM7 boots at reset. Once done with
system configuration it triggers (requires option byte update)
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Provide basic clock control driver for STM32H7.
Bus clock activation is done through CM7 and CM4 common registers
so we don't have to care to the CPU Id before accessing.
Accesses are not protected for now. Only possible configuration
is system clock source set to HSE driven PLL.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
As with the STM32 boards, these had an existing default for tick rate
that is now lower than the 10 kHz default. They're SysTick devices
that can handle the higher rate just fine. Use that.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The nRF timer runs at only 32 kHz, so there's little reason to try to
divide it to get a synthesized tick rate. Just use the raw clock as
the tick rate, which provides maximal precision and very
singnificantly simplifies the generated code for the ISR.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
UART related defines in STM32F7 files where filled with
references to USART.
Instances 4, 5, 7 and 8 of SoC serial port are actually UARTs.
So rename define's accordingly. Otherwise it couldn't build.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The IPC peripheral is missing from the list of
supported HW for nRF9160, so this commit adds
that.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem
with SIE-200 and CMSDK components targeting the MPS2+ board. The
SSE-200 subsystem implements two Cortex-M33 cores.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
move misc/util.h to sys/util.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move misc/slist.h to sys/slist.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move misc/__assert.h to sys/__assert.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move uart.h to drivers/uart.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move sys_io.h to sys/sys_io.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move power.h to power/power.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Enable the MCUX SCG clock controller driver by default for the NXP
Kinetis KE1xF SoC series. Move the generic CLKOUT configuration from
SoC to the clock controller driver.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Allow individual specification of the time quanta used for the CAN bus
propagation segment and phase segment 1.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Definition of obsolete FLASH_PAGE_SIZE Kconfig symbol was
remaining in STM32F3 soc files.
Clean these.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
stm32mp1 was adding a STM32 specific Core selection Kconfig
symbol while zephyr generic CPU_CORTEX_M4 could be used for the
same purpose.
Remove STM32 specific symbol and use generic one.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Change code from using now deprecated DT_<COMPAT>_<INSTANCE>_<PROP>
defines to using DT_INST_<INSTANCE>_<COMPAT>_<PROP>.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Sample was not compiling for nordic boards because RTC_0
instance was not enabled by default and RTC_0 device is using
different DT define.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This commit adds counter driver based on RTCC module for SiLabs Gecko
SoCs.
Tested with SLWSTK6061A / BRD4250B wireless starter kit.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
These events aren't errors at all, but rather part of normal operation.
They shouldn't trigger error messages, especially given that the console
gets absolutely flooded with them if power management is activated.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
stm32wb55rg is a dual core SoC (M4/M0) with a radio/protocol stack
running on M0 core. M0 FW starts at flash address 0x80CB000.
So flash size available to zephyr is 812K instead of 1M.
Configure package size to reflect this (flash size is now 812K)
and update MPU setting to exclude M0 FW. From MPU point of view,
we set flash size to 512K since we should chose a size being a power
of 2.
If we consider there will be 2 images partitions in a FOTA scheme,
512 K is beyond image-0 and hence is sufficient to cover application
image.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32WB HCI driver requires definition of 2 RAM regions to support
use of 3 shared memory sections: MAPPING_TABLE, MB_MEM1 and MB_MEM2.
In linker.ld, under conditions of HCI driver to be enabled,
define SRAM1 and SRAM2 based on input defined in stm32wb linker.
Then define the 3 sections MAPPING_TABLE, MB_MEM1 and MB_MEM
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Several customer configuration (CCFG) settings are useful for
development and deployment. This commit adds support for setting CCFG
values via Kconfig. It follows TI's recommendation of setting CCFG
values and then including the TI provided CCFG. This commit includes
support for enabling the ROM bootloader and additional settings can be
added as needed.
Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
soc_register.h is available in most of stm32 series.
It is sometime empty or contains includes to flash_registers.h,
which is included directly with direct reference in flash driver.
soc_register.h is also included in stm32 clock drivers, but this
driver do not use direct reference to any register anymore.
Clean up these files.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
tests/drivers/i2c/i2c_api wants to have CONFIG_I2C_0_NAME defined.
Add it to dts_fixup.h as was done for Watchdog and & timer.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
This adds support for the basic timer counter (TC) found on SAM0
series parts. This driver only supports running the counter
in 32 bit wide mode. Since this mode explicitly slaves the odd
counters to the even ones, only instances of the even ones are
defined.
Tested with tests/drivers/counter/counter_basic_api on SAMD21.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
Define pinmux base addresses from gpio bases. Pinmux
and gpio functionality are located in the same PCR register
for each pin.
Introduce pinmux Kconfig switches for the SOC.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
This commit enforces platform-specific initialization
for nRF SoC family. The specific platform initialization
hook is invoked directly after reset and calls the nRFx
SystemInit() function.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add support for the Low Power Inter-Integrated Circuit (LPI2C)
controllers found in the NXP Kinetis KE1xF SoC series.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add option for enabling the Code Cache present on the NXP Kinetis
KE1xF SoC series and enable it by default.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Unlike Cortex-M3 and Cortex-M4, in Cortex-M7 the number of
MPU regions may vary based on the implementation. This commit
adds a DTS node for the ARM MPU peripheral in the device tree
of Cortex-M7 SoCs and updates the fixup files, so we may extract
the number of MPU regions at build time. SoCs:
- nxp_rt
- same70
- stm32f7
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit adds a DTS node for the ARM MPU peripheral in the
device tree of ARMv8-M SoCs (for the secure and the non-secure
DTS descriptions) and updates the fixup files. SoCs:
- nrf9160
- musca_a
- musca_b1
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
In kernel_arch_init() we initialize the ARM core (interrupt
setup, fault init, etc.) so we can also move z_clearfaults()
in the same function and skip invoking it in the SoC init
functions.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Sample walk through:
1. CPU 0 will wake up CPU 1 after initialization
2. CPU 1 will send to CPU 0 an interrupt over MHU0
3. CPU 0 return the same to CPU 1 when received MHU0 interrupt
4. Test done when CPU 1 received MHU0 interrupt
The wake up second core and private core ID are soc specific.
Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
The CONFIG_CLOCK_CONTROL and CONFIG_NRF_RTC_TIMER were
unconditionally selected when enabling any nRF SoC. But since
timers can be disabled in the kernel, depend instead on
CONFIG_SYS_CLOCK_EXISTS, which is only defined when kernel
timer support is included.
Note that ideally we would enable CONFIG_NRF_RTC_TIMER only, and
that would select CONFIG_CLOCK_CONTROL (on which the RTC timer
depends) but there is a circular Kconfig dependency that prevents
us from doing so.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Add support for NXP MCUX LPUART devices with separate IRQ lines for
transmit and receive status interrupts (e.g. the Kinetis KE1xF SoC
series).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit adds basic support for nrf52811 in the arch SoC, dts
and nrfx folders.
The nRF52811 is a Bluetooth 5.1 Direction Finding SoC with comprehensive
protocol support.
The nRF52811 SoC is capable of the latest features of Bluetooth 5.1,
the most prominent being Direction Finding.
The radio in the nRF52811 SoC has comprehensive protocol capabilities,
including Bluetooth 5.1 Directing Finding, all Bluetooth 5 features,
802.15.4, Thread, Zigbee, ANT and 2.4 GHz proprietary.
It has 4 dBm TX power and has been optimized to offer the best RX
sensitivity of all SoCs in the nRF52 series.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
add usbd1 definition to rt dts file,
set EHCI controller config default value in rt1050 default config file,
add EHCI controller driver MACROs to dts_fixup.h,
initialize EHCI clock in rt soc.c
add HAS_MCUX_USB_EHCI for supported soc in Kconfig.soc
Signed-off-by: Mark Wang <yichang.wang@nxp.com>
Hex firmware file is convenient in some scenarios, like
generating signed firmware with `west sign`. So, enable
generating hex file.
Signed-off-by: Jun Li <jun.r.li@intel.com>
Macros and enums are included for supporting pin configuration
settings.
Entries to the dts_fixup were also included in order
to configure port level settings.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
This commit adds driver support for ADC1 on all 8 supported series of
stm32 with resolution and conversion time selection and calibration.
Currently DMA is not supported for all series, and without it, zephyr
won't be able to catch up ADC's end of conversion interrupt, so this
version of the driver supports one channel conversion only. Users want
multi-channel conversion should use multiple sequences in their app
code.
This driver uses LL lib rather than HAL because the current HAL lib for
ADC will call HAL_DMA_* functions rather than using zephyr's common DMA
interface, so that way the driver will break the consistency of the
code.
This driver has been tested on multiple nucleo boards including
NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/F746ZG/L073RZ/L476RG and all
passed the test cases in tests/drivers/adc/adc_api. If the external ADC
line is floating, it may fail the tests since ADC may get 0V and the
test cases think 0 is failing. Connect it to any voltage source between
0-3.3V will help passing the test cases.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
All series of stm32 have at least one ADC instance and this commit adds
one ADC node to the root dts file of each soc, and also adds fixing up
mappings to them.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
The revision A and B of the chip are very close, so most of the code
will work if the wrong revision is selected. To avoid that, check that
the selected HAL and the chip CIDR match. Otherwise emit a warning
in the logs.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This patch adds support for the revision B of the SAM E70 SoC. It adds
all the rev B part numbers, and when users pick-up one of those part
numbers, the revision B HAL is used instead.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This adds interrupt support to the SAM0 GPIO driver. This is heavily
inspired by @nzmichaelh work in #5715. The primary difference
from that implementation is that here the External Interrupt
Controller (EIC) is separated out into an interrupt controller driver
that is less tightly coupled to the GPIO API. Instead it implements
more of a conversion from the EIC's own odd multiplexing to a more
traditional port and pin mask IRQ-like callback. Unfortunately,
through the EIC on the SAMD2x are relatively well behaved
in terms of pin to EIC line mappings, other chips that share the
peripheral interface are not. So the EIC driver implements a
per-line lookup to the pin and port pair using definitions extracted
from the ASF headers.
The EIC driver still makes some assumptions about how it will be used:
mostly it assumes exactly one callback per port. This should be fine
as the only intended user is the GPIO driver itself.
This has been tested with some simple programs and with
tests/drivers/gpio/gpio_basic_api on a SAMD21 breakout and an
adafruit_trinket_m0 board.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
This reverts commit bd24b31139.
While the test case failure described in #14186 is associated with the
cycle-based busy-wait implementation, that test is fragile, and fails
less frequently once the incongruence between ticks-per-second and the
32 KiHz RTC clock are resolved. It also assumes that the system clock
is more stable than the infrastructure underlying the the busy-wait
implementation, which is not necessarily true.
The gross inaccuracies in the standard busy-wait on Nordic described in
issue #11626 justify restoring the custom solution.
As this applies to all Nordic devices, move the setting to the top-level
Kconfig.defconfig.
See: https://github.com/zephyrproject-rtos/zephyr/issues/11626#issuecomment-487243369
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The default system clock on all Nordic devices is based on a 32 KiHz
(2^15 Hz) timer. Scheduling ticks requires that deadlines be specified
with a timer counter that aligns to a system clock. With the Zephyr
default 100 clocks-per-sec configuration this results in 100 ticks every
32700 ticks of the cycle timer. This reveals two problems:
* The uptime clock misrepresents elapsed time because it runs 0.208%
(68/32768) faster than the best available clock;
* Calculation of timer counter compare values often requires an integer
division and multiply operation to produce a value that's a multiple
of clock-ticks-per-second.
Integer division on the Cortex-M1 nRF51 is done in software with a
(value-dependent) algorithm with a non-constant runtime that can be
significant. This can produce missed Bluetooth deadlines as discussed
in upstream #14577 and others.
By changing the default divisor to one that evenly divides the 2^15
clock rate the time interrupts are disabled to manage timers is
significantly reduced, as is the error between uptime and real time. Do
this at the top level, moving SYS_CLOCK_HW_CYCLES_PER_SEC there as well
since the two parameters are related.
Note that the central_hr configuration described in upstream #13610 does
not distinguish latency due to timer management from other
irq_block/spinlock regions, and the maximum observed latency will still
exceed the nominal 10 us allowed maximum. However this does occur
much less frequently than changing the timer deadline which can happen
multiple times per tick.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Add initial support for the TI CC13x2 / CC26x2 series with the CC2652R
and CC1352R SoCs. The UART and GPIO peripherals are supported. Drivers
use the driverlib HAL from the TI CC13x2 / CC26x2 SDK.
Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
Add support for stm32mp1 basic UART API with Zephyr.
UART Console and UART shell are also supported.
Async UART API and USART support is to be done.
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Move SERCOM peripherals to use the raw defines generated from DTS
parsing. This adds aliases to the DTS so that the SERCOM number
can still be used for clocking and pinmux.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
This adds support for the async API for SAM0 SERCOM SPI using
DMA to drive the device. This implementation does the reload
for both transmit and receive in the receive DMA handler.
Doing this simplifies the implementation but means that the
transmit drains completely, resulting in the SPI clock pausing
between buffers while both are reloaded in the receive handler.
Tested with tests/drivers/spi/spi_loopback and several simple
programs monitored with a logic analyzer.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
Initial support for Microchip MEC1501 series is added to the tree.
Additional support for UART is also included. This SoC supports
two operational modes for interrupts (Direct and Aggregated). For
this commit, the direct capable interrupt are configured in direct
mode.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add a Kconfig option to enable DMA for SPI with SOC_NRF52832 as long as
it being disabled due to Product Anomaly Notice (PAN) 58 is explicitly
overridden. This allows the SPIM driver to be enabled for the nRF52832
SoC for situations where PAN 58 is not a problem.
Signed-off-by: Andrew Fernandes <andrew@fernandes.org>
The init routines are the same for SAMD20, SAMD21 and SAMR21, so
move them into common/ to not have three copies of the same code.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
The Atmel SAMD21 (and therefore also the SAMR21) comes with the same
RTC peripheral as the Atmel SAMD20.
Enable it in dts_fixup.h and enable it in the dts for samr21_xpro.
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
Adds Atmel SAMR21 soc which is based on SAMD21, but with a AT86RF233
radio connected internally via SPI.
The AT86RF233 is not yet supprted by Zephyr at this point.
This code is very much copy & paste from atmel_sam0/samd21
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
This commit renames the symbol CPU_HAS_SYSTICK to
CPU_CORTEX_M_HAS_SYSTICK, to look similar to all
other CPU_CORTEX_M_HAS_ options, and moves the
K-config symbol definition from arm/core/Kconfig to
arm/core/cortex_m/Kconfig.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
ARM SysTick timer is implemented by default in ARMv7-M
and Mainline ARMv8-M processors, so we include the
corresponding Kconfig symbol in arch/arm/core/cortex-M/Kconfig
and remove the selections from the Cortex-M SOCs.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
CPU_CORTEX_M does not need to be selected by Kconfig
symbols that already select a CORTEX_M variant.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add USART1 and LPUART1 nodes on stm32wb series.
Only these 2 ones are available for now on this series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add GPIO support to stm32wb series.
Only ABCDE and H ports are available for now on this series.
Accordingly, update series dtsi file.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add support to stm32wb series in stm32 clock_control driver.
Ip is similar to stm32l4 one but AHB bus presacler is renamed
to "CPU1" and CPU2 and AHB4 prescalers should be defined.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the initial SoC support for the STM32MP1 family. The code was
tested on STM32MP157c, but should work on any STM32MP1XX currently
available.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Force soc.h to include the headers generated automatically
by DTS. In addition, force arm_mpu_regions.c to include
misc/slist.h for ARRAY_SIZE() macro. arm_mpu_regions.c
does not need to include soc.h (it is included indirectly
via arm_mpu.h)
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Same deal as in commit 4638652214 ("Kconfig: Use 'default' instead of
'def_bool' in Kconfig.defconfig files"), fixing new stuff that got
introduced since then.
Some symbols, like ALTERA_AVALON_PIO, are only defined in
Kconfig.defconfig files, and so need the def_bool.
Motivation (from the note at the end of
guides/kconfig/index.html#common-shorthands):
For a symbol defined in multiple locations (e.g., in a Kconfig.defconfig
file in Zephyr), it is best to only give the symbol type for the "base"
definition of the symbol, and to use 'default' (instead of 'def_<type>'
value) for the remaining definitions. That way, if the base definition
of the symbol is removed, the symbol ends up without a type, which
generates a warning that points to the other definitions. That makes the
extra definitions easier to discover and remove.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This commit adds CAN support for nucleo F746zg.
Furtermore CAN was added in stm32f7.dtsi and pinmuc_stm32f7.h
CAN_RX: PD0, CAN_TX: PD1
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
Missing quotes are accepted in some places for compatibility with the C
tools, e.g.
source no/quotes/Kconfig
menu Title
It looks broken though. Fix the two places in Zephyr that skip the
quotes. A style warning will be added.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Allows to enable initial RTS/CTS hardware flow control
in the dts.
Co-authored-by: Benoit Leforestier <benoit.leforestier@gmail.com>
Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
The SYSCFG_CFGR1_PA11_PA12_RMP define is present even on packages where
the remap isn't strictly required. This commit makes the remap optional
based on a DT property.
Also fixes syntax error caused by a missing );.
Signed-off-by: Josef Gajdusek <atx@atx.name>
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier. Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.
By default all files without license information are under the default
license of Zephyr, which is Apache version 2.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This reverts commit d4b4b99272 as it
introduced unwanted side effect: It moved the k_busy_wait() to other
clock that the one driving system timer and k_cycle_get_32(). As result,
delays created using these interfaces not matched each other.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Not all i.mx rt socs have the same number of irqs, so move the default
configuration from the soc series level to the individual socs. The
rt1020 hardware reference manual (IMXRT1020RM Rev.1 12/2018) incorrectly
documents 160 irqs (#142-159 reserved), but the soc actually has 142
irqs.
Fixes tests/kernel/gen_isr_table for the mimxrt1020_evk board.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add SYS_POWER_ prefix to HAS_STATE_SLEEP_, HAS_STATE_DEEP_SLEEP_
options to align them with names of power states they control.
Following is a detailed list of string replacements used:
s/HAS_STATE_SLEEP_(\d)/HAS_SYS_POWER_STATE_SLEEP_$1/
s/HAS_STATE_DEEP_SLEEP_(\d)/HAS_SYS_POWER_STATE_DEEP_SLEEP_$1/
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit cleans up names of system power management functions by
assuring that:
- all functions start with 'sys_pm_' prefix
- API functions which should not be exposed to the user start with '_'
- name of the function hints at its purpose
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
There exists SoCs, e.g. STM32L4, where one of the low power modes
reduces CPU frequency and supply voltage but does not stop the CPU. Such
power modes are currently not supported by Zephyr.
To facilitate adding support for such class of power modes in the future
and to ensure the naming convention makes it clear that the currently
supported power modes stop the CPU this commit renames Low Power States
to Slep States and updates the documentation.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Plain 'source' is globbing. 'gsource' is a leftover from an older
design, and works as a synonym for 'source'.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
On STM32F3 devices, a trick was required for normal use of registers.
This was actually an issue in flash registers defintions which should
be defined as volatile.
Fix this and additionaly, fix definition for STM32F1 which was also
lacking the volatile instruction.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The iMX RT1060 and RT1064 have additional dedicated 512KB on-chip ram.
This OCRAM2 is mapped at 0x20200000, formerly OCRAM1 (flexram) mapping
which is moved to 0x20280000 in order to guarentee global OCRAM memory
continuity regardless OCRAM1 size configuration (256KB by default).
In default configuration, this gives 768KB (512+256) on-chip ram:
0x20200000 to 0x202BFFFF.
OCRAM2: 0x20200000 - 0x2027FFFF
OCRAM1(FlexRam): 0x2028FFFF - 0x202BFFFF
Add this memory region as a single node in the rt1060 device tree.
Note: MPU expects power of two memory region, in case of 768KB, let
the MPU configure 1MB instead.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
On stm32f4 series, uart4 is not an usart, so generated with
'st,stm32-usart' compatible and hence generated defined should be
prefixed with DT_ST_STM32_UART_ rather than DT_ST_STM32_USART.
Fixes#14542
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The clang ARM assembler is a bit stricter than GNU as, make a few
changes so things build with both
Signed-off-by: Peter Smith <peter.smith@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Maybe this is some "just in case" thing that got copied around. There's
no need to have a blank line at the beginning or end of Kconfig files.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Redefining the config will not let another (out-of-source) driver be
chosen instead of the default. The driver is practically forced by the
soc settings. This commit moves default settings from soc/arm/nordic_nrf
into the drivers themselves.
Signed-off-by: Thomas Stenersen <thomas.stenersen@nordicsemi.no>
Update reserved function names starting with one underscore, replacing
them as follows:
'_k_' with 'z_'
'_K_' with 'Z_'
'_handler_' with 'z_handl_'
'_Cstart' with 'z_cstart'
'_Swap' with 'z_swap'
This renaming is done on both global and those static function names
in kernel/include and include/. Other static function names in kernel/
are renamed by removing the leading underscore. Other function names
not starting with any prefix listed above are renamed starting with
a 'z_' or 'Z_' prefix.
Function names starting with two or three leading underscores are not
automatcally renamed since these names will collide with the variants
with two or three leading underscores.
Various generator scripts have also been updated as well as perf,
linker and usb files. These are
drivers/serial/uart_handlers.c
include/linker/kobject-text.ld
kernel/include/syscall_handler.h
scripts/gen_kobject_list.py
scripts/gen_syscall_header.py
Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
The Kconfig.defconfig.efr32* files added redundant dependencies on
SOC_EFM32* that are already added in the Kconfig.defconfig.series files
that source them.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Adds a new config HAS_MCUX_FTFX to conditionalize the mcux flash driver
on socs that support it. Selects HAS_MCUX_FTFX on all kinetis socs
except kw40z, because even though this soc has the relevant hardware,
its CMSIS header file is not compatible with the mcux flash driver in
ext/.
This change also prevents enabling the mcux flash driver on lpc and imx
rt boards.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
There are some implicit rules in STM32 family Kconfig.defconfig
fragments organizations.
Add comments to explicit these rules.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
GPIO port H is available on all SoCs of L4 series.
Move Kconfig GPIO_STM32_PORTH symbol deifnition to series Kconfig
fragment Kconfig.defconfig.series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This value always comes from DTS. No Kconfig symbol named
NS16550_REG_SHIFT ever existed.
Might've been missed in commit 603f068690 ("uart/ns16550: Use DT_ prefix
for remaining device configs").
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
nRF52810 Flash and SRAM sizes do not have power-of-two values.
This commit reduces the amount of MPU regions reserved at boot
time to enforce basic permissions in Flash and SRAM memory. It
does this by selecting the next power-of-two size for the Flash
and SRAM regions, respectively. In this way we can cover the
entire Flash and SRAM space each with a single MPU region, thus,
save two MPU regions to be used by the kernel/application.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Some more were added since the cleanup pass in June 2018. See e.g.
commit 2d50da70a1 ("drivers: ipm: Kconfig: Remove redundant 'default n'
properties") for a motivation. It also avoids people wondering whether
or not they need to put in 'default n'.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Previous rename from CONFIG_* to DT_* left a few remaining
CONFIG_*. So rename them manually now.
Fix#13753
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
In the recent MDK brought by nrfx 1.6.2, these legacy peripherals have
been revealed as available also in nRF52810. This patch allows their
use in Zephyr drivers.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The i.MX RT1064 evk has one ethernet (10/100M) connector via KSZ8081RNB
phy. Enable related dts nodes and config flags
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
iMXRT1064 has 4MB on-chip Flash memory (flexspi2) mapped to 0x70000000.
Add it as configurable code location for MIMXRT1064-EVK board.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
CPU_LPS_n name used to indicate a low power state is cryptic and
incorrect. The low power states act on the whole SoC and not exclusively
on the CPU. This patch renames CPU_LPS_n states to LOW_POWER_n. Also
HAS_ pattern for Kconfig options is used in favor of a non standard
_SUPPORTED. Naming of deep sleep states was adjusted accordingly.
Following is a detailed list of string replacements used:
s/SYS_POWER_STATE_CPU_LPS_(\d)_SUPPORTED/HAS_STATE_LOW_POWER_$1/
s/SYS_POWER_STATE_CPU_LPS_(\d)/SYS_POWER_STATE_LOW_POWER_$1/
s/SYS_POWER_STATE_DEEP_SLEEP_(\d)_SUPPORTED/HAS_STATE_DEEP_SLEEP_$1/
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit removes dependency on SYS_POWER_LOW_POWER_STATES_SUPPORTED,
SYS_POWER_DEEP_SLEEP_STATES_SUPPORTED Kconfig options. Power management
SYS_POWER_LOW_POWER_STATES, SYS_POWER_DEEP_SLEEP_STATES options depend
now directly on specific power states supported by the given SoC. This
simplifies maintenance of SoC Kconfig files.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Follow the pattern we have for other peripherals in that if the driver
class (CAN) is enabled than enable the driver for that class
(CAN_STM32). Also have the STM32 CAN driver depend on being on a STM32
SoC.
Remove setting of CONFIG_CAN_STM32 in any .conf files as it will get set
of CONFIG_CAN is set/enabled.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit adds sys_set_power_state() function with support for EM1
Sleep, EM2 Deep Sleep, EM3 Stop power modes on Silabs SoCs.
Tested on efr32_slwstk6061a board.
Note: No support for efm32hg, efm32wg series at this point due to the
missing possibility of placing function code in RAM, required by errata
in SiLabs library code.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
'soc' logger module may be used by any SoC related code located in soc/.
An implementation file requiring logger services should include
LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
to use the 'soc' logger instance.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
We should be selecting CPU_HAS_ARM_MPU at this level and not
CPU_HAS_MPU. Change the cases of CPU_HAS_MPU to CPU_HAS_ARM_MPU.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit removes "select SYS_POWER_*_SUPPORTED" entries from
Kconfig on SoCs which are not implementing sys_set_power_state()
method used to control power mode.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Some of power states used numerical suffix while otthers not.
This commit adds proper suffix to all power state names.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
f
This commit simplifies OS <-> Application interface controlling power
management. In the previous approach application-based PM required
overriding sys_suspend() and sys_resume() functions. As these functions
actually implemented power state change, in such case application
basically had to provide own implementation of all PM-related stuff,
which was not portable and hard to maintain.
This commit changes this scheme: The sys_suspend() and sys_resume()
are now system functions while the application could either use
built-in power management policies or provide its own. All details
of power mode switching are now handled by the OS.
Also, this commit cleans up the Kconfig options related to system-level
power management grouping them under common CONFIG_SYS_PM_ prefix.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
A common driver is shared between stm32 chips, which was not the case
for stm32f3 series. As a consequence stm32f3 was not maintained
equally and was missing features such as flash layout or dts based
configuration.
Besides, drivers had some flows such as wrong bus clock and
missing HSI clock activation which lead to issues on boards not
using HSI as main clock.
As a consequence this commit moves stm32f3 series flash driver to
common stm32 flash drivers.
Fixes#4197
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Refactor the imx rt code/data location config defaults such that we
default to on-chip memories at the soc level and override to external
memories at the board level. This means that we frequently override soc
defaults for evk boards, but it removes the assumption that all imx rt
boards (particularly non-evk boards) will have the same external
memories as evk boards.
The end result is that imx rt evk boards still have the same defaults as
before, but the way we get there is different.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The imx rt dts fixup was missing gpio 2,3,4 instances. This caused a
build error in the gpio driver when an application enabled:
CONFIG_GPIO_MCUX_IGPIO_2=y
CONFIG_GPIO_MCUX_IGPIO_3=y
CONFIG_GPIO_MCUX_IGPIO_4=y
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The imx rt family of socs has several options for linking code and data
into internal or external memories, and up until now we have handled
these options at the board level. This has resulted in several Kconfig
symbols being defined in multiple places and triggering warnings in
documentation builds:
warning: the default selection CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) of <choice> (defined at boards/arm/mimxrt1050_evk/Kconfig:9) is not contained in the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice
The number of warnings increased as we added more imx rt boards. Fix the
warnings by moving code and data location configs from the board level
to the soc level.
The default memories for all imx rt boards are unchanged. The
mimxrt10{20,50,60}_evk boards still default to hyperflash/qspi for code
and sdram for data. The mimxrt1064_evk board still defaults to ITCM for
code and DTCM for data because jlink does not yet support programming
internal flash.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
soc.h references Kconfig symbols which aren't defined. Define the
specific SoC versions that are referenced in soc.h
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In soc.h reference to CONFIG_SOC_PART_NUMBER_SAM4S18B should have been
CONFIG_SOC_PART_NUMBER_SAM4S8.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit changes the names of SYS_POWER_DEEP_SLEEP* Kconfig
options in order to match SYS_POWER_LOW_POWER_STATE* naming
scheme.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The SYS_POWER_LOW_POWER_STATE_SUPPORTED and SYS_POWER_LOW_POWER_STATE
suggests one low power state but these options control multiple
low power state. This commit uses plural in the names to indicate
that.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Initial support for Microchip MEC1701 series is incorporated to the
tree. Additional support for UART is also included. This SOC supports
two operation modes for interrupts (Direct and Aggregated). For this
commit, the interrupts are configured in direct mode.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
The eth mcux driver has been using non DT_ prefixed defines for DT
generated defines. Switch to use DT_ prefixed ones as we want to
deprecated the non DT_ prefixed defines.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The soc nxp_imx RDC code has been using non DT_ prefixed defines for DT
generated defines. Switch to use DT_ prefixed ones as we want to
deprecated the non DT_ prefixed defines.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Select CPU_HAS_FPU_DOUBLE_PRECISION in SAM E70 and NXP I.MX RT
series of MCUs to signify double-precision floating-point unit.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
SoC family STM32F769XI supports both double and single precision
floating-point unit. This commit enables double-precision by
default in this SoC.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit introduces a Kconfig option for ARM SoCs, to signify
that the SoC implements a double-precision floating point unit.
The option is utilized in cmake/fpu-for-gcc-m-cpu to select the
appropriate GCC compile option flag for FPU.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This patch adds basic support for the PWM devices available on the Atmel
SAM family. Beside enabling the driver, everything is selected through
the device tree, including enabling the PWM0 and PWM1 devices. Thus
CONFIG_PWM_0 and CONFIG_PWM_1 are ignored.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Provides a STM32 RTC driver using new counter API.
Driver does not support wrap related functions (set, get, ..)
Fixes#11373
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The CMSDK Timer can be used as a timer or as a counter.
The unified interface proposed in #8340 unifies counter.h and rtc.h to
provide a common interface.
This patch modifies the timer implementation of the single timer to
make it compliant with the new proposed interface.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add EPIT (Enhanced Periodic Interrupt Timer) peripheral support
for i.MX6SoloX soc.
Origin: Original
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Removing duplicates in selects for config SOC_NRF52832 and
SOC_NRF52840. Duplicates were unexpected merge artifacts.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Enables the mcux elcdif shim driver and clocks on imx rt socs when the
display driver interface is enabled.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
In case of !XIP, set defaults for CONFIG_FLASH_SIZE and
CONFIG_FLASH_BASE_ADDRESS in Kconfig.
Fixes: #13113
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Now that the SAM Ethernet driver can work when the cached is enabled, it
is possible to unconditionally enable the data cache on the SAM E70 SoC.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Each platform is now specifying list of supported power states
as a Kconfig options. Some of the specified states could be
disabled in runtime. As result there is no need for the removed
interface.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Currently each SoC has to define own list of power states.
However all these definitions have to be the same, as common power
management code uses them.
This commit replaces per-soc power state list by global definition.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit ports power management code from nRF52 to the nRF51 SoC,
enabling usage of Zephyr Power Management policies on this platform.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
This commit updates the power management code for nRF52 SoC
series after recent changes in Zephyr power management subsystem.
Changes:
- Removed LPS modes, as they are not supported by HW.
(previous implemntation used CONSTLAT and LOWPWR settings
in NRF_POWER to implement low power modes, however these
knobs should be used only when application needs ultra low
CPU wake-up time).
- Reworked code in order to allow adding custom power levels
on the application level and provide better integration
with power management subsystem.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
exti driver implementation does not fit all SoCs because
some EXTI ip does not match stm32_exti register map provided.
Instead of providing exti register map for all SoCs, use LL API
which abstracts IP variations and enable uniform use of the drivers
on all STM32SoCs.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Now that a hw-flow-control DTS binding has been added for MCUX uart,
let's check for the DT_ define and enable support in the MCUX HAL
layer.
Signed-off-by: Michael Scott <mike@foundries.io>
Add sam0_rtc_driver that implements system timer API on top of the RTC
and can be used as a replacement for the default systick timer.
Signed-off-by: Martin Benda <martin.benda@omsquare.com>
Adds a new config HAS_MCUX_ENET to constrain which socs can enable the
mcux ethernet driver. This will prevent users from enabling the driver
on socs like kl25z or kw41z which do not have ethernet mac hardware.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
In soc.h of nRF9160 SoC we need to explicitly include
nrfx_config_nrf9160.h to have the standard peripheral
base address macro mappings in Zephyr builds for nRF9160
SoC. (We need to do this spefically for nRF9160, as those
macros are not present in the nRF9160 MDK header).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
