Commit graph

314 commits

Author SHA1 Message Date
Stephanos Ioannidis 88d79a49d2 soc: arm: st_stm32: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Ulf Magnusson 4e85006ba4 dts: Rename generated_dts_board*.{h,conf} to devicetree*.{h,conf}
generated_dts_board.h is pretty redundant and confusing as a name. Call
it devicetree.h instead.

dts.h would be another option, but DTS stands for "devicetree source"
and is the source code format, so it's a bit confusing too.

The replacement was done by grepping for 'generated_dts_board' and
'GENERATED_DTS_BOARD'.

Two build diagram and input-output SVG files were updated as well, along
with misc. documentation.

hal_ti, mcuboot, and ci-tools updates are included too, in the west.yml
update.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-17 17:57:59 +01:00
Roland Ma b0bdf91e11 boards: arm: Add board definition for stm32 nucleo_f767zi
Added board definition additions for stm32 nucleo_f767zi
board.

Signed-off-by: Roland Ma <rolandma@yahoo.com>
2020-01-16 22:51:13 +01:00
Roland Ma 01049b73be dts: arm: st: Add dts and soc additions for stm32 F767ZI board
Added dts additions for stm32 nucleo f767zi board, also added
and modified soc addtions for thet board.
Updated dts reference file name.
Updated yaml to take out adc for now.

Signed-off-by: Roland Ma <rolandma@yahoo.com>
2020-01-16 22:51:13 +01:00
Jack Rosenthal 53ed9e57a2 soc: stm32f0: Add support for STM32F098xx SOC
This adds a Kconfig options and device tree configs for the STM32F098
series of SoC.

Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
2019-12-20 20:27:20 -05:00
Carlo Caione aec9a8c4be arch: arm: Move ARM code to AArch32 sub-directory
Before introducing the code for ARM64 (AArch64) we need to relocate the
current ARM code to a new AArch32 sub-directory. For now we can assume
that no code is shared between ARM and ARM64.

There are no functional changes. The code is moved to the new location
and the file paths are fixed to reflect this change.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-12-20 11:40:59 -05:00
Filip Brozovic e541e63653 soc: arm: stm32g0: add STM32G031 SoC series
This commit adds support for the STM32G031xx SoCs
by STMicroelectronics.

Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2019-12-18 22:06:39 +01:00
Filip Brozovic 5756c00017 soc: arm: stm32g0: add hw flow control property for usart1 to dts fixup
This commit adds the missing USART1 HW_FLOW_CONTROL property to the
stm32g0 DTS fixup file.

Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2019-12-18 22:06:39 +01:00
Filip Brozovic fc2dfae64f drivers: i2c: add STM32G0X I2C support
Add I2C driver support for STM32G0X SoC series.

Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2019-12-18 22:06:27 +01:00
Erwan Gouriou af7e093ae6 soc: stm32f446 : update default gpio configuration
Fix GPIO default configuration for F446.
Default config for GPIO should be `y`.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-12-18 07:36:13 -06:00
Sahaj Sarup d072ab83ac arm: 96b_stm32_sensor_mez: spi: Enable SPI4
This patch enables SPI4 on the 96Boards STM32 Sensors Mezzanine.
SPI4 has been broken out to a Grove Connector on the board.

Changes:

- Updated board dts to enable spi4
- Updated board Kconfig
- Updated board documentation
- Update board pinmux
- Updated stm32f4 pinmux header file
- Updated stm32f401 dtsi
- Updated stm32f4 defconfig to enable PORTE GPIO
- Added board to spi_loopback test

Test: spi_loopback test passed

Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
2019-12-18 07:34:37 -06:00
Erwan Gouriou 3a95dda66c drivers/eeprom: stm32: Enables only for L1 series
Setting EEPROM_STM32 with `default y` under `if SOC_FAMILY_STM32`
overrides `depends on SOC_SERIES_STM32L1X` in EEPROM_STM32
definition.
Then, if ever EEPROM is set in any file (as in
tests/drivers/build_all`), EEPROM_STM32 will be indeed set,
with potential issues on series where driver is not yet correctly
handled.

Fix this by removing EEPROM_STM32 definition in STM32 generic
file and set `default y` along with the `depends on` to keep
it effective.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-12-15 10:19:25 -05:00
Kwon Tae-young 69924b19c8 drivers: eeprom: add driver support for EEPROM of STM32L1
Could not find a supported LL with EEPROM.
So I used HAL.

Tested with: 96b_wistrio

Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
2019-12-12 07:57:33 -06:00
Feng Cheng ee57c8e749 drivers: flash: Add the flash driver of the stm32f1x family
Most of the code is copied from the stm32f0x family
Tested on stm32f103ze soc

Signed-off-by: Feng Cheng <i@fengch.me>
2019-12-11 12:40:33 -06:00
Ulf Magnusson 984bfae831 global: Remove leading/trailing blank lines in files
Remove leading/trailing blank lines in .c, .h, .py, .rst, .yml, and
.yaml files.

Will avoid failures with the new CI test in
https://github.com/zephyrproject-rtos/ci-tools/pull/112, though it only
checks changed files.

Move the 'target-notes' target in boards/xtensa/odroid_go/doc/index.rst
to get rid of the trailing blank line there. It was probably misplaced.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-11 19:17:27 +01:00
Ioannis Glaropoulos 16d8a492c6 soc: arm: stm32: remove custom fixed MPU region definition
We remove the custom fixed MPU region definition from ST
STM32 SoC definitions, as the common fixed MPU
region definition is now used.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-12-09 11:51:14 -05:00
Ulf Magnusson d0a6f682d1 kconfig: Fix up newly-introduced copy-pasted headers
Same deal as in https://github.com/zephyrproject-rtos/zephyr/pull/20280,
for newly-introduced stuff.

Will avoid failures with the new CI test in
https://github.com/zephyrproject-rtos/ci-tools/pull/112, though it only
checks changed files.

Also fix some un-indented properties on choices. Choice properties work
the same as symbol properties syntactically.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-19 15:25:08 -05:00
Francois Ramu 91884302bf soc: arm: st_stm32: add driver lptimer management to stm32wb series
This patch introduces the support of the Low Power Timer
     for the STM32WBxx from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-11-13 10:31:06 -06:00
Alexander Wachter c180e059bf soc: stm32f103Xb: Enable CAN support for this SoC
This commit enables CAN on the STM32F103Xb SoC series.

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-11-13 10:30:19 -06:00
Francois Ramu d0c9234d70 soc: arm: st_stm32: add driver lptimer management to stm32l4 series
This patch introduces the support of the Low Power Timer
     for the STM32L4xx from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-11-08 10:04:21 -06:00
Francois Ramu 0ae7023405 driver: timer: st_stm32: add lptimer management to stm32xx series
This patch introduces the support of the LowPower Timer
 for the STM32xx from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-11-08 10:04:21 -06:00
Stephanos Ioannidis 2d7460482d headers: Refactor kernel and arch headers.
This commit refactors kernel and arch headers to establish a boundary
between private and public interface headers.

The refactoring strategy used in this commit is detailed in the issue

This commit introduces the following major changes:

1. Establish a clear boundary between private and public headers by
  removing "kernel/include" and "arch/*/include" from the global
  include paths. Ideally, only kernel/ and arch/*/ source files should
  reference the headers in these directories. If these headers must be
  used by a component, these include paths shall be manually added to
  the CMakeLists.txt file of the component. This is intended to
  discourage applications from including private kernel and arch
  headers either knowingly and unknowingly.

  - kernel/include/ (PRIVATE)
    This directory contains the private headers that provide private
   kernel definitions which should not be visible outside the kernel
   and arch source code. All public kernel definitions must be added
   to an appropriate header located under include/.

  - arch/*/include/ (PRIVATE)
    This directory contains the private headers that provide private
   architecture-specific definitions which should not be visible
   outside the arch and kernel source code. All public architecture-
   specific definitions must be added to an appropriate header located
   under include/arch/*/.

  - include/ AND include/sys/ (PUBLIC)
    This directory contains the public headers that provide public
   kernel definitions which can be referenced by both kernel and
   application code.

  - include/arch/*/ (PUBLIC)
    This directory contains the public headers that provide public
   architecture-specific definitions which can be referenced by both
   kernel and application code.

2. Split arch_interface.h into "kernel-to-arch interface" and "public
  arch interface" divisions.

  - kernel/include/kernel_arch_interface.h
    * provides private "kernel-to-arch interface" definition.
    * includes arch/*/include/kernel_arch_func.h to ensure that the
     interface function implementations are always available.
    * includes sys/arch_interface.h so that public arch interface
     definitions are automatically included when including this file.

  - arch/*/include/kernel_arch_func.h
    * provides architecture-specific "kernel-to-arch interface"
     implementation.
    * only the functions that will be used in kernel and arch source
     files are defined here.

  - include/sys/arch_interface.h
    * provides "public arch interface" definition.
    * includes include/arch/arch_inlines.h to ensure that the
     architecture-specific public inline interface function
     implementations are always available.

  - include/arch/arch_inlines.h
    * includes architecture-specific arch_inlines.h in
     include/arch/*/arch_inline.h.

  - include/arch/*/arch_inline.h
    * provides architecture-specific "public arch interface" inline
     function implementation.
    * supersedes include/sys/arch_inline.h.

3. Refactor kernel and the existing architecture implementations.

  - Remove circular dependency of kernel and arch headers. The
   following general rules should be observed:

    * Never include any private headers from public headers
    * Never include kernel_internal.h in kernel_arch_data.h
    * Always include kernel_arch_data.h from kernel_arch_func.h
    * Never include kernel.h from kernel_struct.h either directly or
     indirectly. Only add the kernel structures that must be referenced
     from public arch headers in this file.

  - Relocate syscall_handler.h to include/ so it can be used in the
   public code. This is necessary because many user-mode public codes
   reference the functions defined in this header.

  - Relocate kernel_arch_thread.h to include/arch/*/thread.h. This is
   necessary to provide architecture-specific thread definition for
   'struct k_thread' in kernel.h.

  - Remove any private header dependencies from public headers using
   the following methods:

    * If dependency is not required, simply omit
    * If dependency is required,
      - Relocate a portion of the required dependencies from the
       private header to an appropriate public header OR
      - Relocate the required private header to make it public.

This commit supersedes #20047, addresses #19666, and fixes #3056.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2019-11-06 16:07:32 -08:00
Song Qiang 749d2d21bf drivers: dma: add generic driver support for some series of stm32
This commit adds driver support for DMA on f0/f1/f2/f3/f4/l0/l4
series stm32.

Notice due to some bugs, this is currently not working with f7.

There are two kinds of IP blocks are used across these stm32, one is the
one that has been used on F2/F4/F7 series, and the other one is the one
that has been used on F0/F1/F3/L0/L4 series.

Memory to memory transfer is only supported on the second DMA on
F2/F4 with 'st,mem2mem' to be declared in dts.

This driver depends on k_malloc to allocate memory for stream instances,
so CONFIG_HEAP_MEM_POOL_SIZE must be big enough to hold them.

Common parts of the driver are in dma_stm32.c and SoC related parts are
implemented in dma_stm32_v*.c.

This driver has been tested on multiple nucleo boards, including
NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/L073RZ/L476RG with the
loop_transfer and chan_blen_transfer test cases.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-11-06 14:14:39 +01:00
Song Qiang f0d3ee52fb drivers: i2s: change the stm32 DMA in the driver to use dts
This commit moves DMA parameters previously hard coded in the driver
to the dts.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-11-06 14:14:39 +01:00
Kumar Gala 47fbf5bb4e soc: stm32: Convert CCM config from DT Kconfig symbol to function
Introduce a Kconfig symbol that utilizes a dt function to determine if
we have STM32 CCM functionality being utilized.  This removes the
dependance on parsing symbols from generated_dts_board.conf.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-11-05 12:04:33 +01:00
Ulf Magnusson 1f38ea77ba kconfig: Clean up 'config FOO' (two spaces) definitions
Must've been copy-pasted around.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-04 17:31:27 -05:00
Ulf Magnusson bd6e04411e kconfig: Clean up header comments and make them consistent
Use this short header style in all Kconfig files:

    # <description>

    # <copyright>
    # <license>

    ...

Also change all <description>s from

    # Kconfig[.extension] - Foo-related options

to just

    # Foo-related options

It's clear enough that it's about Kconfig.

The <description> cleanup was done with this command, along with some
manual cleanup (big letter at the start, etc.)

    git ls-files '*Kconfig*' | \
        xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /'

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-04 17:31:27 -05:00
Ulf Magnusson 975de21858 kconfig: Global whitespace/consistency cleanup
Clean up space errors and use a consistent style throughout the Kconfig
files. This makes reading the Kconfig files more distraction-free, helps
with grepping, and encourages the same style getting copied around
everywhere (meaning another pass hopefully won't be needed).

Go for the most common style:

 - Indent properties with a single tab, including for choices.

   Properties on choices work exactly the same syntactically as
   properties on symbols, so not sure how the no-indentation thing
   happened.

 - Indent help texts with a tab followed by two spaces

 - Put a space between 'config' and the symbol name, not a tab. This
   also helps when grepping for definitions.

 - Do '# A comment' instead of '#A comment'

I tweaked Kconfiglib a bit to find most of the stuff.

Some help texts were reflowed to 79 columns with 'gq' in Vim as well,
though not all, because I was afraid I'd accidentally mess up
formatting.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-01 15:53:23 +01:00
Jan Van Winkel 9555f82d28 libc: Use select REQUIRES_FULL_LIBC instead of select NEWLIB_LIBC
Changed select NEWLIB_LIBC to select REQUIRES_FULL_LIBC

Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2019-11-01 14:18:36 +01:00
David B. Kinder 241044f178 doc: fix misspellings in Kconfig files
Fix misspellings in Kconfig files missed during regular reviews.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-10-30 10:24:30 +01:00
Ulf Magnusson a02c333963 arm/riscv: kconfig: Remove type from NUM_IRQS in defconfig files
Add a common definition for NUM_IRQS in arch/arm/core/Kconfig and
arch/riscv/Kconfig. That way, the type doesn't have to be given for
NUM_IRQS in all the Kconfig.defconfig files.

Trying to get rid of unnecessary "full" symbol definitions in
Kconfig.defconfig files, to make the organization clearer. It can also
help with finding unused symbols.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-10-28 08:27:28 -05:00
Ulf Magnusson 2b61031c8f kconfig: Remove symbol types from Kconfig.defconfig files
Same deal as in commit 7fdb525754 ("kconfig: Use 'default' instead of
'def_bool' in Kconfig.defconfig files"), but I hacked Kconfiglib to also
find cases where the type is given separately as e.g.

    config FOO
            int
            default 3

Motivation (from a note in
https://docs.zephyrproject.org/latest/guides/kconfig/index.html):

    For a symbol defined in multiple locations (e.g., in a
    Kconfig.defconfig file in Zephyr), it is best to only give the
    symbol type for the "base" definition of the symbol, and to use
    'default' (instead of 'def_<type>' value) for the remaining
    definitions. That way, if the base definition of the symbol is
    removed, the symbol ends up without a type, which generates a
    warning that points to the other definitions. That makes the extra
    definitions easier to discover and remove.

It's also nice if 'def_bool' and the like turn into a semi-reliable flag
that the symbol is only defined in Kconfig.defconfig files. That might
be a sign that things could be cleaned up.

Will do a separate pass later to remove some symbols only defined in
Kconfig.defconfig files.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-10-24 12:40:22 -05:00
Kumar Gala 9784f800a6 i2c: Rename CONFIG_I2C_[0..5]_NAME -> DT_I2C_[0..5]_NAME
Now that everything is DT based for I2C drivers we can rename the
CONFIG_I2C_[0..5]_NAME define to DT_I2C_[0..5]_NAME.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-10-23 11:31:32 -05:00
Manivannan Sadhasivam bf949409b8 soc: arm: stm32: Add support for STM32L151XB-A SoC
STM32L151XB-A SoC is almost similar to the STM32L151XB SoC except that
it has more RAM (32KiB). Hence add devicetree and Kconfig support.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-10-18 10:40:45 -05:00
Manivannan Sadhasivam 4f79e31566 soc: arm: st_stm32: stm32l1: Add RTC/Counter support
Add RTC/Counter support for STM32L1 SoCs.

Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2019-10-18 10:40:45 -05:00
Ioannis Glaropoulos 761bb8b1f3 soc: arm: stm32g071: remove kernel header inclusions in soc.h
Remove the inclusion of kernel_includes.h from soc.h and replace
it with including the board-specific auto-generated headers. This
aligns the soc.h header with the current policy not to include
kernel headers in soc.h.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-10-18 08:46:03 -05:00
Ioannis Glaropoulos 0f7fe2406c boards: arm: nucleo_g071rb: enable ARM MPU
We enable Memory Protection on stm32 nucleo_g071rb board,
since the respective SoC series implements the ARM MPU.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-10-18 08:46:03 -05:00
Pavlo Hamov 248bd50db5 soc: stm32wb55: allow non 812k flash size
stm32wb55 cold be: 1m, 512k, 256k

Signed-off-by: Pavlo Hamov <pavlo_hamov@jabil.com>
2019-10-17 14:02:08 -05:00
Ulf Magnusson ac9fe11f2f Kconfig: Remove copy-pasted comments on some promptless symbols
Remove the

    # Omit prompt to signify a "hidden" option

comments that appear on some symbols. They seem to have been copy-pasted
at random, as there are lots of promptless symbols that don't have them
(that's confusing in itself, because it might give the idea that the
ones with comments are special in some way).

I suspect those comments wouldn't have helped me much if I didn't know
Kconfig either. There's a lot more Kconfig documentation now too, e.g.
https://docs.zephyrproject.org/latest/guides/kconfig/index.html.

Keep some comments that give more information than the symbol having no
prompt.

Also do some minor drive-by cleanup.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-10-17 13:05:24 -05:00
Karl Palsson 1a45eb67d1 dts: stm32/l1: add xx8-A parts
The -A parts have more flash and ram than the original part numbers.

Signed-off-by: Karl Palsson <karlp@etactica.com>
2019-10-16 14:42:54 -05:00
Karl Palsson d46c1a0c98 stm32/l1: enable spi peripherals
STM32L1 uses the same spi controller as STM32F1 so we can just set the
right addresses and enable them. We also need to add the fixup names and
to correctly include the header for ST LL HAL.

Signed-off-by: Karl Palsson <karlp@etactica.com>
2019-10-16 14:42:54 -05:00
Erwan Gouriou 5881f118c0 soc: stm32: Enable cortex-m systick timer by default
Move systick activation in soc/ as a Kconfig.defconfig file and
remove activation in boards _defconfig files.
This will allow to deactivate it in a more flexible way
with upcoming LPTIMER as tick source when power management
features are enabled.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-10-11 14:55:48 -07:00
Erwan Gouriou fe303c42cc soc: stm32: replace use of Kconfig I2C by I2C_STM32
For LL header inclusion, use _STM32 Kconfig symbol
(related to the driver), rather than generic symbol,
that could theoretically use an alternate solution.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-10-10 10:54:44 -05:00
Erwan Gouriou 88b71bdf6c soc: stm32: Move clock_control Kconfig selection to common
Factorize this setting rather than doing it in multiple
places.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-10-10 10:54:44 -05:00
Antony Pavlov 70a14435b0 arm: stm32f0: introduce STM32F030X4 stuff
The patch adds initial support for STM32F030X4 SoC.

STM32F0 Cube package advises to use 'stm32f030x6' code
for both STM32F030x4 and STM32F030x6 SoC variants.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2019-10-08 16:31:48 -05:00
NavinSankar Velliangiri bcf6d52dd1 dtsi/Kconfig: arm: st: Add dtsi and Kconfig for SOC variant STM32F401XC
This PR adds the dtsi and Kconfig for the SOC variant STM32F401XC.

Signed-off-by: NavinSankar Velliangiri <navin@linumiz.com>
2019-10-07 08:57:36 -05:00
Erwan Gouriou e3c1683e8b drivers: watchdog: Add STM32G4x Watchdog support
Add watchdog driver support for STM32G4X SoC series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh 37514ae660 drivers: usb: Add STM32G4X USB support
Add USB driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh 3e5187b458 drivers: entropy: Add STM32G4X RNG support
Add RNG driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh c678d4508d drivers: counter: Add STM32G4X counter support
Add counter driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Erwan Gouriou 0ecef25d5e drivers: pwm: Add STM32G4X PWM Support
Add PWM driver support for STM32G4X SoC series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh af4678f885 drivers: adc: Add STM32G4X ADC support
Add ADC driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh 794606f866 drivers: spi: Add STM32G4X SPI support
Add SPI driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh 4ce35300c8 drivers: i2c: Add STM32G4X I2C support
Add I2C driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh c68e027c28 drivers: flash: Add STM32G4X flash support
Add flash driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh 1d2a030ee3 drivers: serial: Add STM32G4X serial support
Add UART driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh 6a499f46ab drivers: interrupt_controller: Add STM32G4X exti support
Add EXTI driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh f7bad922f0 drivers: gpio: Add STM32G4X gpio support
Add GPIO driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh ca7cbb5a08 drivers: clock_control: Add STM32G4X clock support
Add clock support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh b87878d09c soc: arm: st_stm32: Add STM32G4 SoC series
Add soc and dts files to support for most of the common peripherals
in the STM32G4 series. Add specific support for the STM32G431RB.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Ioannis Glaropoulos affddef4cf soc: arm: do not include kernel headers in soc.h
We shall not include core kernel headers in soc.h
header of ARM SoCs. We should try to only include
the vendor headers and auto-generated board header
from DTS. This commit implements this policy for
the SoCs, whose builds have shown to fail due to
header inclusion cycles.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-09-24 21:53:49 -04:00
Erwin Rol 36df90816b dts: arm: stm32: cleanup whitespace in dts_fixup headers
Try to format the dts_fixup header files as uniformly as possible.

Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2019-09-20 09:50:34 +02:00
Armando Visconti 79c24e3e5e soc: arm: st: add stm32l4r9xx support
Add support for ST stm32l4r9xx System-on-Chip.

See http://www.st.com/en/microcontrollers/stm32l4r9-s9.html
for more details.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2019-09-19 09:47:45 -05:00
Erwin Rol efa44b1885 arm: stm32f4: Add CAN1 support
Add CAN1 pinmux definitions and DT entries for STM32F4 series.

Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2019-09-19 08:52:53 -05:00
Kumar Gala 29e55d74e8 rtc: Remove old rtc functionality
Remove the old rtc functionality as its been deprecated for 2 releases
now.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-14 07:33:38 -05:00
Robert Weber 17f545be7d soc: stm32wb: Add support for STM32 IWDG
The driver for STM32's independent watchdog already exists and is
compatible with the stm32wb SoC. Enable the independent watchdog
for the stm32wb series for use with this driver.

Signed-off-by: Robert Weber <robertweber95@gmail.com>
2019-09-12 13:21:06 -05:00
Ioannis Konstantelias 414e4d30a0 drivers: watchdog: stm32: Add implementation for WWDG
Added drivers for System Window Watchdog of STM32 platform.

Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
2019-09-11 22:13:36 -05:00
Ioannis Konstantelias f9152adc81 soc: stm32: Add fixups for WWDG EWI and clock info
Extended the WWDG fixups to support early wake interrupt handling and
clock information.

Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
2019-09-11 22:13:36 -05:00
Markus Fuchs 750a30296f soc: stm32: add SWO logger backend support
This patch adds HAS_SWO selections to all STM32 SoCs supporting Serial
Wire Output via the Trace Port Interface Unit (TPIU).

Signed-off-by: Markus Fuchs <markus.fuchs@de.sauter-bc.com>
2019-09-08 12:43:09 +02:00
Ioannis Glaropoulos 78e023cdd5 soc: arm: stm32: fix sign of timeout variable
'timeout' needs to be a signed variable, so that the
check for less-than-zero is able to result to true (if
the timeout actually expires). Addresses the coverity
issue [Coverity CID :203493] reported in #18379.

Fixes #18379.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-08-19 15:12:44 +02:00
Markus Fuchs edb58ec46b soc: arm: st_stm32: add STM32F437XI
This patch adds support for the STM32F437XI SoC.

Signed-off-by: Markus Fuchs <markus.fuchs@de.sauter-bc.com>
2019-08-05 19:57:45 -04:00
Yaël Boutreux e0d6534f09 drivers: spi: spi_ll_stm32: Add support for STM32MP1x SoC
Add SPI driver support for STM32MP1x SoC.

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-05 13:52:34 -05:00
Yaël Boutreux 3a967f92c3 soc: arm: st_stm32: stm32mp1: Add SPI support
Add SPI support for STM32MP1x SoC.

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-05 13:52:34 -05:00
Findlay Feng 3bc7d9e50e drivers: spi: Fix spi related files of stm32f1x
pinmux: Add the relevant definition of the spi3 pin
dts: Fix a bug, spi3 does not have a label
soc: Supplement spi3 related definition

Signed-off-by: Findlay Feng <i@fengch.me>
2019-07-31 14:26:50 -05:00
Christophe Priouzeau 83fb969cfb soc: stm32mp157: add I2c support
Add I2C support and I2C5 configuration for arduino connector.

Signed-off-by: Christophe Priouzeau <christophe.priouzeau@linaro.org>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@linaro.org>
2019-07-31 05:59:16 -04:00
Rick Conrey 837f07a301 drivers: adc: enable ADC on STM32WB
Enable ADC on STM32WB

Signed-off-by: Rick Conrey <rick.conrey@witiproducts.com>
2019-07-31 05:38:25 -04:00
Rick Conrey 4aa21750de soc: stm32wb: Enable PWM on STM32WB
enable PWM on STM32WB

Signed-off-by: Rick Conrey <rick.conrey@witiproducts.com>
2019-07-26 11:27:15 -04:00
Arnaud Pouliquen d9add0a65a ipm: Add support for stm31mp1 Soc
Add the mailbox support for stm32mp15 SoC relied on IPCC peripheral.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-07-26 14:38:43 +02:00
Rick Conrey 9d371d835d soc: stm32wb: Enable SPI on stm32wb
enable spi on stm32wb

Signed-off-by: Rick Conrey <rick.conrey@witiproducts.com>
2019-07-25 10:49:58 -04:00
Francois Ramu 474c99c9ef drivers: usb/stm32: use dts information to populate clock settings
This patch populates "clocks" property in stm32 usb nodes
for clock related usb configuration code of each  dtsi files

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-07-16 09:08:51 -04:00
Rick Conrey ad2601aca0 soc: stm32wb: enable counter on STM32WB
Enable RTC on STM32WB

Signed-off-by: Rick Conrey <rick.conrey@witiproducts.com>
2019-07-11 13:10:15 -05:00
Francois Ramu 26c38a49a2 soc: arm: uart: Add STM32G0X UART support
Add UART support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-07-05 10:35:55 -05:00
Francois Ramu f9d2a41612 drivers: interrupt_controller: Add STM32G0X interrupt support
Add interrupt support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>

# Conflicts:
#	drivers/interrupt_controller/exti_stm32.c
2019-07-05 10:35:55 -05:00
Francois Ramu dd3ee06af7 drivers: gpio: Add STM32G0X pinmux support
Add gpio support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>

# Conflicts:
#	drivers/gpio/gpio_stm32.h
2019-07-05 10:35:55 -05:00
Francois Ramu da48451a01 drivers: pwm: Add STM32G0XX pwm support
Add pwm support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com
Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-07-05 10:35:55 -05:00
Francois Ramu bfc2ea6dd5 drivers: flash: Add STM32G0XX flash support
Add flash support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com
Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-07-05 10:35:55 -05:00
Francois Ramu 7ea00134f5 soc: arm: st_stm32: Add STM32G071 SoC series
This patch adds support for the STM32G071xx
 from STMicroelectronics.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-07-05 10:35:55 -05:00
Erwan Gouriou 0914f1031d drivers/gpio: stm32: Add semaphore on gpio_configure
Protect gpio_configure function in dual core context.
This operation is not needed for other fuctions of the api:
* init
* read
* write

Protecting gpio_configure also protects access to
interrupt_controller IP.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
Erwan Gouriou 141b6500c9 soc: stm32h7: Add support for Cortex-M4 core
Add support for C-M4 core on STM32H7 series.
It is enabled in Dual core context with 2 alternatives boot methods:
* Boot CM4 CM7: Both core boot at reset, then CM4 enters Stop mode.
CM7 performs system configuration then finally wakes up CM4
* Boot CM7, CM4 Gated: Only CM7 boots at reset. Once done with
system configuration it triggers (requires option byte update)

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
Erwan Gouriou fda2ea7253 drivers/serial: stm32: Add support for STM32H7 series
Add needful to enable uart on STM32H7.
This mostly impact dts but as well soc for fixup.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
Erwan Gouriou d185ec4cff drivers/gpio: Add support on STM32H7 series
Add GPIO support on STM32H7.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
Erwan Gouriou 80278f7a48 drivers/interrupt_controller: stm32: Add support for stm32h7
Add bare minimum to enable EXTI on STM32H7,
in single core configuration.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
Erwan Gouriou 2805ea9193 drivers/clock_control: STM32H7 support
Provide basic clock control driver for STM32H7.
Bus clock activation is done through CM7 and CM4 common registers
so we don't have to care to the CPU Id before accessing.
Accesses are not protected for now. Only possible configuration
is system clock source set to HSE driven PLL.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
Erwan Gouriou ef35fbcf42 soc/arm: Provide basic support for STM32H7 series
Enable basic support to STM32H7, in single core configuration (M7).

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
Erwan Gouriou f5b375062c soc: stm32f7: Fix fixup file for uart devices
UART related defines in STM32F7 files where filled with
references to USART.
Instances 4, 5, 7 and 8 of SoC serial port are actually UARTs.
So rename define's accordingly. Otherwise it couldn't build.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-02 20:27:22 -04:00
Henrik Brix Andersen dded1d076a dts: can: allow individual specification of prop seg and phase seg1 quanta
Allow individual specification of the time quanta used for the CAN bus
propagation segment and phase segment 1.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-06-24 14:33:46 -05:00
Erwan Gouriou 9f857c3ba8 soc: stm32f3: Delete obsolete FLASH_PAGE_SIZE Kconfig symbol
Definition of obsolete FLASH_PAGE_SIZE Kconfig symbol was
remaining in STM32F3 soc files.
Clean these.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-06-24 07:23:11 -04:00
Erwan Gouriou e6a4839c61 soc: stm32: STM32F7: Remove useless package digit
Fixes #16733, applied to STM32F7 series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-06-18 08:03:40 -04:00
Erwan Gouriou a54de3176d soc: stm32: STM32F4: Remove useless package digit
Fixes #16733, applied to STM32F4 series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-06-18 08:03:40 -04:00
Erwan Gouriou 1a514a453b soc: stm32: STM32F2: Remove useless package digit
Fixes #16733, applied to STM32F2 series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-06-18 08:03:40 -04:00
Ioannis Konstantelias 08b08151b3 soc: stm32: Remove package digit for STM32L496XG
Letter G is no longer needed as described in issue #16733.

Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
2019-06-17 16:35:12 -04:00
Erwan Gouriou b20f288a2b soc: stm32: STM32WB: Remove useless package digit
Fixes #16733, applied to STM32WB series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-06-17 16:14:45 -04:00
Erwan Gouriou dbad99ec92 soc: stm32: STM32L4: Remove useless package digit
Fixes #16733, applied to STM32L4 series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-06-17 16:14:45 -04:00
Erwan Gouriou 191b30927b soc: stm32: STM32L0: Remove useless package digit
Fixes #16733, applied to STM32L0 series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-06-17 16:14:45 -04:00
Erwan Gouriou ae7ce0792d soc/arm/st_stm32: Replace STM32 specific core selection option
stm32mp1 was adding a STM32 specific Core selection Kconfig
symbol while zephyr generic CPU_CORTEX_M4 could be used for the
same purpose.
Remove STM32 specific symbol and use generic one.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-06-17 03:17:46 -04:00
Kumar Gala a2693975d7 dts: Convert from DT_<COMPAT>_<INSTANCE>_<PROP> to DT_INST...
Change code from using now deprecated DT_<COMPAT>_<INSTANCE>_<PROP>
defines to using DT_INST_<INSTANCE>_<COMPAT>_<PROP>.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-14 08:02:15 -05:00
Roger N'Guessan 0a9d547cc1 drivers: i2c: enable I2C on STM32WB
Enable I2C on STM32WB

Signed-off-by: Roger N'Guessan <roger.nguessan@st.com>
2019-06-07 11:47:59 -04:00
Erwan Gouriou 51033a5814 drivers/flash: stm32wb: Add HSEM
Add HSEM for Flash access since shared between 2 cores.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-06-03 09:38:19 -04:00
Erwan Gouriou 79edb8b632 dts: stm32wb: Limit flash size to 812K
stm32wb55rg is a dual core SoC (M4/M0) with a radio/protocol stack
running on M0 core. M0 FW starts at flash address 0x80CB000.
So flash size available to zephyr is 812K instead of 1M.
Configure package size to reflect this (flash size is now 812K)
and update MPU setting to exclude M0 FW. From MPU point of view,
we set flash size to 512K since we should chose a size being a power
of 2.
If we consider there will be 2 images partitions in a FOTA scheme,
512 K is beyond image-0 and hence is sufficient to cover application
image.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-06-03 09:38:19 -04:00
Erwan Gouriou d777413b19 drivers/flash: stm32wb: Add driver for stm32wb
Add flash driver for stm32wb

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-06-03 09:38:19 -04:00
Erwan Gouriou c6ebfad7a7 include/arch/arm: linker.ld: Add shared memory sections definitions
STM32WB HCI driver requires definition of 2 RAM regions to support
use of 3 shared memory sections: MAPPING_TABLE, MB_MEM1 and MB_MEM2.
In linker.ld, under conditions of HCI driver to be enabled,
define SRAM1 and SRAM2 based on input defined in stm32wb linker.
Then define the 3 sections MAPPING_TABLE, MB_MEM1 and MB_MEM

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-06-03 09:38:19 -04:00
Erwan Gouriou 35ecdf8af1 soc: stm32: Remove unused soc_register header file
soc_register.h is available in most of stm32 series.
It is sometime empty or contains includes to flash_registers.h,
which is included directly with direct reference in flash driver.
soc_register.h is also included in stm32 clock drivers, but this
driver do not use direct reference to any register anymore.

Clean up these files.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-05-30 09:37:51 -04:00
Øyvind Rønningstad 000103906a soc: arm: st_stm32: Port CCM sections to use the Cmake function
Remove them from linker.ld

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-05-20 22:28:28 -04:00
Ioannis Glaropoulos 75f681b0d9 soc: arm: add ARM MPU node info and fixup for Cortex-M7 SoCs
Unlike Cortex-M3 and Cortex-M4, in Cortex-M7 the number of
MPU regions may vary based on the implementation. This commit
adds a DTS node for the ARM MPU peripheral in the device tree
of Cortex-M7 SoCs and updates the fixup files, so we may extract
the number of MPU regions at build time. SoCs:
- nxp_rt
- same70
- stm32f7

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-05-20 14:06:10 -05:00
Ioannis Glaropoulos fb713aa062 soc: arm: move z_clearfaults() in kernel_arch_init()
In kernel_arch_init() we initialize the ARM core (interrupt
setup, fault init, etc.) so we can also move z_clearfaults()
in the same function and skip invoking it in the SoC init
functions.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-05-17 09:48:11 -07:00
Matthew Koch 75f0ad5ac0 stm32f7: Kconfig: soc: Enable GPIO ports F & G by default
Enable GPIO ports F & G (follow the pattern of H, I, J & K)

Fixes: #15918

Signed-off-by: Matthew Koch <koch.matthew@gmail.com>
2019-05-12 15:15:41 -04:00
Jun Li d1b21f3462 soc: stm32: enable outputing hex file
Hex firmware file is convenient in some scenarios, like
generating signed firmware with `west sign`. So, enable
generating hex file.

Signed-off-by: Jun Li <jun.r.li@intel.com>
2019-05-08 21:11:10 -04:00
Song Qiang 7c7db00a77 drivers: adc: add driver support for ADC1 of stm32
This commit adds driver support for ADC1 on all 8 supported series of
stm32 with resolution and conversion time selection and calibration.

Currently DMA is not supported for all series, and without it, zephyr
won't be able to catch up ADC's end of conversion interrupt, so this
version of the driver supports one channel conversion only. Users want
multi-channel conversion should use multiple sequences in their app
code.

This driver uses LL lib rather than HAL because the current HAL lib for
ADC will call HAL_DMA_* functions rather than using zephyr's common DMA
interface, so that way the driver will break the consistency of the
code.

This driver has been tested on multiple nucleo boards including
NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/F746ZG/L073RZ/L476RG and all
passed the test cases in tests/drivers/adc/adc_api. If the external ADC
line is floating, it may fail the tests since ADC may get 0V and the
test cases think 0 is failing. Connect it to any voltage source between
0-3.3V will help passing the test cases.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-05-07 23:15:58 -04:00
Song Qiang da56cad3a4 dts: arm: stm32: add dts support for ADC1 of stm32
All series of stm32 have at least one ADC instance and this commit adds
one ADC node to the root dts file of each soc, and also adds fixing up
mappings to them.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-05-07 23:15:58 -04:00
Jun Li 9f21b09d9e soc: stm32f4: complete uart7's dts
Complete definitions for UART7 on
STM32F4 SoCs.

Signed-off-by: Jun Li <jun.r.li@intel.com>
2019-05-07 22:12:04 -04:00
Benoit Leforestier 85698a01cc DTS: Add UART 5 for STM32F4 SOC
Add UART 5 configuration for STM32F4 SOC, in dts_fixup.h

Signed-off-by: Benoit Leforestier <benoit.leforestier@gmail.com>
2019-05-06 08:46:47 -05:00
Yaël Boutreux 6f225ab690 uart: Add support for stm31mp157c_dk2 board
Add support for stm32mp1 basic UART API with Zephyr.
UART Console and UART shell are also supported.
Async UART API and USART support is to be done.

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-05-03 14:22:02 -04:00
Yaël Boutreux b4b7020b03 gpio: Add stm32mp157c_dk2 board support
Add support for stm32mp1x GPIO with Zephyr GPIO driver

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-26 02:56:20 -07:00
Yaël Boutreux aca4b075f1 clock_control: Add stm32mp157c_dk2 board support
Add support for stm32mp1x RCC with Zephyr clock_control driver

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-26 02:56:20 -07:00
Ioannis Glaropoulos 894eca5e4f soc: arm: rename CPU_HAS_SYSTICK to CPU_CORTEX_M_HAS_SYSTICK
This commit renames the symbol CPU_HAS_SYSTICK to
CPU_CORTEX_M_HAS_SYSTICK, to look similar to all
other CPU_CORTEX_M_HAS_ options, and moves the
K-config symbol definition from arm/core/Kconfig to
arm/core/cortex_m/Kconfig.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-04-25 23:09:23 -07:00
Ioannis Glaropoulos ccf90fd9c2 soc: arm: select CPU_HAS_SYSTICK in ARCH Kconfig
ARM SysTick timer is implemented by default in ARMv7-M
and Mainline ARMv8-M processors, so we include the
corresponding Kconfig symbol in arch/arm/core/cortex-M/Kconfig
and remove the selections from the Cortex-M SOCs.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-04-25 23:09:23 -07:00
Ioannis Glaropoulos ce0dcea4b1 soc: arm: remove redundant CPU_CORTEX_M selection
CPU_CORTEX_M does not need to be selected by Kconfig
symbols that already select a CORTEX_M variant.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-04-25 23:09:23 -07:00
Habib Zaid 32367c0dfc soc: arm: stm32: Updated SRAM Region Definitions
This updates the SRAM region definition for stm32

Signed-off-by: Habib Zaid <habibzaid@gmail.com>
2019-04-24 11:06:41 -05:00
Manivannan Sadhasivam b31adf2d33 drivers: i2c: Add STM32L1X I2C support
Add I2C support for STM32L1X SoC series based on I2C_STM32_V1
driver.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam 0525019b23 drivers: interrupt_controller: Add STM32L1X EXTI support
Add EXTI support for STM32L1X SoC series.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam 1eb6177e9b drivers: gpio: Add STM32L1X GPIO support
Add GPIO driver support for STM32L1X SoC series.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam 43e56a93bb soc: arm: stm32: stm32l1: Add UART support
Add UART support for STM32L1 series SoCs.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam c8b0a8d41f drivers: clock_control: Add STM32L1X clock support
Add clock support for STM32L1X SoC series.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam 92ac6d8fc6 soc: arm: st_stm32: Add STM32L1 SoC series
Add STM32L1 SoC series support with STM32L15XXB as the target
SoC.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Erwan Gouriou 1847426f32 dts/arm/st: Add serial nodes on stm32wb
Add USART1 and LPUART1 nodes on stm32wb series.
Only these 2 ones are available for now on this series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-04-19 14:19:44 -05:00
Erwan Gouriou eb51ea00b0 soc/arm/st_stm32: stm32wb: Add gpio support
Add GPIO support to stm32wb series.
Only ABCDE and H ports are available for now on this series.
Accordingly, update series dtsi file.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-04-19 14:19:44 -05:00
Erwan Gouriou b11289997f drivers/clock_control: Add support to stm32wb series
Add support to stm32wb series in stm32 clock_control driver.
Ip is similar to stm32l4 one but AHB bus presacler is renamed
to "CPU1" and CPU2 and AHB4 prescalers should be defined.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-04-19 14:19:44 -05:00
Erwan Gouriou 6347b87e8f soc/arm/st_stm32: Add support for stm32wb soc
Provide basic soc configuration for STM32WB SoCs support in Zephyr.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-04-19 14:19:44 -05:00
Arnaud Pouliquen 776671c7eb drivers/interrupt_controller: stm32: add support of stm32mp1
Add support of the stm32mp1 gpio exti.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-04-19 12:05:27 -05:00
Arnaud Pouliquen e0afd7e580 soc: stm32: add initial soc support for stm32mp1 family
Add the initial SoC support for the STM32MP1 family. The code was
tested on STM32MP157c, but should work on any STM32MP1XX currently
available.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-04-19 12:05:27 -05:00
Ulf Magnusson 7fdb525754 kconfig: Use 'default' instead of 'def_bool' in Kconfig.defconfig files
Same deal as in commit 4638652214 ("Kconfig: Use 'default' instead of
'def_bool' in Kconfig.defconfig files"), fixing new stuff that got
introduced since then.

Some symbols, like ALTERA_AVALON_PIO, are only defined in
Kconfig.defconfig files, and so need the def_bool.

Motivation (from the note at the end of
guides/kconfig/index.html#common-shorthands):

For a symbol defined in multiple locations (e.g., in a Kconfig.defconfig
file in Zephyr), it is best to only give the symbol type for the "base"
definition of the symbol, and to use 'default' (instead of 'def_<type>'
value) for the remaining definitions. That way, if the base definition
of the symbol is removed, the symbol ends up without a type, which
generates a warning that points to the other definitions. That makes the
extra definitions easier to discover and remove.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-04-18 12:20:49 -04:00
Kwon Tae-young a7199b757d soc: st: add STM32F415RG
This commit adds support for STM32F415RG.

Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
2019-04-18 11:12:16 -05:00
Alexander Wachter 78714b4ff4 boards: arm: nucleo_f746zg: Activate CAN on nucleo F746zg
This commit adds CAN support for nucleo F746zg.
Furtermore CAN was added in stm32f7.dtsi and pinmuc_stm32f7.h
CAN_RX: PD0, CAN_TX: PD1

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-04-18 09:23:20 -04:00
Georgij Cernysiov 04da64db76 drivers: serial: stm32: dts binding, and fixup for flow control
Allows to enable initial RTS/CTS hardware flow control
in the dts.

Co-authored-by: Benoit Leforestier <benoit.leforestier@gmail.com>
Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
2019-04-17 16:09:54 -05:00
Josef Gajdusek 29ffcae80c drivers: usb_dc_stm32: Make pin remapping part of the device tree
The SYSCFG_CFGR1_PA11_PA12_RMP define is present even on packages where
the remap isn't strictly required. This commit makes the remap optional
based on a DT property.

Also fixes syntax error caused by a missing );.

Signed-off-by: Josef Gajdusek <atx@atx.name>
2019-04-17 09:58:09 -05:00
Anas Nashif 3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Patrik Flykt fd42bf7443 soc: Rename reserved function names
Rename reserved function names in the soc/ subdirectory.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-04-03 17:31:00 -04:00
Erwan Gouriou f3832a399e drivers/flash: stm32f3/stm32f1: define flash registers as volatile
On STM32F3 devices, a trick was required for normal use of registers.
This was actually an issue in flash registers defintions which should
be defined as volatile.
Fix this and additionaly, fix definition for STM32F1 which was also
lacking the volatile instruction.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-03-15 06:43:24 -05:00
Erwan Gouriou 70f95a25f5 soc: stm32f4: fixup: Rename UART generated DT_ defines
On stm32f4 series, uart4 is not an usart, so generated with
'st,stm32-usart' compatible and hence generated defined should be
prefixed with DT_ST_STM32_UART_ rather than DT_ST_STM32_USART.

Fixes #14542

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-03-15 06:39:37 -05:00
Ulf Magnusson 53376394b7 kconfig: Remove blank lines at the beginning/end of files
Maybe this is some "just in case" thing that got copied around. There's
no need to have a blank line at the beginning or end of Kconfig files.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-13 07:29:42 -05:00