michaelh/zephyr

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Author	SHA1	Message	Date
Kumar Gala	a1b77fd589	zephyr: replace zephyr integer types with C99 types git grep -l 'u\(8\\|16\\|32\\|64\)_t' \| \ xargs sed -i "s/u\(8\\|16\\|32\\|64\)_t/uint\1_t/g" git grep -l 's\(8\\|16\\|32\\|64\)_t' \| \ xargs sed -i "s/s\(8\\|16\\|32\\|64\)_t/int\1_t/g" Signed-off-by: Kumar Gala <kumar.gala@linaro.org>	2020-06-08 08:23:57 -05:00
Parthiban Nallathambi	f4adfd52cb	drivers: serial: add XMC seris UART support Add infineon XMC4 series UART support. Driver supports only poll mode using XMCLib. Out of 4 available UART's on SoC, only UART1 is confgired by default in UART mode until GPIO & pinctrl support. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>	2020-05-09 14:21:44 +02:00
Parthiban Nallathambi	b687d76d09	soc: arm: add infineon_xmc series support Add infineon xmc series with XMC4500 support. XMC series comes with, - CPU operates upto 120MHz - 3 RAM (PSRAM1 - code, DSRAM1 - data and DSRAM2 - communiation) - upto 1MB flash init: clock control & gpio is not done, so SoC initialization directly relies on HAL. Core operating clock is stored in no_init section, which is kept under DSRAM1. Only DSRAM1 is used until clock support. Using PSRAM1 and DSRAM1 needs adaptation in linker script - planned for next revision. Note: SystemInit cannot be consumed directly due to vector table + HAL linker dependency. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>	2020-05-09 14:21:44 +02:00

Author

SHA1

Message

Date

Kumar Gala

a1b77fd589

zephyr: replace zephyr integer types with C99 types

git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>

2020-06-08 08:23:57 -05:00

Parthiban Nallathambi

f4adfd52cb

drivers: serial: add XMC seris UART support

Add infineon XMC4 series UART support. Driver supports
only poll mode using XMCLib.

Out of 4 available UART's on SoC, only UART1 is confgired
by default in UART mode until GPIO & pinctrl support.

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>

2020-05-09 14:21:44 +02:00

Parthiban Nallathambi

b687d76d09

soc: arm: add infineon_xmc series support

Add infineon xmc series with XMC4500 support. XMC series comes with,
- CPU operates upto 120MHz
- 3 RAM (PSRAM1 - code, DSRAM1 - data and DSRAM2 - communiation)
- upto 1MB flash

init: clock control & gpio is not done, so SoC initialization directly
relies on HAL. Core operating clock is stored in no_init section, which
is kept under DSRAM1. Only DSRAM1 is used until clock support. Using
PSRAM1 and DSRAM1 needs adaptation in linker script - planned for next
revision.

Note: SystemInit cannot be consumed directly due to vector table +
HAL linker dependency.

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>

2020-05-09 14:21:44 +02:00

3 commits