Even one liner if () statement should have braces.
Fixing parameter indentation as well.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
We generated a define for each instance to convey its existance of the
form:
#define DT_<COMPAT>_<INSTANCE> 1
However we renamed all other instance defines to be of the form
DT_INST_<INSTANCE>_<FOO>. To make things consistent we now generate a
define of the form:
#define DT_INST_<INSTANCE>_<COMPAT> 1
We also now deprecate the DT_<COMPAT>_<INSTANCE> form and fixup all uses
to use the new form.
Fixes: #17650
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This board and SoC was discontinued some time ago and is currently not
maintained in the zephyr tree.
Remove all associated configurations and variants from the tree.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
HSEM_CR_COREID_CURRENT was used as process number parameter in
LL_HSEM_ReleaseLock function. While this is working, this
define should not be used in this context.
Also, process number parameter is actually proposed in case of HSEM
use in inter-process context but is not required for inter-core
resource lock. Replace HSEM_CR_COREID_CURRENT with 0.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Protect gpio_configure function in dual core context.
This operation is not needed for other fuctions of the api:
* init
* read
* write
Protecting gpio_configure also protects access to
interrupt_controller IP.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
move misc/util.h to sys/util.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move misc/speculation.h to sys/speculation.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move misc/slist.h to sys/slist.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move misc/printk.h to sys/printk.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move misc/byteorder.h to sys/byteorder.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move misc/__assert.h to sys/__assert.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move pinmux.h to drivers/pinmux.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move i2c.h to drivers/i2c.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move gpio.h to drivers/gpio.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move clock_control.h to drivers/clock_control.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move sys_io.h to sys/sys_io.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move power.h to power/power.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Move internal and architecture specific headers from include/drivers to
subfolder for interrupt_controller:
include/drivers/interrupt_controller/
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Removed Quark D2000 SoC files and first-order related DT bindings.
A few config options have been moved from the CONFIG_* space to
the DT_* space, as they were defined in the D2000 Kconfig files
and "leaked" into the other Quark trees.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The defines related to IRQ priority don't exist and aren't used. So
just pass 0 to IRQ_CONNECT for the priority field.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The defines should have had a _0 on them, now that we generate the
proper defines, fixup the cases that used that old scheme.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Found a few annoying typos and figured I better run script and
fix anything it can find, here are the results...
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change code from using now deprecated DT_<COMPAT>_<INSTANCE>_<PROP>
defines to using DT_INST_<INSTANCE>_<COMPAT>_<PROP>.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Per guidelines, all statements should have braces around them. We do not
have a CI check for this, so a few went in unnoticed.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The compiler and linker was generating errors after
disabling `CONFIG_EXTI_STM32` due to inconsistency
in `interrupt_controller/CMakeLists.txt`
and not considering this option in gpio implementation.
Signed-off-by: Maciej Zagrabski <maciej.zagrabski@grinn-global.com>
https://github.com/zephyrproject-rtos/ci-tools/pull/65 tweaks the check
for references to undefined Kconfig symbol to whitelist anything on the
form 'CONFIG_FOO_*' (or 'CONFIG_FOO_*_...'). This is meant for #endif
comments that talk about many related symbols.
Fix two existing #endif comments to use that format, so that some
entries can be removed from the whitelist in the CI check.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The value of GPIO_INT_ACTIVE_LOW is 0, so the bit checking if statement
is never executed. Use GPIO_INT_ACTIVE_HIGH when checking this bit.
Fixes#16162
Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
Adds a new xec gpio driver that can be used with the
XEC MCUs. This driver modifies the PCR1 register in order
to configure gpio settings. Interrupts are triggered by the EC
interrupt aggregator block.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
The HT16K33 is a memory mapping, multifunction LED controller
driver. The controller supports up to 128 LEDs (up to 16 rows and 8
commons) and matrix key scan circuit of up to 13x3 keys.
This commit adds support for the keyscan functionality of the HT16K33.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This adds interrupt support to the SAM0 GPIO driver. This is heavily
inspired by @nzmichaelh work in #5715. The primary difference
from that implementation is that here the External Interrupt
Controller (EIC) is separated out into an interrupt controller driver
that is less tightly coupled to the GPIO API. Instead it implements
more of a conversion from the EIC's own odd multiplexing to a more
traditional port and pin mask IRQ-like callback. Unfortunately,
through the EIC on the SAMD2x are relatively well behaved
in terms of pin to EIC line mappings, other chips that share the
peripheral interface are not. So the EIC driver implements a
per-line lookup to the pin and port pair using definitions extracted
from the ASF headers.
The EIC driver still makes some assumptions about how it will be used:
mostly it assumes exactly one callback per port. This should be fine
as the only intended user is the GPIO driver itself.
This has been tested with some simple programs and with
tests/drivers/gpio/gpio_basic_api on a SAMD21 breakout and an
adafruit_trinket_m0 board.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
Add initial support for the TI CC13x2 / CC26x2 series with the CC2652R
and CC1352R SoCs. The UART and GPIO peripherals are supported. Drivers
use the driverlib HAL from the TI CC13x2 / CC26x2 SDK.
Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
Adds Atmel SAMR21 soc which is based on SAMD21, but with a AT86RF233
radio connected internally via SPI.
The AT86RF233 is not yet supprted by Zephyr at this point.
This code is very much copy & paste from atmel_sam0/samd21
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
The GPIO driver for the Intel Apollo Lake has so many pins it has to
export ten devices to shoehorn its one device into the GPIO API. The
current implementation uses the shared IRQ driver because these
pseudodevices all share one IRQ. However, since the GPIO driver is
aware of all the possible interrupt sources, it's smaller and faster
(and not even messy) to handle it internally, so this patch eliminates
the dependency on the shared IRQ driver.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Make sure that when e.g. CONFIG_SERIAL is set, CONFIG_UART_SAM0 is
selected automatically when the sam0 SoC family is used.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Add GPIO support to stm32wb series.
Only ABCDE and H ports are available for now on this series.
Accordingly, update series dtsi file.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
gpio_intel_apl_read() should set *value to 1, not 2, when the
GPIO input is a logical high.
Fixes: #15499
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
For STM32L47x/48x series devices, register ASCR should be configured to
connect analog switch of gpio lines to the ADC.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Enable the clock for GPIO ports on the RV32M1 SoC before attempting to
access the port controller registers.
Fixes: #15339
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier. Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.
By default all files without license information are under the default
license of Zephyr, which is Apache version 2.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Rename reserved function names in drivers/ subdirectory. Update
function macros concatenatenating function names with '##'. As
there is a conflict between the existing gpio_sch_manage_callback()
and _gpio_sch_manage_callback() names, leave the latter unmodified.
Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
The existing device_set_power_state() API works only in synchronous
mode and this is not desirable for devices(ex: Gyro) which take
longer time (few 100 mSec) to suspend/resume.
To support async mode, a new callback argument is added to the API.
The device drivers can asynchronously suspend/resume and call the
callback function upon completion of the async request.
This commit adds the missing callback parameter to all the drivers
to make it compliant with the new API.
Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
Update reserved function names starting with one underscore, replacing
them as follows:
'_k_' with 'z_'
'_K_' with 'Z_'
'_handler_' with 'z_handl_'
'_Cstart' with 'z_cstart'
'_Swap' with 'z_swap'
This renaming is done on both global and those static function names
in kernel/include and include/. Other static function names in kernel/
are renamed by removing the leading underscore. Other function names
not starting with any prefix listed above are renamed starting with
a 'z_' or 'Z_' prefix.
Function names starting with two or three leading underscores are not
automatcally renamed since these names will collide with the variants
with two or three leading underscores.
Various generator scripts have also been updated as well as perf,
linker and usb files. These are
drivers/serial/uart_handlers.c
include/linker/kobject-text.ld
kernel/include/syscall_handler.h
scripts/gen_kobject_list.py
scripts/gen_syscall_header.py
Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
The code had GPIO_INT_DOUBLE_EDGE siliently ignored, instead lets run
-ENOTSUP so caller knows its not going to work.
Fixes: #12764
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Most of these are from source'ing a file within an 'if GPIO', and then
adding another 'depends on GPIO' within it.
'if FOO' is just shorthand for adding 'depends on FOO' to each item
within the 'if'. There are no "conditional includes" in Kconfig, so
'if FOO' has no special meaning around a 'source'. Conditional includes
wouldn't be possible, because an 'if' condition could include (directly
or indirectly) forward references to symbols not defined yet.
Tip: When adding a symbol, check its dependencies in the menuconfig
('ninja menuconfig', then / to jump to the symbol). The menuconfig also
shows how the file with the symbol got included, so if you see
duplicated dependencies, it's easy to hunt down where they come from.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Converts the rv32m1 gpio driver to use 'DT_' prefixed defines instead of
deprecated non-prefixed defines.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
These options were removed from kconfig in previous patch. So rename
the leftovers as shared_irq driver options are defined in DTS now.
Fix#13746
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
GPIO_INT_ACTIVE_LOW is 0 which means it cannot be simply AND-ed.
So fix the condition.
Fixes#13880
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Some mcux gpio instances do not have dedicated interrupt vectors and
therefore conditionalize out the IRQ_CONNECT() and irq_enable() calls
during driver initialization. The driver initialization incorrectly
returned an error in this case, when really it just has nothing to do.
The driver can still be used without interrupts, and the gpio configure
function returns an error if an application tries otherwise.
Commit a68120de6d introduced a check on
the init return value to prevent applications from using drivers that
fail to initialize. This in turn caused zephyr/samples/basic/threads to
assert on the frdm_kl25z board. Fix this by modifying the mcux gpio
driver to return success when there is no interrupt to connect.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
It is planned to deprecate SHELL_CREATE_STATIC_SUBCMD_SET macro
which is replaced by SHELL_STATIC_SUBCMD_SET_CREATE.
Additionally, removed irrelevant comments about alphabetical
ordering which is no longer needed.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Following configuration options are not supported by STM32
gpio driver:
-GPIO_INT_LEVEL
-GPIO_POL_INV
Return an error when one of these is requested.
Fixes#12766
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The gpio mcux driver has been using non DT_ prefixed defines for DT
generated defines. Switch to use DT_ prefixed ones as we want to
deprecated the non DT_ prefixed defines.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The controller does not support trigger. However, the check for
this condition was incorrectly (as GPIO_INT_LEVEL is 0). So fix
it.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Interrupts default to trigger on level for historical reasons, so use of
GPIO_INT_LEVEL` as a mask results in a zero value. Use a mask macro to
isolate the trigger configuration.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The GPIO controller only supports edge triggering according to
the descriptions of the associated registers. So errors out
when level trigger is requested. Also adds the option to do
double edges triggering as the controller supports this.
Fixes#12763
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
To avoid confusion, callbacks using ordinal pin numbers
is going to be reverted. So the driver has to be re-worked
to expose multiple devices so each device has 32 pins.
Also fixes#12765
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This allows the shared_irq driver to be configured by device tree.
With previous implementation, only the board configuration can
override the IRQ trigger, as the trigger config is a "choice" rather
than "config". With this patch, the driver can be fully configued at
the SoC level.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The iterator over registered callbacks failed to account for the
possibility that the callback would remove itself from the list. If
this occurred any remaining callbacks would no longer be reachable from
the node. Switch to the slist iterator that is safe for self-removal.
Note that the slist API remains unsafe for removal of subsequent nodes.
Even with the corrected code removal of the next callback registration
(cached in tmp) will result in it being called anyway, with the
remaining unremoved registrations not being called. If the next
callback were removed and re-registered on a different device, the
callbacks would be invoked for the wrong device.
Resolve this by a documentation change describing the conditions under
which a change to callback registration from within a callback are
permitted. Add a similar note regarding the effect of adding a
callback. The current event invocation behavior for callbacks added
within an event is explicitly left unspecified, though in the current
slist implementation newly added callbacks will not be invoked until the
next event.
Closes#10186
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This board is unmaintained and unsupported. It is not known to work and
has lots of conditional code across the tree that makes code
unmaintainable.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Validates the gpio pin number before using it to index into a
memory-mapped register array. Otherwise, a user could send a high pin
number and cause an out-of-bounds access.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
A number of CONFIG_ symbols should have been converted to DT_ defines
instead. Clean that up for PORT2..PORT4.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
It's not an error if a driver does not implement callback related
function. Let's return -ENOTSUP relevantly.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
It needs to verify if the callback was not already installed, and if so:
if is was in controller's list.
It should return an error in case the node is not found though it was
requested to be removed.
If already inserted, it will be silently removed but added again, to
avoid circular list as stated in the bug.
Fixes#11394
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Complete code factorization in stm32 exti drivers.
Add return value in case line is not implemented.
Except returned error code, refactor has been done iso-feature
compared to previous code. Hence error is reported only when
support was not available on previous series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Behavior of function gpio_stm32_configure has been modified
during driver factorization. Various gpio settings (speed, mode, ..)
are applied conditionally while they used to be applied in sequence,
unconditionally before this change. As a consequence some
combinations of configurations are no more applied (like speed for
alternate mode). This of course has impact in some use cases.
Rework functions in order to apply settings unconditionally. Take
advantage of the change to reduce code size.
This change impacts all SoCs except F1 series.
Fixes#12544
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Modified drivers to use DEVICE_AND_API_INIT() instead of DEVICE_INIT()
This will make sure driver_api,is populated at build time and is exposed
to user space
Signed-off-by: Varun Sharma <varun.sharma@intel.com>
The original implementation of gpio functions access registers
directly. Using LL library can add a set of unifying access
functions for all series of stm32 for avoiding accessing low level
code, and improve readability.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
All series STM32 have mostly the same GPIO architecture
and can share the same code for GPIO manipulation.
Functions of the external interrupt line control are also the same.
This patch extracts common code from them and put them into the 'common'
folder.
Functions of control GPIO of these series scattered in
soc/arm/st_stm32/stm32xx/ folders contain these functions:
stm32_gpio_flags_to_conf(), stm32_gpio_configure(), stm32_gpio_set(),
stm32_gpio_get, stm32_gpio_enable_int().
This patch merges them into the gpio_stm32.c file.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
By default, after reset SWO signal is not connected to GPIO pin. This
commit adds required initialization code to enable support for SWO
logger. Not all SoC series support the feature.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
On STM32L4, 14 pins (Port G[15:2]), require external power supply.
Activate this at port G init when PWR_CR2_IOSV is defined.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Zephyr gecko drivers depend on libraries provided by the vendor. The
same libraries may also be used directly by the application code or
RAIL library. To facilitate the latter use case scenario this commit
adds Kconfig options to independently enable compilation of vendor
HAL library modules.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
* Add support for gpio controller driver
Signed-off-by: Ashokkumar B <ashokkumar@zilogic.com>
Signed-off-by: Subash G <subash@zilogic.com>
Signed-off-by: Vishnu K <vishnu@zilogic.com>
Signed-off-by: Vaishnavi D <vaishnavi.d@zilogic.com>
Make the following nRF peripheral drivers:
- ADC
- GPIO
- I2C
- SPI
- UART
- USB_DEVICE
enabled by default so that users do not need to explicitly enable them
in their applications after choosing an nRF SoC as the build target.
Kconfig options enabling these drivers depend on both a given hardware
feature (e.g. I2C) and an nRF family SoC selected, so effectively they
will be automatically enabled only when it is adequate (and in most
cases these drivers are the only option for a given hardware feature
on nRF SoCs).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This definition was needed to translate the old symbol used in MDK
for accessing the GPIO peripheral in nRF51 SoCs (NRF_GPIO) to the
one used for all newer SoCs (NRF_P0). Now the translation is done
in the HAL for GPIO (nrf_gpio.h).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Check clock_control_on return value now that it is checking appropriate
bus is used in the request.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
GPIO pin interrupts share common EXTI resources.
Return an error when attempt to configure a line already in use.
Fixes#10611
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Nordic devices detect edge interrupts through the PORT event which is
generated on a rising edge of DETECT, which itself is asserted when any
GPIO is configured for sense level detection and the GPIO's input signal
matches the configuration.
The previous code in Zephyr attempts to detect when at least one GPIO
SENSE signal is still asserted, and intentionally leaves the PORT event
uncleared to ensure the interrupt is re-entered.
This approach fails when no pin satisfies its SENSE condition during the
check but at least one input changes level between the completion of the
check and the clear of the PORT event. Such a failure can be observed
on the pca20020 hardware when multiple sensors configured for level
triggers are active. In this situation the corresponding sensor trigger
signals remain asserted but the PORT event required to drive their
processing has already been cleared.
The fix is to ensure that the SENSE configuration for all GPIOs across
all port instances is disabled prior to unconditionally clearing the
PORT event, then re-enabling the SENSE configuration for all GPIOs once
callbacks associated with detected SENSE triggers have been performed.
The act of re-enabling will ensure any relevant SENSE condition causes a
new rising edge on DETECT and so a new PORT event.
Closes issue #11806
See: https://devzone.nordicsemi.com/f/nordic-q-a/7246/missing-interrupts-on-gpioe-port-events
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This ensures compatibility with Silicon Labs EXX32 MCU Series 1.
Signed-off-by: Gil Benkö <gil.benkoe@pm.me>
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
These changes modify the function of reading port/pin,
function return logical sum of input pin value and
output pin values for a given port. It is now possible
to read the status of pins set as output.
Signed-off-by: Kamil Gawor <Kamil.Gawor@nordicsemi.no>
These changes were obtained by running a script created by
Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> for the following
specification:
1. Read the contents of all dts_fixup.h files in Zephyr
2. Check the left-hand side of the #define macros (i.e. the X in
#define X Y)
3. Check if that name is also the name of a Kconfig option
3.a If it is, then do nothing
3.b If it is not, then replace CONFIG_ with DT_ or add DT_ if it
has neither of these two prefixes
4. Replace the use of the changed #define in the code itself
(.c, .h, .ld)
Additionally, some tweaks had to be added to this script to catch some
of the macros used in the code in a parameterized form, e.g.:
- CONFIG_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS
- CONFIG_UART_##idx##_TX_PIN
- I2C_SBCON_##_num##_BASE_ADDR
and to prevent adding DT_ prefix to the following symbols:
- FLASH_START
- FLASH_SIZE
- SRAM_START
- SRAM_SIZE
- _ROM_ADDR
- _ROM_SIZE
- _RAM_ADDR
- _RAM_SIZE
which are surprisingly also defined in some dts_fixup.h files.
Finally, some manual corrections had to be done as well:
- name##_IRQ -> DT_##name##_IRQ in uart_stm32.c
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Update a couple of labels generated from DTS used directly (not through
dts_fixups) in TI CC2650 system initialization code and a few drivers
for this SoC.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Specific code is present GPIO_DEVICE_INIT_STM32 in
GPIO_DEVICE_INIT_STM32 to handle LL_APB2_GRP1_PERIPH_AFIO bit.
Though, this bit is already included in device tree information,
in clocks property, 'bits' field, which carries for each GPIO,
both LL_APB2_GRP1_PERIPH_GPIOX and LL_APB2_GRP1_PERIPH_AFIO.
Hence, it is already taken into account in
CONFIG_GPIO_STM32_GPIO##__SUFFIX##_CLOCK_BITS and it is redundant
to handle it in GPIO_DEVICE_INIT_STM32 macro.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Couple of findings which were revealed after changing
LOG_MODULE_REGISTER macro:
- missing semicolons after LOG_MODULE_REGISTER()
- missing LOG_LEVEL defines
- other
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The information extracted from the device tree is now used to initialize
GPIO device instances. Up until now the GPIO device driver made no use
of this information. Actual instance creation is still controlled using
the Kconfig method. Missing GPIO device tree nodes were added in the
process for STM32L073, STM32F413 and STM32F373.
The information for gpio instance initialization has already been
present for supported STM32 SoCs but remained unused. Changes in the
device tree had no effect on GPIO functionality and was essentially
redundant. Using the device tree for hardware description seems
plausible and less painful than a myriad of defines in some SoC
description header.
The change was implemented under the assumption that current device
trees provide a correct description of the SoCs. Base register addresses
and RCC register bits were not explicitly checked for each device.
Manual tests were executed on:
- NUCLEO-F103RB
- STM32F429I-DISCO
- STM32F746G-DISCO
- NUCLEO-F767ZI
Manual tests consisted of blinky on different GPIOs and pins on each
board.
sanitycheck was executed for all STM32 based boards
Fixes: #10629
Signed-off-by: Martin Bertsche <martin72216@googlemail.com>
Convert gpio_cc32xx driver over to using device tree. Added binding
files, updates to dts for various SoCs that use cc32xx.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The DTS changes introduced in 7ae220c845
changes the naming of GPIO related macros. This updates the usage
of previous macros via DTS fixup.
Fixes#10993
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Fix misspellings in Kconfig files that show up in the configuration
documentation (and make menuconfig screens).
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Provide basic commands for configuring/setting/reading GPIO ports.
> gpio conf ..
> gpio set ..
> gpio get ..
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The 'value' param in ACCESS_BY_PORT mode means the state of a port,
one bit represented one pin in param 'value'.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
IRQ_CONNECT calls in the SiFive GPIO driver were misconfigured when the
conversion to DeviceTree support occurred.
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
Convert gpio_gecko driver over to using device tree. Added binding
files, updates to dts for various SoCs that use gpio_gecko.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rename log level variable:
CONFIG_LOG_GPIO_LEVEL to CONFIG_GPIO_LOG_LEVEL
Use template for log levels.
Register modules in drivers using logging.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add the missing bits to the yaml, dts, and Kconfig to enable GPIO pin
generation based on device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add the needed bits to get device tree support for the GPIO controller
on the Zedboard-Pulpino. This will allow us to move LED & button info
into the board.dts.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Every board that uses dts-enabled i2c drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_I2C_DEVICE and
HAS_DTS_I2C.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Selects HAS_DTS_GPIO in various gpio drivers that already support dts,
similar to how we select HAS_DTS_SPI in spi drivers and HAS_DTS_I2C in
i2c drivers.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Any word started with underscore followed by and uppercase letter or a
second underscore is a reserved word according with C99.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Replaces direct accesses to the peripheral registers structure
with the proper GPIOTE HAL function added recently to nrfx.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Commit fixes two issues:
- Return correct value from gpiote_channel_alloc
- Check if pending event interrupt was not disabled
Jira:DESK-270
Fixes#9535
Signed-off-by: Pawel Dunaj <pawel.dunaj@nordicsemi.no>
When CONFIG_GPIO_SX1509B was not set, the related Kconfig options
were still showing up in .config. Let's make them depend on
GPIO_SX1509B so they can go away when not being used.
Signed-off-by: Michael Scott <mike@foundries.io>
Add ifdefs to the SiFive GPIO driver IRQ bindings to allow fewer than
32 pins to be configured based on the DTS configuration
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
After GPIO shim using NRFX has been implemented, old gpio_nrf5
shim is no longer needed.
Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
irq_lock returns an unsigned int, though, several places was using
signed int. This commit fix this behaviour.
In order to avoid this error happens again, a coccinelle script was
added and can be used to check violations.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
FE310 is the name of one SoC out of a range of products in the SiFive
Freedom line. The FE310 SoC port in Zephyr is compatible with all of
these products, so rename the SoC to SiFive Freedom
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
Consistently use
config FOO
bool/int/hex/string "Prompt text"
instead of
config FOO
bool/int/hex/string
prompt "Prompt text"
(...and a bunch of other variations that e.g. swapped the order of the
type and the 'prompt', or put other properties between them).
The shorthand is fully equivalent to using 'prompt'. It saves lines and
avoids tricking people into thinking there is some semantic difference.
Most of the grunt work was done by a modified version of
https://unix.stackexchange.com/questions/26284/how-can-i-use-sed-to-replace-a-multi-line-string/26290#26290, but some
of the rarer variations had to be converted manually.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Up until now, Zephyr has patched Kconfig to use the last 'default' with
a satisfied condition, instead of the first one. I'm not sure why the
patch was added (it predates Kconfiglib), but I suspect it's related to
Kconfig.defconfig files.
There are at least three problems with the patch:
1. It's inconsistent with how Kconfig works in other projects, which
might confuse newcomers.
2. Due to oversights, earlier 'range' properties are still preferred,
as well as earlier 'default' properties on choices.
In addition to being inconsistent, this makes it impossible to
override 'range' properties and choice 'default' properties if the
base definition of the symbol/choice already has 'range'/'default'
properties.
I've seen errors caused by the inconsistency, and I suspect there
are more.
3. A fork of Kconfiglib that adds the patch needs to be maintained.
Get rid of the patch and go back to standard Kconfig behavior, as
follows:
1. Include the Kconfig.defconfig files first instead of last in
Kconfig.zephyr.
2. Include boards/Kconfig and arch/<arch>/Kconfig first instead of
last in arch/Kconfig.
3. Include arch/<arch>/soc/*/Kconfig first instead of last in
arch/<arch>/Kconfig.
4. Swap a few other 'source's to preserve behavior for some scattered
symbols with multiple definitions.
Swap 'source's in some no-op cases too, where it might match the
intent.
5. Reverse the defaults on symbol definitions that have more than one
default.
Skip defaults that are mutually exclusive, e.g. where each default
has an 'if <some board>' condition. They are already safe.
6. Remove the prefer-later-defaults patch from Kconfiglib.
Testing was done with a Python script that lists all Kconfig
symbols/choices with multiple defaults, along with a whitelist of fixed
symbols. The script also verifies that there are no "unreachable"
defaults hidden by defaults without conditions
As an additional test, zephyr/.config was generated before and after the
change for several samples and checked to be identical (after sorting).
This commit includes some default-related cleanups as well:
- Simplify some symbol definitions, e.g. where a default has 'if FOO'
when the symbol already has 'depends on FOO'.
- Remove some redundant 'default ""' for string symbols. This is the
implicit default.
Piggyback fixes for swapped ranges on BT_L2CAP_RX_MTU and
BT_L2CAP_TX_MTU (caused by confusing inconsistency).
Piggyback some fixes for style nits too, e.g. unindented help texts.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
ports_enable array holds port clock information.
It is populated for all SoCs, but ports availability depends on
SoCs. The way it is defined today, location of the port in the
array depends on previous ports definition in SoC CMSIS files.
Though, port index is always the same irrespective of previous
ports availability in the SoC.
This will result in incoherency between port index and clock
information.
Fix this by setting a bogus value if port is not defined.
Return an error if bogus value is read.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit removes the redundant definition of nRF GPIOTE
register structure that is present in gpio_nrf5.c. The gpiote
driver is adapted to use the register definitions directly
from Nordic MDK header files.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit removes the redundant definition of nRF GPIO
register structure that is present in gpio_nrf5.c. The gpio
driver is adapted to use the register definitions directly
from Nordic MDK header files.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Fixes issues caused in GPIO driver due to overlapping GPIOTE
channel use in nRF5 software PWM driver and in Bluetooth
controller for implementing PA/LNA feature.
The issue is solved by assigning the base and available
channel count for GPIOTE considering whether PWM and/or
PA/LNA feature is selected in the Kconfig.
Fixes#8815.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Bool symbols implicitly default to 'n'.
A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though, and is
inconsistent.
This will make the auto-generated Kconfig documentation have "No
defaults. Implicitly defaults to n." as well, which is clearer than
'default n if ...'
Piggyback a missing 'source "drivers/gpio/Kconfig.imx"'. This file
wasn't included anywhere previously.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This adds basic support for declaring gpio nodes in dts for nrf52.
The dts.fixup provides mapping for the generated defines to the config
defines currently used by the nrf gpio driver.
Existing boards that use nrf52 are updated.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
STM32 GPIO device initialization priority was set to
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT
Following introduction of __ZEPHYR_SUPERVISOR__ macro (#6835),
drivers intialization order have been reordered which blocks
some use cases now.
Increase GPIO init priority to get it initialized before SPI
and avoid a deadlock.
Fixes#7663
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Now that all arch using QMSI gpio driver are generating the right
settings through DTS, these options can be removed from Kconfig.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Get the name and irq flags generated through dts as well.
Fix Kconfig for the gpio driver accordingly.
Irq priority is not set by dts for D2000 as it's irq controller does
not support it.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The various macros to do checks in system call handlers all
implictly would generate a kernel oops if a check failed.
This is undesirable for a few reasons:
* System call handlers that acquire resources in the handler
have no good recourse for cleanup if a check fails.
* In some cases we may want to propagate a return value back
to the caller instead of just killing the calling thread,
even though the base API doesn't do these checks.
These macros now all return a value, if nonzero is returned
the check failed. K_OOPS() now wraps these calls to generate
a kernel oops.
At the moment, the policy for all APIs has not changed. They
still all oops upon a failed check/
The macros now use the Z_ notation for private APIs.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Normally a syscall would check the current privilege level and then
decide to go to _impl_<syscall> directly or go through a
_handler_<syscall>.
__ZEPHYR_SUPERVISOR__ is a compiler optimization flag which will
make all the system calls from the driver files directly link
to the _impl_<syscall>. Thereby reducing the overhead of checking the
privileges.
In the previous implementation all the source files would be compiled
by zephyr_source() rule. This means that zephyr_* is a catchall CMake
library for source files that can be built purely with the include
paths, defines, and other compiler flags that all zephyr source
files uses. This states that adding one extra compiler flag for only
one complete directory would fail.
This limitation can be overcome by using zephyr_libray* APIs. This
creates a library for the required directories and it also supports
directory level properties.
Hence we use zephyr_library* to create a new library with
macro _ZEPHYR_SUPERVISOR_ for the optimization.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
* add gpio, i2c, spi definitions
* optimize and bug fix the dts.fixup
* optimize and bug fix the em_starterkit related definitions
in dts folder
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Add a set of Kconfig symbols that allow us to set that the GPIO
driver/SoC support DTS (HAS_DTS_GPIO) and that drivers that need/use
GPIO support DTS as well (HAS_DTS_GPIO_DEVICE).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds a shim layer around the imx gpio driver to adapt it to the Zephyr
gpio interface.
For now only the port 4 was tested.
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Driver APIs might not implement all operations, making it possible for
a user thread to get the kernel to execute a function at 0x00000000.
Perform runtime checks in all the driver handlers, checking if they're
capable of performing the requested operation.
Fixes#6907.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
We have been combining imported mcux drivers into a flattened directory
structure to maximize driver reuse, but the introduction of additional
nxp soc families (lpc and imx) to zephyr has introduced driver naming
conflicts. This caused us to rename and modify imported files, such as
fsl_gpio.c/h, to make them unique across all three nxp soc families.
This makes updating the the mcux drivers complicated, especially for the
lpc family.
Reoganize the mcux drivers into soc family subfolders, so we can just
copy all the drivers from an mcux distribution (which is done on an
soc-basis) into the appropriate soc family folder. Undo all of the
naming changes that occurred when lpc and imx drivers were originally
imported. Undo the accidental squashing of the kinetis watchdog and dcdc
drivers that occurred when the imx drivers were introduced.
The drawback to this approach is that we have duplicate files when the
same hw ip modules exist in multiple soc families, however there are
only few cases where this occurs, such as fsl_lpuart and fsl_trng.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
A Kconfig option is added for setting the initialization priority.
This is done to make the initialization priority requirements in
nrf52_pca20020 board power up sequence clearer.
Signed-off-by: Aapo Vienamo <aapo.vienamo@iki.fi>
Use the Zephyr toolchain and architecture defined popcount
and first_lsb_set functions instead of GCC specific
functions.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Fix the permitted range of IRQ priority to, 0 to 2, as
maximum one priority level is used, for zero latency IRQs
in nRF51, being an ARM Cortex-M0.
Update the Kconfig default GPIOTE IRQ priority level to the
lowest, for nRF51 a level of 2; for nRF52, a level of 5.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
The existing nrf5_common.h now applies to other Nordic ICs that are not
part of the "5" family. Instead rename this to nrf_common.h to cover the
upcoming ICs that belong to other families.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Upcoming Nordic ICs that share many of the peripherals and architecture
with the currently supported nRF5x ones are no longer part of the nRF5
family. In order to accomodate that, rename the SoC family from nrf5 to
nrf, so that it can contain all of the members of the wider Nordic
family.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Adds a driver for SX1509B I2C GPIO chip. This driver only supports the
basic GPIO features and does not currently implement the LED driver and
keypad matrix features.
Signed-off-by: Aapo Vienamo <aapo.vienamo@iki.fi>
Fix Kconfig help sections and add spacing to be consistent across all
Kconfig file. In a previous run we missed a few.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add gpio mcux driver which can be used for lpcxpresso54114 and other lpc
socs. In this driver, CMSIS register access is made for GPIO.
Option for access by GPIO Pin is provided as of now.
Signed-off-by: Shiksha Patel <shiksha.patel@nxp.com>
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The PIO cores on Altera Nios-II processors can be used
for GPIOs and each PIO core can be configured as Input only,
Output only or as Bidirectional port from the Qsys tool.
The present Nios-II softcpu image on the Zephyr only has the
support for Output only port and the PIOs[0:3] are wired to
LED[0:3] on the Altera MAX10 board.
Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
Adds a new gpio driver for the NXP i.MX family of SoCs. Read, write,
configure, and callback API functions are all implemented.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.
Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.
This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.
For users that just want to continue their work with minimal
disruption the following should suffice:
Install CMake 3.8.2+
Port any out-of-tree Makefiles to CMake.
Learn the absolute minimum about the new command line interface:
$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..
$ cd build
$ make
PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
nrf SOCs are capable of waking from Low power state or
Deep Sleep state using sense configuration.
So adding support for this in nrf GPIO driver.
Jira: ZEP-2623
Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
GPIO_PIN_ENABLE, GPIO_PIN_DISABLE configuration constants overlap
functionality provided by pinmux driver. They usage makes the API
inconsistent. They are almost uniformly ignored by the existing device
drivers. Only few of them take these constants into account.
This commit deprecates usage of the two configuration constants.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Many APIs had two versions, by port and by pin, which called the same
API with different parameters. This has been reorganized to reduce
the number of system calls.
Callback registration API skipped.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Also provide their prototypes in `soc.h`. This should help
readability, since some ROM functions, with their names as provided by
Espressif, have sometimes the same prefix as Zephyr APIs.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Configuring an open drain driver is required by the I2C driver,
but the GPIO driver didn't support setting the drive strength.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
PINMUX_FUNC_A is set to 0, which coincides with the GPIO function in
many of the ESP32 pins. Use PIN_FUNC_GPIO by default inside the
GPIO driver, however, so the correct function is always selected.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Masks for level- and edge-triggering levels are 0, so the following
check will be always true:
if ((flags & GPIO_INT_ACTIVE_LOW) == GPIO_INT_ACTIVE_LOW)
Invert the evaluation order, by checking the masks that are not 0
first.
Jira: ZEP-2557
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Esp-idf defines the BIT macro that is also defined in Zephyr's
misc/util.h. Fix the issue by including the esp-idf headers first, so
that a check in util.h won't redefine the macro if it's already
defined.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Per ZEP-1958, Phase 2 of adding CC3220sf LaunchXL support,
was to "deprecate the CC3200 launchxl support in Zephyr
(redundant to the CC3220)."
Effectively, the CC3220 SOC replaces the CC3200.
This patch removes the following:
* the imported CC3200 SDK
* CC3200 SOC, board, DTS files.
* adjusts other files where cc3200 was mentioned.
Also, it fixes explicit references to CC3200 in generic
CC32xx driver files.
Jira: ZEP-1958
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
This provides basic GPIO support, with interrupts, and the ability to
read and write to ports on a pin-by-pin basis.
Jira: ZEP-2286
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
patch fix the dead code issue reported by coverity static scan
for gpio driver of cc2650 TI SOC. CC2650_IOC_NO_PULL macro
is defined Zero, bitwise and with any value would result to
zero,because of which only false condition of if is evaluated
but not the true condition.
Jira ZEP-2469.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Change the common "init with 0" + "give" idiom to "init with 1". This
won't change the behavior or performance, but should decrease the size
ever so slightly.
This change has been performed mechanically with the following
Coccinelle script:
@@
expression SEM;
expression LIMIT;
expression TIMEOUT;
@@
- k_sem_init(SEM, 0, LIMIT);
- k_sem_give(SEM);
+ k_sem_init(SEM, 1, LIMIT);
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Following rework of pinmux driver for whole stm32 family,
remove call to stm32_get_pin_config which is no more
used.
Include dt-bindings stm32-pinctrl.h file to ensure coherency
between dts files and pinmux driver.
Due to change of "port" from enum to a series of define
(enum not accepted as dt binding), rework gpio_stm32_config
declaration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
patch fix the dead code issue reported by coverity static scan
for gpio driver of cc2650 TI SOC. GPIO_DS_DFLT_LOW macro
is defined Zero, bitwise and with any value would result to
zero,because of which only false condition of if is evaluated
but not the true condition.This is a fix for jira ZEP-2355.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Following migration of stm32f1xx series clock control driver to
STM32Cube LL API, cleanup stm32 code base in order to take into
account that this is the only clock driver available for stm32
family.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Before introduction of LL based clock control for stm32f1xx series,
prepare gpio driver to provide useful definition for new API
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This patch converts Atmel sam3x MCU series to use register
header files from Atmel Software Framework (ASF) library.
By using ASF different Atmel SAM MCU series can use common
device drivers.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
The files for the Arduino Due needed to be updated to use the new
configuration when the SoC moved from the atmel_sam3 directory to
the atmel_sam/sam3x directory.
Jira: ZEP-2067
Signed-off-by: Justin Watson <jwatson5@gmail.com>
Following activation of stm32 common clock driver for stm32f4 series
remove references to stm32f4 specific driver.
Change-Id: I372a0ea046007bcb34944d6b2b8880077583b1d3
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit enables STM32Cube LL based driver for stm32f4 series.
This generic driver provides a unified API to clock driver for all
stm32 series.
LL API allows driver to be lightweight and to keep genericity across
stm32 family to ease further devlopment and maintenance.
Change-Id: Ie31ae8f433313787f9c9eda77de41925721d54dd
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.
Jira: ZEP-2051
Change-Id: I08f51e2bfd475f6245771c1bd2df7ffc744c48c4
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This is a start to move away from the C99 {u}int{8,16,32,64}_t types to
Zephyr defined u{8,16,32,64}_t and s{8,16,32,64}_t. This allows Zephyr
to define the sized types in a consistent manor across all the
architectures we support and not conflict with what various compilers
and libc might do with regards to the C99 types.
We introduce <zephyr/types.h> as part of this and have it include
<stdint.h> for now until we transition all the code away from the C99
types.
We go with u{8,16,32,64}_t and s{8,16,32,64}_t as there are some
existing variables defined u8 & u16 as well as to be consistent with
Zephyr naming conventions.
Jira: ZEP-2051
Change-Id: I451fed0623b029d65866622e478225dfab2c0ca8
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fix doxygen comment typos used to generate API docs
Change-Id: I6fd5051c99bdcc731740c92001e525349c254d85
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
The MKL25Z soc do not support irqs in PORTB, PORTC and PORTE.
This is a patch to not enable irq if such ports are enabled.
Change-Id: I7b0b308504fcea47714fee8f2913baf336c4aa7d
Signed-off-by: Gustavo Denardin <gustavo.denardin@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Correct the way interrupts are enabled and disabled using the INTENSET
and INTENCLR registers, which ignore all 0s written to them and are both
positive registers.
Change-Id: I052548b0255d9d5ae36b2a708ed1968ae3ab1d06
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
It is envisaged that this will be used by SoC or board code to make
available fixed purpose memory-mapped i/o registers to the rest of the
system which normally expects to use GPIO devices, e.g. for driving chip
select lines, LEDs or reading button states.
As such, the driver code doesn't provide a kconfig based configuration
mechanism, instead SoC/board code can hard-wire the devices it wants
with something simple like:
GPIO_MMIO32_INIT(misc_reg1, "MISC1", 0x12345678, 0xffffffffu)
Then, for example, if bit N of the register at 0x12345678 is wired up as
an SPI device chip select line, the SPI driver could be configured to
use pin N of the "MISC1" GPIO driver and not need any other board
specific code.
Change-Id: Ib02fcbab73fcf9637e25834db060fb3108626f47
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Add support for GPIO banks I to K that can be found on some high-density
STM32F4 products.
Change-Id: I2cb65ed4d4a2282f7d17478cb1fcdd65dffe71b0
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The registration of each GPIO bank differs by only few details. These
differences can be factorized in order to create a generic registration
macro.
This has several advantages:
- Less code
- Easier to add new banks
- Less work to add support for new STM32 families
The diff stat speaks for it-self: 26 insertions(+), 92 deletions(-)
Change-Id: I674752fda5ee3caefb815ccf070a1b636b16cf85
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
These are more consistent with naming used by other ports (uppercase,
short), and some existing software relies on them to be exactly those.
This change is a follow up to the discussion on the Zephyr mailing
list, calling to establish consistent naming conventions for Zephyr
devices, and is a small step in that direction.
Change-Id: I013b0505b579c6337aeb6fbef2423216ca6cf046
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
To avoid glitches in the lines, set the line to the pull specified
before actually changing the line's direction (in/out) so that no
unexpected pulses are generated.
Change-id: I4fe133c5b82f2a1bfa473341612c2c7eca9027b8
Signed-off-by: Krzysztof Chruściński <Krzysztof.Chruscinski@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Some GPIO ports activation where missing since not used
on available soc/boards.
Since stm32 family increases, activation of these ports
should be made available.
Jira: ZEP-1551
Change-Id: I612d135b28ef255bc771599e33796671ff81d0ac
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When a GPIO pin is configured, the shim driver will first read the
current values in the controller registers to keep the other pins from
changing their configuration. After that it sets the bits for the
corresponding pin accordingly.
When the flag to enable interrupts is passed to the function, the
corresponding bits are all set properly, but no changes are made if
interrupts are not requested. This makes it impossible to disable
interrupts for a given pin once they've been enabled.
Fix it by always resetting the interrupt enabled bit when they have not
been requested. Other values can be left untouched as they won't have
any effect.
Jira: ZEP-1717
Change-Id: I30e97bb06d966291e23d0c66ddf39bce615c287b
Signed-off-by: Iván Briano <ivan.briano@intel.com>
After activation of cube based driver support on L4 and F3 series,
this commits performs the clean up of F3 and L4 relative code to
native clock control drivers.
Indirectly, it makes pwm driver supported de facto on F3 series
Change-Id: Idac17103a9b5ef6eab540719343cc8f5865f15fa
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
After introducing STM32Cube based clock control driver for
stm32 family, update GPIO driver to support it.
Once supported across the whole family, we clean up will be done.
Change-Id: If50cb580cb01dc1d38557e54f19a8260feaa504e
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit removes unnecessary CONFIG_SYS_POWER_DEEP_SLEEP protection
in shim drivers as QMSI 1.4 has introduced empty context save/restore
functions that can be called in Quark D2000, therefore keeping common
code at the shim driver level for Quark SE and D2000.
Change-Id: Ia2a466327f999668c6511c0193014e9151bff6ae
Signed-off-by: Juan Solano <juanx.solano.menacho@intel.com>
Several GPIO device drivers support only one of the two possible
access_op modes and return an errno error code for the mode they do
not support. Use the same errno code across all drivers.
Change-Id: Ic01ce9dee7fb2405d254c60cebee22053c803270
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Several GPIO drivers detect an out of range pin number and return an
errno error code. Use the same errno code across all drivers.
Change-Id: I0e2949432d6845d12c37064c78f9c228b8e8e45a
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Several gpio drivers consider GPIO_INT with GPIO_DIR_OUT to be illegal
and return an errno code. Use the same errno code across all drivers.
Change-Id: I1594df0cfdf96194685c83c34dff36261896f2de
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Implement the missing port read and write behaviour.
Change-Id: I0928379eddf81d806a0ae6b75a1ea2993c3a28ff
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Adjust the implementation of gpio_pin_read() to return 0 or 1 rather
than 0 or 2^pin. This ensures consistent behaviour with other gpio
device drivers, and conforms to the behaviour documented in gpio.h by
the previous patch.
Change-Id: Ia02aa68105a406f355d16a3f9b0550f948658483
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Extended the nRF5 GPIO driver to support configurable pin drive
strengths.
Change-Id: I59c42b8a69cc37b594c2388b892d3accd7b19807
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
The NXP copyright should not have 'Semiconductors, Inc' in it.
Change-Id: I6e290146d49bf22d1d40b7fa764bb53b6b122303
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The commit c90e4d063be0ff5f47df45ca8500eff8518c5d25 changed
line 216 in drivers/gpio/gpio_stm32.c:
-elif CONFIG_SOC_SERIES_STM32F4X
+#elif /* CONFIG_SOC_SERIES_STM32F4X */
This causes the following compiler error:
zephyr/drivers/gpio/gpio_stm32.c:218:39: error: #elif with no expression
#elif /* CONFIG_SOC_SERIES_STM32F4X */
^
Change-Id: Ie8b124931e333aa7860e6db22f5c259670e29833
Signed-off-by: Michael Scott <michael.scott@linaro.org>
Implementation includes adding some defines in the pinmux,
adjusting gpio driver to specific defines for STM32F3X family,
adding specific functionality in the F3X SoC definition.
Change-Id: I465c66eb93e7afb43166c4585c852e284b0d6e67
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
This is one of the series of patches that simplifies the driver
code by using the IS_ENABLED macro. This removes the need of the
const variable and the three wrapper functions on semaphore APIs.
Jira: ZEP-1251
Change-Id: I5102e8674663ddbfc65220de72c8b778a9ec726c
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
tested with blinky, button and disco apps
Change-Id: I4b520d4f3e42c97e4a723747ce4a6c67ca9f1d18
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
Now that we have a more generic mcux gpio driver that can be used across
multiple Kinetis SoCs, remove the specific k64 gpio driver.
Jira: ZEP-1394
Change-Id: I177f96a75e441b70c523e74e99f1b7a54eac6b0e
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new mcux gpio driver that can be used for k64 and other Kinetis
SoCs. This driver uses mcux CMSIS register accesses to the GPIO and PORT
modules. Some of the logic from the k64 gpio driver was reused and
refactored (mainly flag parsing and callback handling).
Jira: ZEP-1394
Change-Id: If5e9390861c181ec555dce6569b14debb729526a
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Remove legacy option and use SYS_CLOCK_EXISTS where appropriate.
Change-Id: I3d524ea2776e638683f0196c0cc342359d5d810f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
drivers/gpio/gpio_pcal9535a.c defines a nano_timer,
but never uses it. So delete it.
gpio_sch.c uses a k_timer, but gpio_sch.h defines a
nano_timer. So change the variable poll_timer to
type k_timer.
Jira: ZEP-1525
Change-Id: I884e4703c1ace61da5be7d9c63e58e7c3bce7f68
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
replace include <nanokernel.h> with <kernel.h> everywhere and also fix
any remaining mentions of nanokernel.
Keep the legacy samples/tests as is.
Change-Id: Iac48447bd191e83f21a719c69dc26233216d08dc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The GPIO_INT_LEVEL value is zero so the mask assignement
is never executed. Using the bit complement GPIO_INT_EDGE
the proper mask is assigned
This issue was reported by Coverity
Coverity-CID: 151966
Change-Id: Iacfeb6466388023bd6123ba86280aa9ca15f34e4
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
The GPIO_INT_LEVEL and GPIO_INT_ACTIVE_LOW values are zero so the
statements are never executed then is better use the bit complement
masks
This issue was reported by Coverity
Coverity-CID: 157586
Change-Id: Ic8b20660a991dd3d0c71248f84c917e5ce5c3c7c
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
To support interrupt-based GPIO callbacks in the nRF5x series one needs
to use the GPIOTE module, which has a series of channels that can be
programmed to trigger interrupts on level changes.
This commit adds basic support for the GPIOTE module within the nRF5x
GPIO driver, as well as callback support in order for basic buttons and
switches to work.
Change-Id: I9ae600f894372ad42b09a18cc38a90fc29abb0df
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The pinmux configuration is done during board initialization.
This was validated using the following Zephyr apps:
- samples/basic/blinky
- samples/basic/disco
- samples/basic/button
All 4 GPIO ports are supported.
Change-Id: If8599a23c1d56cfd678a6e2e5339f7e093c6061a
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Move logging out of misc/ to its own subsystem. Anything related to
logging and any new logging features or backends could be added here
instead of the generic location in misc/ which is overcrowded with
options that are not related to eachother.
Jira: ZEP-1467
Change-Id: If6a3ea625c3a3562a7a61a0ba5fd7e6ca75518ba
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch enables the clock control interface into the ARM LTD
Beetle GPIO driver.
Jira: ZEP-1300
Change-Id: I576767b68a8e4aa965d34716528df3bb4e837d73
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Add the support for all the GPIO port of the L4.
Change-Id: Id365e17223cd5c49443df9fb6b96a3c4f204f523
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit replaces the nanokernel.h include by kernel.h.
Change-Id: Ib42fbf2d9f77a73c0831f569b3dbbfb342ea2e1d
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
This fixes an always false evaluation of the gpio I/O direction
This issue was reported by Coverity
Coverity-CID: 151978
Change-Id: I93ec3319a3f18d564c961a5cbd9dcc9c60efbeb7
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
The GPIO_INT_ACTIVE_LOW value is zero so the mask assignement is
never executed. Using the bit complement GPIO_INT_ACTIVE_HIGH the
proper mask is assigned
This issue was reported by Coverity
Coverity-CID: 151966
Change-Id: Ibc7d2e4c3ebee249b5ab9719f8177cc14c0d1d33
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
This fixes an always false evaluation of the gpio I/O direction
This issue was reported by Coverity (CID 150821).
Change-Id: I6c0e9fe405cbd3e35454a81754fa0b1c721691f0
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
This fixes an always false evaluation of the gpio I/O direction
This issue was reported by Coverity
Coverity-CID: 151833
Change-Id: Ie952d6f50c0383d5631325b69e8e8b234c67c4b8
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
This fixes an always false evaluation of the gpio I/O direction
This issue was reported by Coverity
Coverity-CID: 151834
Change-Id: I033e368b2e91d888f2e8a797490df757513c3906
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
This patch addresses the following issues:
* Aligns the Kconfig code style with Zephyr projects requirements.
* Removes redundant "depends on" from Kconfig.
* Adds static to the gpio_dw_isr declaration.
* Adds guards to the header files.
Change-Id: I1ae70868f0bda97891cbeb494e5efba1bd537aa1
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch addresses the following issues:
* Aligns the Kconfig code style with Zephyr projects requirements.
* Removes redundant "depends on" from Kconfig.
Change-Id: I4c8df0999f92a834d4023ce5856a2a6c39797c00
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch removes a redundant "depends on" from the gpio Kconfig for
nRF5X family.
Change-Id: I28ac15b58839e05f47ade81bef66a03a0a44bebd
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch addresses the following issues:
* Aligns the Kconfig code style with Zephyr projects requirements.
* Removes redundant "depends on" from Kconfig.
* Adds static to the gpio_sam3_init declaration.
Change-Id: If5c8a1822d6c116ea34d0f220f3e5fa359b6fa18
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Use unified kernel APIs and align syntax after function name changes.
Change-Id: I028f4faeaf33e28197d5f705063459188272027d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit updates the gpio_qmsi_ss driver by adding save/restore
context functionality for power management, using the corresponsing
QMSI APIs.
Jira: ZEP-665
Change-Id: I5d8b6050f5b099678b7e6d9144907ea2ce2dda4b
Signed-off-by: JuanX Solano Menacho <juanx.solano.menacho@intel.com>
The driver is currently used only by the ARM Beetle platform.
Jira: ZEP-1245
Change-Id: I6611edd7486a3c6d82d66a9a96c5d4860dad1539
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
It's unused anywhere and unlikely to be in the future.
Change-Id: I57926e91da7d31ef6ddda4f86e6dac103dbfa176
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit updates the gpio_qmsi driver by removing the temporary
Zephyr save/restore context implementation and using the new QMSI APIs.
Jira: ZEP-999
Change-Id: Ic7b80a8f86baa7a6be11c93bbdebb18a102b0221
Signed-off-by: JuanX Solano Menacho <juanx.solano.menacho@intel.com>
For AON peripherals on Quark SE C1000, an API is needed
to retrieve the interrupt status after wake up.
This enables the application to know the wake source before
enabling again the interrupts.
Add this API to the gpio as this is a wake event
on Quark SE C1000.
Jira: ZEP-1188
Change-Id: Icc4aa6617bf18402b7e5dc3aab779ec2964e1c5b
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
The GPIO and AON GPIO ports are available to both the x86 and ARC
cores, but the driver always assumed only the x86 at the time of
configuring interrupts.
Use the available macros to set the correct values independently of
which core it's being built for.
Jira: ZEP-1030
Change-Id: I310afcc48780fbe1cac9dc3368a6de11bd797fda
Signed-off-by: Iván Briano <ivan.briano@intel.com>
The SoC level peripherals are accesible by both cores, while the SS
ones are only available to the sensor subsystem. Since the ARC core can
make use of both drivers at the same time, we need to be able to
differentiate their configuration values somehow.
Also disable the SoC GPIO for the ARC by default, as it still needs
more changes to be usable.
Jira: ZEP-1030
Change-Id: Ic5415c404ecd32a3e560467b6f5eaa873a515d72
Signed-off-by: Iván Briano <ivan.briano@intel.com>
The callback from the QMSI driver now can take a data pointer to pass
to the given function, so use that to pass the device to our callback
instead of defining one function for each supported port.
Change-Id: I82d863314e0443b7c4a12d4a9ad763b9634ca8e2
Signed-off-by: Iván Briano <ivan.briano@intel.com>
Update the QMSI drop we maintain in Zephyr, and fix the build where
needed:
- QM_SCSS_INT is renamed to QM_INTERRUPT_ROUTER;
- every member of QM_INTERRUPT_ROUTER was renamed as well;
- QM_IRQ_* renamed too, mostly added _INT at the end;
- some isr functions were renamed to keep their names consistent;
- build for x86 needs to define QM_LAKEMONT, as QM_SENSOR was for ARC.
Change-Id: I459029ca0d373f6c831e2bb8ebd52402a55994d1
Signed-off-by: Iván Briano <ivan.briano@intel.com>
Implements MCU-specific GPIO input interrupt integration. Added
definition of System configuration controller as well as its needed by
the GPIO code.
The SYSCFG controller is used for system-specific configuration such as:
- remap the type of memory accessible at address 0x00000000
- manage the external interrupt line connection to GPIOs
- configure the I/O compensation cell
Change-Id: Id2ebfbd1b21e77be76406d1cd6cd5d4989e9e2fa
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
STM32F4 requires the alternative function config to be set, so just
initialize that as part of the gpio configure call.
Change-Id: I33a4a8efec59c5ebe7dc3f3580f0dd2bf7ded7f4
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
