Commit graph

737 commits

Author SHA1 Message Date
Peter Bigot
5e2b24a5e4 treewide: use full path to led/ht16k33.h header
The build infrastructure should not be adding the drivers subdirectory
to the include path.  Fix the legacy uses that depended on that
addition.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-01-26 17:52:12 +01:00
Peter Bigot
5e470ec3bf treewide: use full path to gpio/gpio_mmio32.h header
The build infrastructure should not be adding the drivers subdirectory
to the include path.  Fix the legacy uses that depended on that
addition.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-01-26 17:52:12 +01:00
Peter Bigot
0b0d2e640b treewide: use full path to clock_control/stm32_clock_control.h header
The build infrastructure should not be adding the drivers subdirectory
to the include path.  Fix the legacy uses that depended on that
addition.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-01-26 17:52:12 +01:00
Peter Bigot
4147188bbb treewide: use full path to clock_control/arm_clock_control.h header
The build infrastructure should not be adding the drivers subdirectory
to the include path.  Fix the legacy uses that depended on that
addition.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-01-26 17:52:12 +01:00
Peter Bigot
19381a7e12 treewide: use full path to adc/lmp90xxx.h header
The build infrastructure should not be adding the drivers subdirectory
to the include path.  Fix the legacy uses that depended on that
addition.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-01-26 17:52:12 +01:00
Kumar Gala
b1602c8e39 arm: Removed support for CC2650
The SoC, driver, and board support for the CC2650 and CC2650 Sensortag
aren't currently supported and we are removing them as such.  If anyone
is interesting in supporting this platform we can easily recovery it
from git.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-01-18 09:27:55 -06:00
Maureen Helm
9e14543c19 drivers: gpio: Refactor mcux igpio driver to use generated dts macros
Refactors the mcux igpio driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-14 11:10:27 -05:00
Ryan QIAN
df12b9ee7f driver: gpio: gpio_mcux_igpio: check presence of IRQ macro first
- Check presence of GPIO IRQ related macros before enabling IRQ

Signed-off-by: Ryan QIAN <jianghao.qian@nxp.com>
2020-01-09 16:29:22 -06:00
Henrik Brix Andersen
bc2113bd46 drivers: adc: add LMP90xxx ADC driver with GPIO
Add driver for the Texas Instruments LMP90xxx series of multi-channel,
low-power 16-/24-bit sensor analog frontends (AFEs).

The functionality is split into two drivers; an ADC driver and a GPIO
driver.

Tested with LMP90080 and LMP90100.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-09 17:27:52 +01:00
Tomasz Bursztyka
9abc0e2efd include/drivers: Move 2 specific intc headers into public location
sam0 and stm32 specific interrupt controller headers are meant to be
public, and as such should be found in
include/drivers/interrupt_controller and not in
drivers/interrupt_controllers.

Fixing documentation issues as well.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-12-18 21:49:46 +01:00
Tomasz Bursztyka
c30600d4ab drivers/interrupt_controller: Adopt file naming as other drivers
Pattern being <domain>_<model>.<c/h>.
Here interrupt_controller as a domain would be far too long so
shortening it to "intc", as DTS does actually.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-12-18 21:49:46 +01:00
Ulf Magnusson
984bfae831 global: Remove leading/trailing blank lines in files
Remove leading/trailing blank lines in .c, .h, .py, .rst, .yml, and
.yaml files.

Will avoid failures with the new CI test in
https://github.com/zephyrproject-rtos/ci-tools/pull/112, though it only
checks changed files.

Move the 'target-notes' target in boards/xtensa/odroid_go/doc/index.rst
to get rid of the trailing blank line there. It was probably misplaced.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-11 19:17:27 +01:00
Piotr Mienkowski
8f0aa32ad5 soc: gecko: Enable SWO output during SoC initialization
Enable SWO debug output during system initialization and not as part of
GPIO driver initialization. After the modification the logger output
becomes available earlier during the boot process. Also, it's not
necessary anymore to build full GPIO driver only to enable SWO. This may
be critical when building small images.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-11-19 13:56:06 -05:00
Christian Taedcke
5ddc46e477 gpio: silabs gecko: Add support for more ports
The gecko gpio driver can now utilize ports a to k.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2019-11-13 12:05:48 -06:00
Christian Taedcke
0ae98c1caf gpio: silabs gecko: Use macro for port initialization
This removes a lot of copy-and-paste.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2019-11-13 12:05:48 -06:00
Marcin Niestroj
dfda0cb114 gpio: stm32: support disabling and reenabling interrupts on gpio pin
Up to now interrupts could be only configured once, with no way to
disable them in runtime.

Allow interrupts to be disabled in runtime and then properly reenabled
on user request. This allows to ignore interrupts when software is not
expecting them.

The improvement over previously reverted patch [1] is that we disable
interrupts only when we configure port for which interrupt line was
previously selected. This for example prevents to disable interrupts
line 2 in case PA2 was previously configured as interrupt source, but we
are currently configuring PB2 as output.

[1] 0951ce2d34 ("gpio: stm32: support disabling and reenabling
  interrupts on pin")

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2019-11-13 12:05:48 -06:00
Marcin Niestroj
7edcbedc70 gpio: stm32: split helper functions from gpio_stm32_enable_int()
This patch doesn't change functionality, but is only related to improved
readability and reusability.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2019-11-13 12:05:48 -06:00
Marcin Niestroj
09a57a5e81 gpio: stm32: statify gpio_stm32_enable_int()
This allows compiler to inline function body and reduce overall code
size.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2019-11-13 12:05:48 -06:00
Erwan Gouriou
dd0d567e8b drivers/gpio: stm32: Rework configure function exit for dual core
With dual core handling introduction, we now need to take care to
always release lock before exiting function.
Rework gpio_stm32_config to take this into account.
Additionally, since ENOSYS usage is resevred to system calls
handling, replace with EIO.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-11-13 12:05:48 -06:00
Peter A. Bigot
7dca60dfcb drivers: gpio: fix sifive interrupt management
The translation to encoded multi-level interrupts failed to account
for the GPIO interrupt number being encoded in at bit position 8,
and being offset by 1 in the base encoding.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-11-12 07:08:18 -06:00
Andrzej Głąbek
b1d5eed262 drivers: nrfx: Update implementations after switching to nrfx 2.0.0
Update calls to nrfx HAL functions to reflect API changes introduced in
nrfx 2.0.0. All these functions are now called with the first parameter
pointing to the structure of registers of the relevant peripheral.
Also a few functions got renamed:
- nrf_gpiote_int_is_enabled to nrf_gpiote_int_enable_check
- nrf_gpiote_event_is_set to nrf_gpiote_event_check
- nrf_rng_event_get to nrf_rng_event_check
- nrf_rng_int_get to nrf_rng_int_enable_check
- nrf_rtc_event_pending to nrf_rtc_event_check
- nrf_rtc_int_is_enabled to nrf_rtc_int_enable_check
- nrf_timer_cc_read to nrf_timer_cc_get
- nrf_timer_cc_write to nrf_timer_cc_set

Default configuration values were removed from nrfx_config files,
so the drivers pwm_nrfx and spi_nrfx_spis no longer can use those.

Function nrfx_pwm_init() now takes one more parameter - context pointer
that is passed to the event handler, not used in the pwm_nrfx driver.

HALs for UART and UARTE now allow configuration of the parity type
and the number of stop bits, for SoCs that provide the corresponding
registers.

Signed-off-by: Karol Lasończyk <karol.lasonczyk@nordicsemi.no>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2019-11-08 14:54:12 +01:00
Benjamin Valentin
224174bc99 gpio: sam0: provide PORT_PMUX_PMUXE_A_Val define
SAMD5x/SAME5x header files do not provide this define anymore.
On SAMD2x it was 0, this is still valid.

Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
2019-11-06 17:49:28 -08:00
Benjamin Valentin
82ec48b471 gpio: sam0: Add support for PORTD
Some devices like SAME54 have an additional GPIO bank.

Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2019-11-06 17:49:28 -08:00
Anas Nashif
7984f6c363 drivers: gpio: remove altera gpio driver
Remove unsupported driver.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-11-06 10:56:41 -05:00
Ulf Magnusson
bd6e04411e kconfig: Clean up header comments and make them consistent
Use this short header style in all Kconfig files:

    # <description>

    # <copyright>
    # <license>

    ...

Also change all <description>s from

    # Kconfig[.extension] - Foo-related options

to just

    # Foo-related options

It's clear enough that it's about Kconfig.

The <description> cleanup was done with this command, along with some
manual cleanup (big letter at the start, etc.)

    git ls-files '*Kconfig*' | \
        xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /'

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-04 17:31:27 -05:00
Ulf Magnusson
975de21858 kconfig: Global whitespace/consistency cleanup
Clean up space errors and use a consistent style throughout the Kconfig
files. This makes reading the Kconfig files more distraction-free, helps
with grepping, and encourages the same style getting copied around
everywhere (meaning another pass hopefully won't be needed).

Go for the most common style:

 - Indent properties with a single tab, including for choices.

   Properties on choices work exactly the same syntactically as
   properties on symbols, so not sure how the no-indentation thing
   happened.

 - Indent help texts with a tab followed by two spaces

 - Put a space between 'config' and the symbol name, not a tab. This
   also helps when grepping for definitions.

 - Do '# A comment' instead of '#A comment'

I tweaked Kconfiglib a bit to find most of the stuff.

Some help texts were reflowed to 79 columns with 'gq' in Vim as well,
though not all, because I was afraid I'd accidentally mess up
formatting.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-01 15:53:23 +01:00
Kumar Gala
48e946db21 gpio: sx1509b: remove non-DTS support
Now that all I2C bus drivers support DTS we can remove the non-DTS
driver support.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-10-23 15:34:28 -05:00
Ulf Magnusson
677f1e6db9 kconfig: Turn pointless/confusing 'menuconfig's into 'config's
Defining a symbol with 'menuconfig' just tells the menuconfig to display
any dependent symbols that immediately follow it in a separate menu.
'menuconfig' has no effect on symbol values.

Making a symbol that doesn't have any dependent symbols after it a
'menuconfig' should be avoided, because then you end up with an empty
menu, which is shown as e.g.

    [*] Enable foo ---

This is how it would be shown if there were children but they all
happened to be invisible as well.

With a regular 'config', it turns into

    [*] Enable foo

Change all pointless 'menuconfig's to 'config's.

See the section on 'menuconfig' on the Kconfig - Tips and Best Practices
page as well.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-10-22 13:53:06 -05:00
Richard Osterloh
f7bad922f0 drivers: gpio: Add STM32G4X gpio support
Add GPIO driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Jose Alberto Meza
4c095b5cbc drivers: gpio: xec: Ensure GPIO input is enabled
All GPIOs except VCI pins come in default GPIO mode and  input disabled
Need to explicitly enable input apart from setting direction.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2019-09-30 13:42:58 -07:00
Yannis Damigos
efec7f73b7 dts: esp32: Add GPIO support in DT
Add GPIO support in DT

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-09-25 17:39:42 +02:00
Anas Nashif
8c2a63ab7d drivers: gpio: remove qmsi gpio driver
No users of this driver after dropping quark platforms.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-09-18 11:06:18 -05:00
Anas Nashif
6bdfe5dc16 drivers: gpio: remove sch gpio driver
Was used on galileo which was removed.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-09-18 11:06:18 -05:00
Piotr Mienkowski
f98084131e drivers: clean up flags in gpio_intel_apl driver
Modify the way we test for flags as a precursor to the new GPIO API.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-09-18 13:28:58 +08:00
Peter A. Bigot
dc553f8fde drivers: gpio: fix misuse of u8_t where bool is intended
GPIO configuration flags will move and some that used to be in the low
8 bits are now higher, resulting in implicit constant conversion
overflows.  Use a boolean data type to hold boolean values.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-09-18 13:28:58 +08:00
Erwan Gouriou
c9dcf37e6c Revert "gpio: stm32: support disabling and reenabling interrupts on pin"
This reverts commit 0951ce2d34.

This change introduces regression on GPIO interrupts handling
when several GPIOs are configured.

Fixes #19177

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-09-16 05:44:15 -05:00
Piotr Mienkowski
b914ba8831 drivers: remove gpio_atmel_sam3 driver
The gpio_atmel_sam3 is no longer required since the gpio_sam, common
SAM family GPIO driver, provides improved functionality.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-09-12 13:25:30 -05:00
Piotr Mienkowski
17b3ead21a drivers: fix #ifdef in gpio_sam driver
- prefix SOC_SERIES_ defines with CONFIG_
- exclude pull down configuration on sam3x series

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-09-12 13:25:30 -05:00
Marcin Niestroj
0951ce2d34 gpio: stm32: support disabling and reenabling interrupts on pin
Up to now interrupts could be only configured once, with no way to
disable them in runtime.

Allow interrupts to be disabled in runtime and then properly reenabled
on user request. This allows to ignore interrupts when software is not
expecting them.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2019-09-12 08:41:44 -05:00
Andy Ross
346cce31d8 kernel: Port remaining buildable syscalls to new API
These calls are buildable on common sanitycheck platforms, but are not
invoked at runtime in any tests accessible to CI.  The changes are
mostly mechanical, so the risk is low, but this commit is separated
from the main API change to allow for more careful review.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-09-12 11:31:50 +08:00
Chris Schramm
ed9c1ce55d drivers/gpio: pcal9535a: fix i2c write
writing to both port registers of pcal9535a
was broken

fixes #17625

Signed-off-by: Chris Schramm <schramm@makaio.com>
2019-09-10 15:09:53 -05:00
Kumar Gala
95f78bcacf interrupt: Convert RISC-V plic to use multi-level irq support
Utilize the multi-level irq infrastructure and replace custom handling
for PLIC on riscv-privilege SoCs.  The old code offset IRQs in drivers
and various places with RISCV_MAX_GENERIC_IRQ.  Instead utilize Zephyr's
encoded IRQ and replace offsets in drivers with the IRQ define from DTS.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-10 07:34:57 -05:00
Charles E. Youse
68f45fd6d4 drivers/gpio/gpio_dw: remove support for legacy PCI interface
Only Quark SoCs used this IP block hanging off a PCI bus, and the PCI
support is written for the deprecated legacy PCI subsystem, so remove.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-08 22:09:10 -04:00
Marcin Niestroj
c62b57fbd4 gpio: stm32: fix build for stm32l0x with no GPIOH
Some smaller stm32l0x MCUs, such as stm32l011x, do not have GPIOH
port. Fix build for those by checking LL_SYSCFG_EXTI_PORTH macro.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2019-08-26 09:48:54 -05:00
Anas Nashif
ab9c528734 gpio: remove unused qmsi driver
This driver was used by the sensor subsystem in Arudino 101. Remove as
the board was dropped.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-08-21 09:52:01 -04:00
Andrzej Głąbek
c542a4c56f drivers: gpio_nrfx: Correct the way the callbacks are fired
Add additional masking of the pins with fired callback triggers
against the currently enabled callbacks, in order to not call
handlers for callbacks that got disabled in some other callback
handlers that were called in the same ISR execution.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2019-08-14 14:49:55 +02:00
Nicolas Pitre
75bf3c5368 riscv: freedom: rename RISCV32 to RISCV
This code is common to 32- and 64-bit builds.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-08 00:29:24 -04:00
Nicolas Pitre
e5981f2b71 drivers: sifiv: make them 64-bit compatible
Make those drivers compatible with a 64-bit build.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-08 00:29:24 -04:00
Ulf Magnusson
d1dff7129b drivers: gpio: Remove redundant GPIO dep. from GPIO_HT16K33
GPIO_HT16K33 is defined in drivers/gpio/Kconfig.ht16k33, which is
source'd within an 'if GPIO' in drivers/gpio/Kconfig.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-08-07 08:14:10 -05:00
Findlay Feng
4b18a079d9 drivers: gpio: add stm32f1x SWJ configuration
Add the serial wire JTAG configuration of the stm32f1x family.
Before gpio is initialized, you can choose to turn off the debug pin to
make the used pins available.

Signed-off-by: Findlay Feng <i@fengch.me>
2019-08-05 13:22:34 +02:00
Tomasz Bursztyka
e555ddd9e6 drivers/gpio: Adding missing braces for XEC driver
Even one liner if () statement should have braces.

Fixing parameter indentation as well.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-08-02 23:24:34 +03:00
Kumar Gala
4e7863dc41 dts: Make instance defines consistent
We generated a define for each instance to convey its existance of the
form:
	#define DT_<COMPAT>_<INSTANCE> 1

However we renamed all other instance defines to be of the form
DT_INST_<INSTANCE>_<FOO>.  To make things consistent we now generate a
define of the form:

	#define DT_INST_<INSTANCE>_<COMPAT> 1

We also now deprecate the DT_<COMPAT>_<INSTANCE> form and fixup all uses
to use the new form.

Fixes: #17650

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-07-30 17:10:31 -05:00
Anas Nashif
578ae40761 boards: remove quarl_se_c1000
This board and SoC was discontinued some time ago and is currently not
maintained in the zephyr tree.
Remove all associated configurations and variants from the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-07-29 21:30:25 -07:00
Erwan Gouriou
b44f0eacd5 drivers/gpio: stm32h7: Don't use HSEM_CR_COREID_CURRENT as process id
HSEM_CR_COREID_CURRENT was used as process number parameter in
LL_HSEM_ReleaseLock function. While this is working, this
define should not be used in this context.
Also, process number parameter is actually proposed in case of HSEM
use in inter-process context but is not required for inter-core
resource lock. Replace HSEM_CR_COREID_CURRENT with 0.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-26 11:25:05 -04:00
Francois Ramu
dd3ee06af7 drivers: gpio: Add STM32G0X pinmux support
Add gpio support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>

# Conflicts:
#	drivers/gpio/gpio_stm32.h
2019-07-05 10:35:55 -05:00
Francois Ramu
9b2025c891 drivers: pinmux: Add STM32G0X pinmux support
Add pinmux support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>

# Conflicts:
#	drivers/pinmux/stm32/pinmux_stm32.h
2019-07-05 10:35:55 -05:00
Erwan Gouriou
0914f1031d drivers/gpio: stm32: Add semaphore on gpio_configure
Protect gpio_configure function in dual core context.
This operation is not needed for other fuctions of the api:
* init
* read
* write

Protecting gpio_configure also protects access to
interrupt_controller IP.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
Erwan Gouriou
d185ec4cff drivers/gpio: Add support on STM32H7 series
Add GPIO support on STM32H7.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
Anas Nashif
a2fd7d70ec cleanup: include/: move misc/util.h to sys/util.h
move misc/util.h to sys/util.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
d222553931 cleanup: include/: move misc/speculation.h to sys/speculation.h
move misc/speculation.h to sys/speculation.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
536dd5a71f cleanup: include/: move misc/slist.h to sys/slist.h
move misc/slist.h to sys/slist.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
9ab2a56751 cleanup: include/: move misc/printk.h to sys/printk.h
move misc/printk.h to sys/printk.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
5d001f3e41 cleanup: include/: move misc/byteorder.h to sys/byteorder.h
move misc/byteorder.h to sys/byteorder.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
5eb90ec169 cleanup: include/: move misc/__assert.h to sys/__assert.h
move misc/__assert.h to sys/__assert.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
a8167ab17d cleanup: include/: move pinmux.h to drivers/pinmux.h
move pinmux.h to drivers/pinmux.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
8f692c7d38 cleanup: include/: move i2c.h to drivers/i2c.h
move i2c.h to drivers/i2c.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
6aa9c3a68f cleanup: include/: move gpio.h to drivers/gpio.h
move gpio.h to drivers/gpio.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
17ddd1714c cleanup: include/: move clock_control.h to drivers/clock_control.h
move clock_control.h to drivers/clock_control.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
ef281c4237 cleanup: include/: move sys_io.h to sys/sys_io.h
move sys_io.h to sys/sys_io.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
190e368275 cleanup: include/: move power.h to power/power.h
move power.h to power/power.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
43a49335f4 include: move interrupt controller headers to interrupt_controller/
Move internal and architecture specific headers from include/drivers to
subfolder for interrupt_controller:

include/drivers/interrupt_controller/

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-25 15:27:00 -04:00
Charles E. Youse
57b46bbc85 soc/x86/intel_quark: remove support for Quark D2000 SoC
Removed Quark D2000 SoC files and first-order related DT bindings.

A few config options have been moved from the CONFIG_* space to
the DT_* space, as they were defined in the D2000 Kconfig files
and "leaked" into the other Quark trees.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-25 08:06:43 -04:00
Kumar Gala
f20d2b6f41 drivers: rv32m1: remove bogus IRQ_PRI related defines
The defines related to IRQ priority don't exist and aren't used.  So
just pass 0 to IRQ_CONNECT for the priority field.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-24 07:22:27 -04:00
Kumar Gala
dba65ce47c drivers: Update DT IRQ alias defines
The defines should have had a _0 on them, now that we generate the
proper defines, fixup the cases that used that old scheme.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-21 07:53:05 -05:00
Anas Nashif
f2cb20c772 docs: fix misspelling across the tree
Found a few annoying typos and figured I better run script and
fix anything it can find, here are the results...

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-19 15:34:13 -05:00
David B. Kinder
2aebc980e2 doc: fix Kconfig misspellings
Fix misspellings in Kconfig files missed during regular reviews.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-06-18 15:07:52 -04:00
Kumar Gala
a2693975d7 dts: Convert from DT_<COMPAT>_<INSTANCE>_<PROP> to DT_INST...
Change code from using now deprecated DT_<COMPAT>_<INSTANCE>_<PROP>
defines to using DT_INST_<INSTANCE>_<COMPAT>_<PROP>.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-14 08:02:15 -05:00
Anas Nashif
4c32258606 style: add braces around if/while statements
Per guidelines, all statements should have braces around them. We do not
have a CI check for this, so a few went in unnoticed.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-06 15:20:21 +02:00
Maciej Zagrabski
6a6264e497 drivers: stm32: Fix disabling EXTI subsystem
The compiler and linker was generating errors after
disabling `CONFIG_EXTI_STM32` due to inconsistency
in `interrupt_controller/CMakeLists.txt`
and not considering this option in gpio implementation.

Signed-off-by: Maciej Zagrabski <maciej.zagrabski@grinn-global.com>
2019-06-04 09:22:13 -04:00
Nathaniel Graff
3093f5cd2f drivers/gpio: Remove DTS fixups for SiFive GPIO
Change the DT macros used by the SiFive GPIO driver so that fixups
are no longer required.

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2019-05-30 18:40:26 -04:00
Ulf Magnusson
ea5866e5f0 kconfig: Use 'CONFIG_FOO_*' in #endif comments to avoid CI failures
https://github.com/zephyrproject-rtos/ci-tools/pull/65 tweaks the check
for references to undefined Kconfig symbol to whitelist anything on the
form 'CONFIG_FOO_*' (or 'CONFIG_FOO_*_...'). This is meant for #endif
comments that talk about many related symbols.

Fix two existing #endif comments to use that format, so that some
entries can be removed from the whitelist in the CI check.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-05-18 07:20:44 -05:00
Brett Witherspoon
61fb6b468d drivers: gpio_c13xx_cc26xx: fix control flow issue
The value of GPIO_INT_ACTIVE_LOW is 0, so the bit checking if statement
is never executed. Use GPIO_INT_ACTIVE_HIGH when checking this bit.

Fixes #16162

Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
2019-05-16 07:09:58 -05:00
Francisco Munoz
0cb238127d drivers: gpio: Introduce microchip gpio driver
Adds a new xec gpio driver that can be used with the
XEC MCUs. This driver modifies the PCR1 register in order
to configure gpio settings. Interrupts are triggered by the EC
interrupt aggregator block.

Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
2019-05-08 16:39:54 -07:00
Henrik Brix Andersen
98cecb3681 drivers: gpio: ht16k33: add GPIO driver for Holtek HT16K33 LED driver
The HT16K33 is a memory mapping, multifunction LED controller
driver. The controller supports up to 128 LEDs (up to 16 rows and 8
commons) and matrix key scan circuit of up to 13x3 keys.

This commit adds support for the keyscan functionality of the HT16K33.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2019-05-07 22:33:06 -04:00
Derek Hageman
4462069d74 drivers: gpio: sam0: Add interrupt support
This adds interrupt support to the SAM0 GPIO driver.  This is heavily
inspired by @nzmichaelh work in #5715.  The primary difference
from that implementation is that here the External Interrupt
Controller (EIC) is separated out into an interrupt controller driver
that is less tightly coupled to the GPIO API.  Instead it implements
more of a conversion from the EIC's own odd multiplexing to a more
traditional port and pin mask IRQ-like callback.  Unfortunately,
through the EIC on the SAMD2x are relatively well behaved
in terms of pin to EIC line mappings, other chips that share the
peripheral interface are not.  So the EIC driver implements a
per-line lookup to the pin and port pair using definitions extracted
from the ASF headers.

The EIC driver still makes some assumptions about how it will be used:
mostly it assumes exactly one callback per port.  This should be fine
as the only intended user is the GPIO driver itself.

This has been tested with some simple programs and with
tests/drivers/gpio/gpio_basic_api on a SAMD21 breakout and an
adafruit_trinket_m0 board.

Signed-off-by: Derek Hageman <hageman@inthat.cloud>
2019-05-07 08:43:56 -04:00
Brett Witherspoon
f101b77db2 soc: ti_simplelink: add support for TI CC13x2 / CC26x2 series
Add initial support for the TI CC13x2 / CC26x2 series with the CC2652R
and CC1352R SoCs. The UART and GPIO peripherals are supported. Drivers
use the driverlib HAL from the TI CC13x2 / CC26x2 SDK.

Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
2019-05-04 09:13:43 -05:00
Derek Hageman
37a6a7ea68 drivers: gpio: sam0: Remove defines from dts_fixup.h
Move SAM0 GPIO to use the raw defines generated from the DTS
parsing.

Signed-off-by: Derek Hageman <hageman@inthat.cloud>
2019-05-03 08:46:57 -05:00
Benjamin Valentin
770233dd10 soc: atmel: add SAMR21
Adds Atmel SAMR21 soc which is based on SAMD21, but with a AT86RF233
radio connected internally via SPI.

The AT86RF233 is not yet supprted by Zephyr at this point.

This code is very much copy & paste from atmel_sam0/samd21

Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
2019-04-28 13:25:35 -04:00
Yaël Boutreux
b4b7020b03 gpio: Add stm32mp157c_dk2 board support
Add support for stm32mp1x GPIO with Zephyr GPIO driver

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-26 02:56:20 -07:00
Yaël Boutreux
524c625579 drivers: gpio: stm32: Indentation and cleanup
Cleaning up indentation of stm32 drivers

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-26 02:56:20 -07:00
Charles E. Youse
6fc655351c drivers/gpio/gpio_intel_apl: remove dependency on shared interrupts
The GPIO driver for the Intel Apollo Lake has so many pins it has to
export ten devices to shoehorn its one device into the GPIO API. The
current implementation uses the shared IRQ driver because these
pseudodevices all share one IRQ. However, since the GPIO driver is
aware of all the possible interrupt sources, it's smaller and faster
(and not even messy) to handle it internally, so this patch eliminates
the dependency on the shared IRQ driver.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-04-23 09:10:00 -07:00
Manivannan Sadhasivam
1eb6177e9b drivers: gpio: Add STM32L1X GPIO support
Add GPIO driver support for STM32L1X SoC series.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Benjamin Valentin
4d9486fc22 soc: sam0: Enable generic peripheral selection
Make sure that when e.g. CONFIG_SERIAL is set, CONFIG_UART_SAM0 is
selected automatically when the sam0 SoC family is used.

Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2019-04-19 14:37:17 -05:00
Erwan Gouriou
eb51ea00b0 soc/arm/st_stm32: stm32wb: Add gpio support
Add GPIO support to stm32wb series.
Only ABCDE and H ports are available for now on this series.
Accordingly, update series dtsi file.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-04-19 14:19:44 -05:00
Charles E. Youse
8905b0fe21 drivers/gpio_intel_apl.c: fix return value for gpio_pin_read()
gpio_intel_apl_read() should set *value to 1, not 2, when the
GPIO input is a logical high.

Fixes: #15499

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-04-17 22:24:48 -04:00
Song Qiang
3751275fb0 drivers: gpio: stm32: add ASCR configuration for L47x+
For STM32L47x/48x series devices, register ASCR should be configured to
connect analog switch of gpio lines to the ADC.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-04-17 16:25:28 -05:00
Henrik Brix Andersen
36ff55cba0 gpio: rv32m1: enable GPIO port clocks
Enable the clock for GPIO ports on the RV32M1 SoC before attempting to
access the port controller registers.

Fixes: #15339

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2019-04-17 10:40:37 -05:00
Anas Nashif
3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Patrik Flykt
97b3bd11a7 drivers: Rename reserved function names
Rename reserved function names in drivers/ subdirectory. Update
function macros concatenatenating function names with '##'. As
there is a conflict between the existing gpio_sch_manage_callback()
and _gpio_sch_manage_callback() names, leave the latter unmodified.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-04-03 17:31:00 -04:00
Patrik Flykt
21358baa72 all: Update unsigend 'U' suffix due to multiplication
As the multiplication rule is updated, new unsigned suffixes
are added in the code.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-28 17:15:58 -05:00
Patrik Flykt
24d71431e9 all: Add 'U' suffix when using unsigned variables
Add a 'U' suffix to values when computing and comparing against
unsigned variables.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-28 17:15:58 -05:00
Ramakrishna Pallala
e1639b5345 device: Extend device_set_power_state API to support async requests
The existing device_set_power_state() API works only in synchronous
mode and this is not desirable for devices(ex: Gyro) which take
longer time (few 100 mSec) to suspend/resume.

To support async mode, a new callback argument is added to the API.
The device drivers can asynchronously suspend/resume and call the
callback function upon completion of the async request.

This commit adds the missing callback parameter to all the drivers
to make it compliant with the new API.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2019-03-14 14:26:15 +01:00
Patrik Flykt
4344e27c26 all: Update reserved function names
Update reserved function names starting with one underscore, replacing
them as follows:
   '_k_' with 'z_'
   '_K_' with 'Z_'
   '_handler_' with 'z_handl_'
   '_Cstart' with 'z_cstart'
   '_Swap' with 'z_swap'

This renaming is done on both global and those static function names
in kernel/include and include/. Other static function names in kernel/
are renamed by removing the leading underscore. Other function names
not starting with any prefix listed above are renamed starting with
a 'z_' or 'Z_' prefix.

Function names starting with two or three leading underscores are not
automatcally renamed since these names will collide with the variants
with two or three leading underscores.

Various generator scripts have also been updated as well as perf,
linker and usb files. These are
   drivers/serial/uart_handlers.c
   include/linker/kobject-text.ld
   kernel/include/syscall_handler.h
   scripts/gen_kobject_list.py
   scripts/gen_syscall_header.py

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-11 13:48:42 -04:00
Andrew Boie
15239a48c9 gpio_intel_apl: bounds sanitize pins
Avoid Spectre V1 exploits with insane pin values since
they are used to offset memory locations.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-03-11 09:54:04 -07:00
Kumar Gala
1ec85cf910 gpio: gpio_cmsdk_ahb: Return error for not supported flag
The code had GPIO_INT_DOUBLE_EDGE siliently ignored, instead lets run
-ENOTSUP so caller knows its not going to work.

Fixes: #12764

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-03-08 05:38:27 -06:00
Ulf Magnusson
e65f8ba1f2 kconfig: gpio: Remove lots of redundant GPIO dependencies
Most of these are from source'ing a file within an 'if GPIO', and then
adding another 'depends on GPIO' within it.

'if FOO' is just shorthand for adding 'depends on FOO' to each item
within the 'if'. There are no "conditional includes" in Kconfig, so
'if FOO' has no special meaning around a 'source'. Conditional includes
wouldn't be possible, because an 'if' condition could include (directly
or indirectly) forward references to symbols not defined yet.

Tip: When adding a symbol, check its dependencies in the menuconfig
('ninja menuconfig', then / to jump to the symbol). The menuconfig also
shows how the file with the symbol got included, so if you see
duplicated dependencies, it's easy to hunt down where they come from.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-07 20:28:04 -05:00
Song Qiang
c8a811bc58 drivers: gpio: sifive: cleanup irq initialzation code
Clean up irq initialization code with macro definitions.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-03-05 12:42:54 -05:00
Maureen Helm
0a5a61dd79 drivers: gpio: Fix build warnings in rv32m1 driver
Converts the rv32m1 gpio driver to use 'DT_' prefixed defines instead of
deprecated non-prefixed defines.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-03-05 08:18:52 -05:00
Daniel Leung
a9a3282ac2 gpio: gpio_dw: rename CONFIG_GPIO_DW_*_IRQ_SHARED_NAME to DT_*
These options were removed from kconfig in previous patch. So rename
the leftovers as shared_irq driver options are defined in DTS now.

Fix #13746

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-03-01 09:42:56 -08:00
Daniel Leung
1af5fa174b gpio: gpio_intel_apl: fix if condition leading to dead code
GPIO_INT_ACTIVE_LOW is 0 which means it cannot be simply AND-ed.
So fix the condition.

Fixes #13880

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-28 12:44:45 -08:00
Kumar Gala
34a2630141 drivers: gpio: sx1509b: convert to DT_<COMPAT>_<INSTANCE> defines
Convert sx1509b sensor driver to use new defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-27 10:19:30 -06:00
Maureen Helm
e5ee8035c7 drivers: gpio: Fix mcux driver to init successfully with no irq
Some mcux gpio instances do not have dedicated interrupt vectors and
therefore conditionalize out the IRQ_CONNECT() and irq_enable() calls
during driver initialization. The driver initialization incorrectly
returned an error in this case, when really it just has nothing to do.
The driver can still be used without interrupts, and the gpio configure
function returns an error if an application tries otherwise.

Commit a68120de6d introduced a check on
the init return value to prevent applications from using drivers that
fail to initialize. This in turn caused zephyr/samples/basic/threads to
assert on the frdm_kl25z board. Fix this by modifying the mcux gpio
driver to return success when there is no interrupt to connect.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-02-23 08:30:21 -06:00
Krzysztof Chruscinski
3605e48c44 shell: Modify subcommands to use SHELL_STATIC_SUBCMD_SET_CREATE
It is planned to deprecate SHELL_CREATE_STATIC_SUBCMD_SET macro
which is replaced by SHELL_STATIC_SUBCMD_SET_CREATE.

Additionally, removed irrelevant comments about alphabetical
ordering which is no longer needed.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2019-02-20 07:31:35 -05:00
Erwan Gouriou
5622efad98 drivers/gpio: stm32: Return errors on not supported config
Following configuration options are not supported by STM32
gpio driver:
-GPIO_INT_LEVEL
-GPIO_POL_INV
Return an error when one of these is requested.

Fixes #12766

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-12 09:44:02 -05:00
Kumar Gala
93a9e0b3fe gpio: mcux: Convert to use DT_ prefixed defines
The gpio mcux driver has been using non DT_ prefixed defines for DT
generated defines.  Switch to use DT_ prefixed ones as we want to
deprecated the non DT_ prefixed defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-08 16:03:17 -06:00
Daniel Leung
d9da0b07cd gpio: gpio_sch: fix check for interrupt trigger
The controller does not support trigger. However, the check for
this condition was incorrectly (as GPIO_INT_LEVEL is 0). So fix
it.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-07 22:47:11 -06:00
Peter A. Bigot
0a0e3cdea6 drivers: gpio: esp32: correct constant test for interrupt trigger
Interrupts default to trigger on level for historical reasons, so use of
GPIO_INT_LEVEL` as a mask results in a zero value.  Use a mask macro to
isolate the trigger configuration.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-02-07 22:46:37 -06:00
Daniel Leung
69d4d32acf gpio: gpio_sch: error when configure for level triggers
The GPIO controller only supports edge triggering according to
the descriptions of the associated registers. So errors out
when level trigger is requested. Also adds the option to do
double edges triggering as the controller supports this.

Fixes #12763

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-07 11:18:23 -06:00
Daniel Leung
f7a42a70f8 gpio: intel_apl: rework driver for pin_mask callback
To avoid confusion, callbacks using ordinal pin numbers
is going to be reverted. So the driver has to be re-worked
to expose multiple devices so each device has 32 pins.

Also fixes #12765

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-06 07:18:15 -05:00
Daniel Leung
7695a72e3c drivers/interrupt_controller: shared_irq: configure by device tree
This allows the shared_irq driver to be configured by device tree.
With previous implementation, only the board configuration can
override the IRQ trigger, as the trigger config is a "choice" rather
than "config". With this patch, the driver can be fully configued at
the SoC level.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-06 07:18:15 -05:00
Peter A. Bigot
d75495709d drivers: gpio: fix mis-use of slist API in callback processing
The iterator over registered callbacks failed to account for the
possibility that the callback would remove itself from the list.  If
this occurred any remaining callbacks would no longer be reachable from
the node.  Switch to the slist iterator that is safe for self-removal.

Note that the slist API remains unsafe for removal of subsequent nodes.
Even with the corrected code removal of the next callback registration
(cached in tmp) will result in it being called anyway, with the
remaining unremoved registrations not being called.  If the next
callback were removed and re-registered on a different device, the
callbacks would be invoked for the wrong device.

Resolve this by a documentation change describing the conditions under
which a change to callback registration from within a callback are
permitted.  Add a similar note regarding the effect of adding a
callback.  The current event invocation behavior for callbacks added
within an event is explicitly left unspecified, though in the current
slist implementation newly added callbacks will not be invoked until the
next event.

Closes #10186

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-02-05 12:33:25 -06:00
Anas Nashif
602b30bafe gpio_shell: use convenience macros
use shell_error and shell_print and fix return errors using errno.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-04 17:55:40 -05:00
Anas Nashif
a93651085e boards: remove pulpino board
This board is unmaintained and unsupported. It is not known to work and
has lots of conditional code across the tree that makes code
unmaintainable.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-01-31 22:47:18 -05:00
Maureen Helm
3c44137447 drivers: gpio: Validate pin number before indexing array in mcux drivers
Validates the gpio pin number before using it to index into a
memory-mapped register array. Otherwise, a user could send a high pin
number and cause an out-of-bounds access.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-01-31 03:13:15 -06:00
Kumar Gala
2cfefa5d42 gpio: mcux_igpio: Cleanup old CONFIG_ symbols
A number of CONFIG_ symbols should have been converted to DT_ defines
instead.  Clean that up for PORT2..PORT4.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-01-30 13:22:54 -06:00
Michael Scott
0f314ebdda gpio: RV32M1: introduce gpio driver / DT bindings
Add a GPIO driver.

Signed-off-by: Michael Scott <mike@foundries.io>
2019-01-25 11:59:46 -05:00
Tomasz Bursztyka
ea5d01b41c drivers/gpio: Act relevantly if GPIO_INT is an unsupported flag
Using right error code, and no need to populate callback related API
functions.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-01-25 11:24:29 -05:00
Tomasz Bursztyka
04d9d57a63 api/gpio: Controller may not support GPIO_INT at all
It's not an error if a driver does not implement callback related
function. Let's return -ENOTSUP relevantly.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-01-25 11:24:29 -05:00
Tomasz Bursztyka
064f5f0cef drivers/gpio: Manage callback addition/removal properly
It needs to verify if the callback was not already installed, and if so:
if is was in controller's list.
It should return an error in case the node is not found though it was
requested to be removed.
If already inserted, it will be silently removed but added again, to
avoid circular list as stated in the bug.

Fixes #11394

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-01-25 11:24:29 -05:00
Erwan Gouriou
14dcd13069 drivers/interrupt_controller: stm32: Complete driver factorization
Complete code factorization in stm32 exti drivers.
Add return value in case line is not implemented.
Except returned error code, refactor has been done iso-feature
compared to previous code. Hence error is reported only when
support was not available on previous series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-01-24 09:38:38 -06:00
Erwan Gouriou
94bf757d68 drivers/gpio: stm32: Fix gpio_stm32_configure
Behavior of function gpio_stm32_configure has been modified
during driver factorization. Various gpio settings (speed, mode, ..)
are applied conditionally while they used to be applied in sequence,
unconditionally before this change. As a consequence some
combinations of configurations are no more applied (like speed for
alternate mode). This of course has impact in some use cases.
Rework functions in order to apply settings unconditionally. Take
advantage of the change to reduce code size.

This change impacts all SoCs except F1 series.

Fixes #12544

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-01-23 04:03:30 -06:00
Harry Jiang
9614fb3011 drivers: stm32: fix the STM32F1 series gpio configuration
This patch fix the STM32F1 series gpio configuration issue
for the pin number large than 7.

Signed-off-by: Harry Jiang <explora26@gmail.com>
2019-01-22 12:25:51 -06:00
Varun Sharma
77c643a5a3 drivers: Modify drivers to use DEVICE_AND_API_INIT()
Modified drivers to use DEVICE_AND_API_INIT() instead of DEVICE_INIT()

This will make sure driver_api,is populated at build time and is exposed
to user space

Signed-off-by: Varun Sharma <varun.sharma@intel.com>
2019-01-15 10:39:34 -08:00
Song Qiang
2fb616efbe soc: arm: st_stm32: Using LL library to implement gpio functions
The original implementation of gpio functions access registers
directly. Using LL library can add a set of unifying access
functions for all series of stm32 for avoiding accessing low level
code, and improve readability.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-01-10 13:09:19 -06:00
Song Qiang
9612f9d840 soc: arm: st_stm32: Cleanup gpio function code.
All series STM32 have mostly the same GPIO architecture
and can share the same code for GPIO manipulation.
Functions of the external interrupt line control are also the same.
This patch extracts common code from them and put them into the 'common'
folder.

Functions of control GPIO of these series scattered in
soc/arm/st_stm32/stm32xx/ folders contain these functions:
stm32_gpio_flags_to_conf(), stm32_gpio_configure(), stm32_gpio_set(),
stm32_gpio_get, stm32_gpio_enable_int().
This patch merges them into the gpio_stm32.c file.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-01-10 13:09:19 -06:00
Piotr Mienkowski
8bed2d5e27 soc: silabs_exx32: Add SWO logger support
By default, after reset SWO signal is not connected to GPIO pin. This
commit adds required initialization code to enable support for SWO
logger. Not all SoC series support the feature.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-01-09 15:30:59 +01:00
Erwan Gouriou
f5d48240e9 drivers/gpio: stm32l4: PortG[15:2] requires dedicated VDDio2
On STM32L4, 14 pins (Port G[15:2]), require external power supply.
Activate this at port G init when PWR_CR2_IOSV is defined.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-01-09 08:05:24 -06:00
Piotr Mienkowski
aa2c27d007 soc: silabs_exx32: Add independent Kconfig options for HAL libraries
Zephyr gecko drivers depend on libraries provided by the vendor. The
same libraries may also be used directly by the application code or
RAIL library. To facilitate the latter use case scenario this commit
adds Kconfig options to independently enable compilation of vendor
HAL library modules.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-01-08 13:31:42 -06:00
Ashokkumar B
2b0507ce14 drivers: gpio: Add support for Stellaris gpio controller driver.
* Add support for gpio controller driver

Signed-off-by: Ashokkumar B <ashokkumar@zilogic.com>
Signed-off-by: Subash G <subash@zilogic.com>
Signed-off-by: Vishnu K <vishnu@zilogic.com>
Signed-off-by: Vaishnavi D <vaishnavi.d@zilogic.com>
2019-01-08 13:30:26 -06:00
Andrzej Głąbek
4b43065cfc drivers: nrf: Enable nRF drivers by default in Kconfig
Make the following nRF peripheral drivers:
- ADC
- GPIO
- I2C
- SPI
- UART
- USB_DEVICE
enabled by default so that users do not need to explicitly enable them
in their applications after choosing an nRF SoC as the build target.

Kconfig options enabling these drivers depend on both a given hardware
feature (e.g. I2C) and an nRF family SoC selected, so effectively they
will be automatically enabled only when it is adequate (and in most
cases these drivers are the only option for a given hardware feature
on nRF SoCs).

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-12-21 21:01:37 +01:00
Andrzej Głąbek
7d159a5e6c drivers: gpio_nrfx: Remove undesired NRF_P0 definition
This definition was needed to translate the old symbol used in MDK
for accessing the GPIO peripheral in nRF51 SoCs (NRF_GPIO) to the
one used for all newer SoCs (NRF_P0). Now the translation is done
in the HAL for GPIO (nrf_gpio.h).

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-12-13 07:35:28 -06:00
Erwan Gouriou
9062e97a45 drivers: stm32: check clock_control_on return value
Check clock_control_on return value now that it is checking appropriate
bus is used in the request.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-12-07 11:31:48 -05:00
Erwan Gouriou
ea1f2b60a0 drivers/gpio: stm32: return error when pin line already in use
GPIO pin interrupts share common EXTI resources.
Return an error when attempt to configure a line already in use.

Fixes #10611

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-12-07 11:31:22 -05:00
Peter A. Bigot
3134468801 drivers: gpio: nrfx: fix lost level interrupts
Nordic devices detect edge interrupts through the PORT event which is
generated on a rising edge of DETECT, which itself is asserted when any
GPIO is configured for sense level detection and the GPIO's input signal
matches the configuration.

The previous code in Zephyr attempts to detect when at least one GPIO
SENSE signal is still asserted, and intentionally leaves the PORT event
uncleared to ensure the interrupt is re-entered.

This approach fails when no pin satisfies its SENSE condition during the
check but at least one input changes level between the completion of the
check and the clear of the PORT event.  Such a failure can be observed
on the pca20020 hardware when multiple sensors configured for level
triggers are active.  In this situation the corresponding sensor trigger
signals remain asserted but the PORT event required to drive their
processing has already been cleared.

The fix is to ensure that the SENSE configuration for all GPIOs across
all port instances is disabled prior to unconditionally clearing the
PORT event, then re-enabling the SENSE configuration for all GPIOs once
callbacks associated with detected SENSE triggers have been performed.
The act of re-enabling will ensure any relevant SENSE condition causes a
new rising edge on DETECT and so a new PORT event.

Closes issue #11806

See: https://devzone.nordicsemi.com/f/nordic-q-a/7246/missing-interrupts-on-gpioe-port-events

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2018-12-05 12:15:11 +01:00
Patrik Flykt
8ff96b5a57 drivers: Add 'U' to unsigned variable assignments
Add 'U' to a value when assigning it to an unsigned variable.
MISRA-C rule 7.2

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2018-12-04 22:51:56 -05:00
Gil Benkö
563af20134 drivers: gpio_gecko: Use emlib API for compatibility
This ensures compatibility with Silicon Labs EXX32 MCU Series 1.

Signed-off-by: Gil Benkö <gil.benkoe@pm.me>
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2018-11-21 13:42:26 -06:00
Mieszko Mierunski
80421d3f5f dts: nrf: Remove GPIOTE dts.fixup defines and use aliases instead.
Changed driver to use defines from aliases instead of fixup.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-11-20 22:18:09 +01:00
Kamil Gawor
446b751609 drivers: gpio: Add reading port/pin in both direction
These changes modify the function of reading port/pin,
function return logical sum of input pin value and
output pin values for a given port. It is now possible
to read the status of pins set as output.

Signed-off-by: Kamil Gawor <Kamil.Gawor@nordicsemi.no>
2018-11-15 09:17:15 -05:00
Andrzej Głąbek
20202902f2 dts_fixups: Use DT_ prefix in all defined labels not related to Kconfig
These changes were obtained by running a script  created by
Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> for the following
specification:

1. Read the contents of all dts_fixup.h files in Zephyr
2. Check the left-hand side of the #define macros (i.e. the X in
   #define X Y)
3. Check if that name is also the name of a Kconfig option
   3.a If it is, then do nothing
   3.b If it is not, then replace CONFIG_ with DT_ or add DT_ if it
       has neither of these two prefixes
4. Replace the use of the changed #define in the code itself
   (.c, .h, .ld)

Additionally, some tweaks had to be added to this script to catch some
of the macros used in the code in a parameterized form, e.g.:
- CONFIG_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS
- CONFIG_UART_##idx##_TX_PIN
- I2C_SBCON_##_num##_BASE_ADDR
and to prevent adding DT_ prefix to the following symbols:
- FLASH_START
- FLASH_SIZE
- SRAM_START
- SRAM_SIZE
- _ROM_ADDR
- _ROM_SIZE
- _RAM_ADDR
- _RAM_SIZE
which are surprisingly also defined in some dts_fixup.h files.

Finally, some manual corrections had to be done as well:
- name##_IRQ -> DT_##name##_IRQ in uart_stm32.c

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-11-13 10:44:42 -06:00
Andrzej Głąbek
d4a17b4085 soc: cc2650: Update DTS-derived labels with DT_ prefix
Update a couple of labels generated from DTS used directly (not through
dts_fixups) in TI CC2650 system initialization code and a few drivers
for this SoC.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-11-13 10:44:42 -06:00
Erwan Gouriou
bd7387947e drivers/gpio: stm32: Remove redundant AFIO bit for STM32F1
Specific code is present GPIO_DEVICE_INIT_STM32 in
GPIO_DEVICE_INIT_STM32 to handle LL_APB2_GRP1_PERIPH_AFIO bit.
Though, this bit is already included in device tree information,
in clocks property, 'bits' field, which carries for each GPIO,
both LL_APB2_GRP1_PERIPH_GPIOX and LL_APB2_GRP1_PERIPH_AFIO.
Hence, it is already taken into account in
CONFIG_GPIO_STM32_GPIO##__SUFFIX##_CLOCK_BITS and it is redundant
to handle it in GPIO_DEVICE_INIT_STM32 macro.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-11-13 07:09:35 -06:00
Krzysztof Chruscinski
97345dbb1b logging: Fix errors in log usage
Couple of findings which were revealed after changing
LOG_MODULE_REGISTER macro:
- missing semicolons after LOG_MODULE_REGISTER()
- missing LOG_LEVEL defines
- other

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2018-11-10 12:38:29 -05:00
Martin Bertsche
9892f40204 gpio: stm32 use dts extracted information to populate gpio instances.
The information extracted from the device tree is now used to initialize
GPIO device instances. Up until now the GPIO device driver made no use
of this information. Actual instance creation is still controlled using
the Kconfig method. Missing GPIO device tree nodes were added in the
process for STM32L073, STM32F413 and STM32F373.

The information for gpio instance initialization has already been
present for supported STM32 SoCs but remained unused. Changes in the
device tree had no effect on GPIO functionality and was essentially
redundant. Using the device tree for hardware description seems
plausible and less painful than a myriad of defines in some SoC
description header.

The change was implemented under the assumption that current device
trees provide a correct description of the SoCs. Base register addresses
and RCC register bits were not explicitly checked for each device.

Manual tests were executed on:
	- NUCLEO-F103RB
	- STM32F429I-DISCO
	- STM32F746G-DISCO
	- NUCLEO-F767ZI

Manual tests consisted of blinky on different GPIOs and pins on each
board.

sanitycheck was executed for all STM32 based boards

Fixes: #10629

Signed-off-by: Martin Bertsche <martin72216@googlemail.com>
2018-11-09 04:49:59 -06:00
Sean Nyekjaer
c206b0239f drivers: gpio: shell: rectify gpio get error msg
Previous the error for get was:
- Wrong parameters for set
Now:
- Wrong parameters for get

Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
2018-11-08 08:25:06 -05:00
Kumar Gala
ac7da0b65c gpio: ti cc32xx: Add device tree support for GPIO
Convert gpio_cc32xx driver over to using device tree. Added binding
files, updates to dts for various SoCs that use cc32xx.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-05 11:08:35 -06:00
Daniel Leung
a87a6d82ac soc: apollo_lake: fix build errors for GPIO due to DTS changes
The DTS changes introduced in 7ae220c845
changes the naming of GPIO related macros. This updates the usage
of previous macros via DTS fixup.

Fixes #10993

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-11-02 21:58:02 -04:00
David B. Kinder
ee47f7fb7a doc: fix kconfig misspellings
Fix misspellings in Kconfig files that show up in the configuration
documentation (and make menuconfig screens).

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-11-02 17:58:16 -04:00
Kumar Gala
aa2bdbe322 drivers: Remove board.h include
We either don't need board.h in the driver or we should be include soc.h
instead.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-01 13:21:11 -04:00
Anas Nashif
8eff21a8dd drivers: gpio: add shell for controlling GPIO
Provide basic commands for configuring/setting/reading GPIO ports.

> gpio conf ..
> gpio set ..
> gpio get ..

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-18 10:15:50 -04:00
qianfan Zhao
94fa5ca91b drivers: gpio_sam: fix gpio_sam_write ACCESS_BY_PORT mode
The 'value' param in ACCESS_BY_PORT mode means the state of a port,
one bit represented one pin in param 'value'.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-10-17 08:03:38 -04:00
qianfan Zhao
ccab779b48 drivers: gpio_sam: Add ACCESS_BY_PORT mode for gpio config
ACCESS_BY_PORT mode can configure all the pins the same way in the port.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-10-17 08:03:38 -04:00
Nathaniel Graff
c0a680166d drivers: gpio: sifive: Fix GPIO extern interrupts
IRQ_CONNECT calls in the SiFive GPIO driver were misconfigured when the
conversion to DeviceTree support occurred.

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-10-15 21:39:21 -04:00
Kumar Gala
c3076d6eb2 gpio: silabs gecko: Add device tree support for GPIO
Convert gpio_gecko driver over to using device tree. Added binding
files, updates to dts for various SoCs that use gpio_gecko.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-10-09 22:34:56 -04:00
Anas Nashif
c2551ea57b gpio: log: rename level variable
Rename log level variable:
 CONFIG_LOG_GPIO_LEVEL to CONFIG_GPIO_LOG_LEVEL

Use template for log levels.

Register modules in drivers using logging.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-08 17:49:12 -04:00
Anas Nashif
ab3f56577f gpio_sch: fix log message
log message missing a parameter for the pin.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-08 17:49:12 -04:00
Olivier Martin
9339d65e6e drivers: gpio: Migrate to new logging subsys
Migrate from `SYS_LOG` to `LOG` logging mechanism.

Signed-off-by: Olivier Martin <olivier.martin@proglove.de>
2018-10-08 17:49:12 -04:00
Kumar Gala
da7ac50683 gpio: sifive: Add device tree support for GPIO generation
Add the missing bits to the yaml, dts, and Kconfig to enable GPIO pin
generation based on device tree.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-10-05 13:21:49 -05:00
Kumar Gala
db2ca70a23 dts: pulpino: Add device tree support for GPIO controller
Add the needed bits to get device tree support for the GPIO controller
on the Zedboard-Pulpino.  This will allow us to move LED & button info
into the board.dts.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-10-04 07:48:32 -05:00
Kumar Gala
58ec6fd30f gpio: remove unused GPIO_INT_CLOCK_SYNC flag
GPIO_INT_CLOCK_SYNC wasn't implemented by anything, so remove it.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-10-03 08:23:24 -05:00
Maureen Helm
75bc6ba454 drivers: boards: Merge HAS_DTS_I2C_DEVICE with HAS_DTS_I2C
Every board that uses dts-enabled i2c drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_I2C_DEVICE and
HAS_DTS_I2C.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-10-01 21:15:06 -05:00
Maureen Helm
5dc584975b drivers: gpio: Select HAS_DTS_GPIO in various drivers
Selects HAS_DTS_GPIO in various gpio drivers that already support dts,
similar to how we select HAS_DTS_SPI in spi drivers and HAS_DTS_I2C in
i2c drivers.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-09-28 11:44:03 -05:00
Daniel Leung
8d18ebde9b gpio: add driver for Intel Apollo Lake SoC
This adds a driver for GPIO controller on the Intel
Apollo Lake SoC.

Origin: Original

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-09-19 21:36:16 -04:00
Flavio Ceolin
67ca176754 headers: Fix headers across the project
Any word started with underscore followed by and uppercase letter or a
second underscore is a reserved word according with C99.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-17 15:49:26 -04:00
Rajavardhan Gundi
dc45def9d0 drivers/gpio_sam: Fix incorrect flag checking
Corrected the checking for edge/level interrupts in the flags
variable.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2018-09-13 11:29:17 -04:00
Andrzej Głąbek
61eb2a1c80 drivers: gpio: nrfx: Use GPIOTE HAL for checking allocated channels
Replaces direct accesses to the peripheral registers structure
with the proper GPIOTE HAL function added recently to nrfx.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-09-11 12:55:07 -04:00
Pawel Dunaj
fb10377ecc drivers: gpio: Fix two bugs in nrfx gpio
Commit fixes two issues:
- Return correct value from gpiote_channel_alloc
- Check if pending event interrupt was not disabled

Jira:DESK-270

Fixes #9535

Signed-off-by: Pawel Dunaj <pawel.dunaj@nordicsemi.no>
2018-08-27 10:30:04 -04:00
Michael Scott
7983606327 drivers: gpio: sx1509b: Kconfig options depend on GPIO_SX1509B
When CONFIG_GPIO_SX1509B was not set, the related Kconfig options
were still showing up in .config.  Let's make them depend on
GPIO_SX1509B so they can go away when not being used.

Signed-off-by: Michael Scott <mike@foundries.io>
2018-08-23 15:45:16 -07:00
Nathaniel Graff
ca12b3f7d4 drivers: gpio: SiFive GPIO allows <32 pins
Add ifdefs to the SiFive GPIO driver IRQ bindings to allow fewer than
32 pins to be configured based on the DTS configuration

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-08-18 10:46:36 -07:00
Mieszko Mierunski
4f6aac1a67 dts: nrf5: Changed GPIO and GPIOTE define names
Changed names using nrf5 to nrf for consistency with other drivers.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-08-17 07:29:14 -07:00
Mieszko Mierunski
d25c887f63 drivers: nrf: Remove redundant gpio_nrf5 shim
After GPIO shim using NRFX has been implemented, old gpio_nrf5
shim is no longer needed.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-08-17 07:29:14 -07:00
Mieszko Mierunski
6d8220d27f drivers: gpio: Add shim for nrfx GPIO and GPIOTE drivers
Added shim implementation gpio_nrfx.c which uses nrfx drivers
for GPIO and GPIOTE

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-08-17 07:29:14 -07:00
Mieszko Mierunski
e99e363cc0 dts: nrf: Added DTS support for nRF51
DTS for nRF51 was missing, I updated soc and board files to
support DTS properly.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-08-17 07:29:14 -07:00
Flavio Ceolin
0866d18d03 irq: Fix irq_lock api usage
irq_lock returns an unsigned int, though, several places was using
signed int. This commit fix this behaviour.

In order to avoid this error happens again, a coccinelle script was
added and can be used to check violations.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-08-16 19:47:41 -07:00
Nathaniel Graff
218d7a0aa9 riscv: Rename the FE310 SoC to Sifive Freedom
FE310 is the name of one SoC out of a range of products in the SiFive
Freedom line. The FE310 SoC port in Zephyr is compatible with all of
these products, so rename the SoC to SiFive Freedom

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-08-16 06:23:01 -07:00
Ulf Magnusson
8cf8db3a73 Kconfig: Use a short, consistent style for prompts
Consistently use

    config FOO
            bool/int/hex/string "Prompt text"

instead of

    config FOO
            bool/int/hex/string
            prompt "Prompt text"

(...and a bunch of other variations that e.g. swapped the order of the
type and the 'prompt', or put other properties between them).

The shorthand is fully equivalent to using 'prompt'. It saves lines and
avoids tricking people into thinking there is some semantic difference.

Most of the grunt work was done by a modified version of
https://unix.stackexchange.com/questions/26284/
how-can-i-use-sed-to-replace-a-multi-line-string/26290#26290, but some
of the rarer variations had to be converted manually.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-15 04:10:10 -07:00
Nathaniel Graff
45d5d5db48 boards: riscv: Convert HiFive1 to DTS
Adds DTS bindings for sifive,pwm0, sifive,uart0, sifive,spi0, and
riscv,plic0.

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2018-08-13 18:35:38 -05:00
Ulf Magnusson
ec3eff57e0 Kconfig: Use the first default with a satisfied condition
Up until now, Zephyr has patched Kconfig to use the last 'default' with
a satisfied condition, instead of the first one. I'm not sure why the
patch was added (it predates Kconfiglib), but I suspect it's related to
Kconfig.defconfig files.

There are at least three problems with the patch:

  1. It's inconsistent with how Kconfig works in other projects, which
     might confuse newcomers.

  2. Due to oversights, earlier 'range' properties are still preferred,
     as well as earlier 'default' properties on choices.

     In addition to being inconsistent, this makes it impossible to
     override 'range' properties and choice 'default' properties if the
     base definition of the symbol/choice already has 'range'/'default'
     properties.

     I've seen errors caused by the inconsistency, and I suspect there
     are more.

  3. A fork of Kconfiglib that adds the patch needs to be maintained.

Get rid of the patch and go back to standard Kconfig behavior, as
follows:

  1. Include the Kconfig.defconfig files first instead of last in
     Kconfig.zephyr.

  2. Include boards/Kconfig and arch/<arch>/Kconfig first instead of
     last in arch/Kconfig.

  3. Include arch/<arch>/soc/*/Kconfig first instead of last in
     arch/<arch>/Kconfig.

  4. Swap a few other 'source's to preserve behavior for some scattered
     symbols with multiple definitions.

     Swap 'source's in some no-op cases too, where it might match the
     intent.

  5. Reverse the defaults on symbol definitions that have more than one
     default.

     Skip defaults that are mutually exclusive, e.g. where each default
     has an 'if <some board>' condition. They are already safe.

  6. Remove the prefer-later-defaults patch from Kconfiglib.

Testing was done with a Python script that lists all Kconfig
symbols/choices with multiple defaults, along with a whitelist of fixed
symbols. The script also verifies that there are no "unreachable"
defaults hidden by defaults without conditions

As an additional test, zephyr/.config was generated before and after the
change for several samples and checked to be identical (after sorting).

This commit includes some default-related cleanups as well:

  - Simplify some symbol definitions, e.g. where a default has 'if FOO'
    when the symbol already has 'depends on FOO'.

  - Remove some redundant 'default ""' for string symbols. This is the
    implicit default.

Piggyback fixes for swapped ranges on BT_L2CAP_RX_MTU and
BT_L2CAP_TX_MTU (caused by confusing inconsistency).

Piggyback some fixes for style nits too, e.g. unindented help texts.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-10 12:38:28 -07:00
Erwan Gouriou
a10d178078 drivers/pinmux: stm32 fix ports_enable array definition
ports_enable array holds port clock information.
It is populated for all SoCs, but ports availability depends on
SoCs. The way it is defined today, location of the port in the
array depends on previous ports definition in SoC CMSIS files.
Though, port index is always the same irrespective of previous
ports availability in the SoC.
This will result in incoherency between port index and clock
information.
Fix this by setting a bogus value if port is not defined.
Return an error if bogus value is read.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-07-31 09:45:39 -05:00
Anas Nashif
a2ad4b2dd1 drivers: qmsi: Fix types and u32_t/uint32_t conflicts
We have been mixing u32_t and uint32_t. Using u32_t when the API expects
something else.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-07-18 12:32:23 -04:00
Ioannis Glaropoulos
ac81eb0eca drivers: gpio: nrf: remove GPIOTE register structure definition
This commit removes the redundant definition of nRF GPIOTE
register structure that is present in gpio_nrf5.c. The gpiote
driver is adapted to use the register definitions directly
from Nordic MDK header files.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-12 18:36:01 +02:00
Ioannis Glaropoulos
5275a73169 drivers: gpio: nrf: remove GPIO register structure definition
This commit removes the redundant definition of nRF GPIO
register structure that is present in gpio_nrf5.c. The gpio
driver is adapted to use the register definitions directly
from Nordic MDK header files.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-12 18:36:01 +02:00
Christian Taedcke
9ac99a28c5 drivers: gpio_gecko: Adapt driver for Silabs EFR32 MCUs
The EFR32 does not have DOUTSET and DOUTCLR registeres.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2018-07-10 12:53:50 -05:00
Vinayak Kariappa Chettimada
505a83414e drivers: gpio: nrf5: Fix GPIOTE channel use overlap
Fixes issues caused in GPIO driver due to overlapping GPIOTE
channel use in nRF5 software PWM driver and in Bluetooth
controller for implementing PA/LNA feature.

The issue is solved by assigning the base and available
channel count for GPIOTE considering whether PWM and/or
PA/LNA feature is selected in the Kconfig.

Fixes #8815.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2018-07-10 11:25:32 +02:00
qianfan Zhao
6fb7b04461 drivers: stm32-gpio: Provide GPIO driver for stm32f2
Add necessary GPIO defines for the stm32f2 series soc

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-07-05 11:26:07 -05:00
Kumar Gala
44e5b05fb1 drivers: gpio: nrfx: Move device tree selection to driver Kconfig
Move HAS_DTS_GPIO from board to the driver Kconfig.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-07-03 18:46:41 -04:00
Ulf Magnusson
f912dfebea drivers: gpio: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though, and is
inconsistent.

This will make the auto-generated Kconfig documentation have "No
defaults. Implicitly defaults to n." as well, which is clearer than
'default n if ...'

Piggyback a missing 'source "drivers/gpio/Kconfig.imx"'. This file
wasn't included anywhere previously.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-07-03 17:11:31 -04:00
Yurii Hamann
a229500d23 drivers: gpio: stm32: STM32F7 GPIO support
This patch adds GPIO support for STM32F7 family microcontrollers.

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-06-28 08:29:32 -05:00
Marc Reilly
6c60abb03b drivers: gpio: add dts support for nrf52 gpio
This adds basic support for declaring gpio nodes in dts for nrf52.
The dts.fixup provides mapping for the generated defines to the config
defines currently used by the nrf gpio driver.

Existing boards that use nrf52 are updated.

Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
2018-06-14 15:56:39 +02:00
Erwan Gouriou
f27195017a drivers/gpio: stm32 fix gpio device init prio
STM32 GPIO device initialization priority was set to
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT
Following introduction of __ZEPHYR_SUPERVISOR__ macro (#6835),
drivers intialization order have been reordered which blocks
some use cases now.
Increase GPIO init priority to get it initialized before SPI
and avoid a deadlock.

Fixes #7663


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-06-01 03:26:10 -07:00
Maureen Helm
7f4608cc61 gpio: Fix imx driver edge selection when configuring by port
Fixes a copy-paste error found by Coverity.

Coverity-CID: 186028

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-05-25 10:54:14 -05:00
Tomasz Bursztyka
ed26b95746 drivers/gpio: Removing dts generated options in QMSI Kconfig
Now that all arch using QMSI gpio driver are generating the right
settings through DTS, these options can be removed from Kconfig.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka
bd9706cd9b arch/arc: Use dts to set gpio priorities for quark_se_c1000_ss
Fix the qmsi ss gpio driver accordingly.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka
53f91976b1 arch/x86: Use dts to set gpio options for quark_se and quark_d2000
Get the name and irq flags generated through dts as well.
Fix Kconfig for the gpio driver accordingly.

Irq priority is not set by dts for D2000 as it's irq controller does
not support it.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Andrew Boie
8345e5ebf0 syscalls: remove policy from handler checks
The various macros to do checks in system call handlers all
implictly would generate a kernel oops if a check failed.
This is undesirable for a few reasons:

* System call handlers that acquire resources in the handler
  have no good recourse for cleanup if a check fails.
* In some cases we may want to propagate a return value back
  to the caller instead of just killing the calling thread,
  even though the base API doesn't do these checks.

These macros now all return a value, if nonzero is returned
the check failed. K_OOPS() now wraps these calls to generate
a kernel oops.

At the moment, the policy for all APIs has not changed. They
still all oops upon a failed check/

The macros now use the Z_ notation for private APIs.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-05-17 23:34:03 +03:00
Adithya Baglody
b0db28b512 drivers: Cmake: Add __ZEPHYR_SUPERVISOR__ macro for driver files.
Normally a syscall would check the current privilege level and then
decide to go to _impl_<syscall> directly or go through a
_handler_<syscall>.
__ZEPHYR_SUPERVISOR__ is a compiler optimization flag which will
make all the system calls from the driver files directly link
to the _impl_<syscall>. Thereby reducing the overhead of checking the
privileges.

In the previous implementation all the source files would be compiled
by zephyr_source() rule. This means that zephyr_* is a catchall CMake
library for source files that can be built purely with the include
paths, defines, and other compiler flags that all zephyr source
files uses. This states that adding one extra compiler flag for only
one complete directory would fail.
This limitation can be overcome by using zephyr_libray* APIs. This
creates a library for the required directories and it also supports
directory level properties.
Hence we use zephyr_library* to create a new library with
macro _ZEPHYR_SUPERVISOR_ for the optimization.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-05-15 17:48:18 +03:00
Wayne Ren
532e4d22ee dts: optimize and bug fixes the dts of em_starterkit
* add gpio, i2c, spi definitions
* optimize and bug fix the dts.fixup
* optimize and bug fix the em_starterkit related definitions
  in dts folder

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-05-15 09:48:11 +02:00
Kumar Gala
57904102fd gpio: dts: Introduce Kconfig symbols to convey GPIO dts support
Add a set of Kconfig symbols that allow us to set that the GPIO
driver/SoC support DTS (HAS_DTS_GPIO) and that drivers that need/use
GPIO support DTS as well (HAS_DTS_GPIO_DEVICE).

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-05-10 15:43:42 -05:00
Stanislav Poboril
67ba7d8a36 gpio: Add imx gpio driver shim
Adds a shim layer around the imx gpio driver to adapt it to the Zephyr
gpio interface.

For now only the port 4 was tested.

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
2018-05-02 12:48:14 -05:00
Leandro Pereira
c200367b68 drivers: Perform a runtime check if a driver is capable of an operation
Driver APIs might not implement all operations, making it possible for
a user thread to get the kernel to execute a function at 0x00000000.

Perform runtime checks in all the driver handlers, checking if they're
capable of performing the requested operation.

Fixes #6907.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2018-04-26 02:57:12 +05:30
Maureen Helm
57e80e5345 ext: mcux: Reorganize imported drivers into soc family subfolders
We have been combining imported mcux drivers into a flattened directory
structure to maximize driver reuse, but the introduction of additional
nxp soc families (lpc and imx) to zephyr has introduced driver naming
conflicts. This caused us to rename and modify imported files, such as
fsl_gpio.c/h, to make them unique across all three nxp soc families.
This makes updating the the mcux drivers complicated, especially for the
lpc family.

Reoganize the mcux drivers into soc family subfolders, so we can just
copy all the drivers from an mcux distribution (which is done on an
soc-basis) into the appropriate soc family folder. Undo all of the
naming changes that occurred when lpc and imx drivers were originally
imported. Undo the accidental squashing of the kinetis watchdog and dcdc
drivers that occurred when the imx drivers were introduced.

The drawback to this approach is that we have duplicate files when the
same hw ip modules exist in multiple soc families, however there are
only few cases where this occurs, such as fsl_lpuart and fsl_trng.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-04-24 07:55:48 -05:00
Maureen Helm
4e8f29f319 gpio: Refactor the mcux gpio driver to use dts
Get the driver name, base address, irq number, and irq priority from
dts.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-04-20 08:54:11 -05:00
Aapo Vienamo
8e1cf7b619 gpio: nrf5: Make the init priority configurable
A Kconfig option is added for setting the initialization priority.

This is done to make the initialization priority requirements in
nrf52_pca20020 board power up sequence clearer.

Signed-off-by: Aapo Vienamo <aapo.vienamo@iki.fi>
2018-04-09 17:09:06 -05:00
Vinayak Kariappa Chettimada
91a27358bd drivers: gpio: nrf5: Use popcount and first_lsb_set functions
Use the Zephyr toolchain and architecture defined popcount
and first_lsb_set functions instead of GCC specific
functions.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2018-03-23 16:40:58 +01:00
Vinayak Kariappa Chettimada
89cb10f151 drivers: gpio: nrf5: Add support for port P1 in nRF52840 SoC
Added support for GPIO Port P1 in nRF52840 SoC.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2018-03-23 16:40:58 +01:00
Vinayak Kariappa Chettimada
e9fa157245 drivers: gpio: nRF5: Use lowest IRQ priority level as default
Fix the permitted range of IRQ priority to, 0 to 2, as
maximum one priority level is used, for zero latency IRQs
in nRF51, being an ARM Cortex-M0.

Update the Kconfig default GPIOTE IRQ priority level to the
lowest, for nRF51 a level of 2; for nRF52, a level of 5.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2018-03-23 16:40:58 +01:00
Carles Cufi
b2016da563 arch: arm: nrf: Rename common header to apply to all nRFx ICs
The existing nrf5_common.h now applies to other Nordic ICs that are not
part of the "5" family. Instead rename this to nrf_common.h to cover the
upcoming ICs that belong to other families.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2018-03-20 11:57:14 +01:00
Carles Cufi
f49150cab6 arch: arm: nrf: Rename nrf5 SoC Family to nrf
Upcoming Nordic ICs that share many of the peripherals and architecture
with the currently supported nRF5x ones are no longer part of the nRF5
family. In order to accomodate that, rename the SoC family from nrf5 to
nrf, so that it can contain all of the members of the wider Nordic
family.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2018-03-20 11:57:14 +01:00
Aapo Vienamo
dd9719bf46 gpio: Add a driver for SX1509B
Adds a driver for SX1509B I2C GPIO chip. This driver only supports the
basic GPIO features and does not currently implement the LED driver and
keypad matrix features.

Signed-off-by: Aapo Vienamo <aapo.vienamo@iki.fi>
2018-03-13 12:31:16 -05:00
Justin Watson
b9c65e1882 drivers: GPIO Added GPIO for SAM family.
Added GPIO driver for SAM family of SoCs.

Signed-off-by: Justin Watson <jwatson5@gmail.com>
2018-03-10 11:42:25 -06:00
Endre Karlson
ef1d32b8ef drivers: gpio: Provide GPIO driver for stm32l0x
Add necessary GPIO defines for the stm32l0x series soc

Signed-off-by: Endre Karlson <endre.karlson@gmail.com>
2018-03-10 11:42:25 -06:00
c83f0782b6 gpio: sam0: add pull up/pull down support.
Also trim back the headers.

Signed-off-by: Michael Hope <mlhx@google.com>
2018-03-10 11:42:25 -06:00
Vitor Massaru Iha
e84d1a4f31 drivers: gpio: Nios-II: Fix condition on gpio_nios2_config_oput_port()
(flags & GPIO_DIR_IN) is always zero because GPIO_DIR_IN is 0, then
we have to use GPIO_DIR_MASK.

Signed-off-by: Vitor Massaru Iha <vitor@massaru.org>
2018-02-19 20:49:20 -05:00
Anas Nashif
8949233390 kconfig: fix more help spacing issues
Fix Kconfig help sections and add spacing to be consistent across all
Kconfig file. In a previous run we missed a few.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-02-15 23:20:55 -05:00
Shiksha Patel
1dc7e90c03 lpc: Add gpio mcux driver for lpc
Add gpio mcux driver which can be used for lpcxpresso54114 and other lpc
socs. In this driver, CMSIS register access is made for GPIO.

Option for access by GPIO Pin is provided as of now.

Signed-off-by: Shiksha Patel <shiksha.patel@nxp.com>
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-01-23 09:18:32 -06:00
Yannis Damigos
ef0d77b74e drivers: gpio_stm32: Add defines for ports I, J, K
This patch adds defines for ports I, J, K and
refactors gpio_stm32.h file.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-01-11 14:35:45 -06:00
54c6fbdca7 gpio: add a GPIO driver for the SAM0 family.
Signed-off-by: Michael Hope <mlhx@google.com>
2018-01-04 13:18:25 -05:00
Ramakrishna Pallala
12d614d0b8 drivers: gpio: add support for Altera Nios-II PIO controller
The PIO cores on Altera Nios-II processors can be used
for GPIOs and each PIO core can be configured as Input only,
Output only or as Bidirectional port from the Qsys tool.

The present Nios-II softcpu image on the Zephyr only has the
support for Output only port and the PIOs[0:3] are wired to
LED[0:3] on the Altera MAX10 board.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2017-12-21 12:02:24 -08:00
Anas Nashif
429c2a4d9d kconfig: fix help syntax and add spaces
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-13 17:43:28 -06:00
Vitor Massaru Iha
c969ddbdd8 drivers: gpio: esp32: Check return value of pinmux_pin_input_enable()
Some gpio pins are only input, and this assert is for check if
they were set as output.

Signed-off-by: Vitor Massaru Iha <vitor@massaru.org>
2017-12-11 09:21:53 -05:00
Vitor Massaru Iha
6a513ef65d drivers: gpio: Fix typo on esp32
esp32 has 40 gpio ports but some ranges are wrote 32_63 instead of
32_39.

Signed-off-by: Vitor Massaru Iha <vitor@massaru.org>
2017-11-18 07:43:29 -05:00
Maureen Helm
6043c74fd3 gpio: Introduce mcux igpio shim driver
Adds a new gpio driver for the NXP i.MX family of SoCs. Read, write,
configure, and callback API functions are all implemented.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-11-15 09:09:58 -06:00
Sebastian Bøe
0829ddfe9a kbuild: Removed KBuild
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-11-08 20:00:22 -05:00
Sebastian Bøe
12f8f76165 Introduce cmake-based rewrite of KBuild
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.

Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.

This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.

For users that just want to continue their work with minimal
disruption the following should suffice:

Install CMake 3.8.2+

Port any out-of-tree Makefiles to CMake.

Learn the absolute minimum about the new command line interface:

$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..

$ cd build
$ make

PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html

Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-11-08 20:00:22 -05:00
Youvedeep Singh
26de2ec1cb gpio: Add APIs for enabling/Disabling GPIOTE interrupts for nrf52 SOC.
Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
2017-11-06 09:29:10 -05:00
Youvedeep Singh
affbea7caf gpio: Add support for SENSE configuration for nrf SOC GPIO.
nrf SOCs are capable of waking from Low power state or
Deep Sleep state using sense configuration.
So adding support for this in nrf GPIO driver.

Jira: ZEP-2623

Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
2017-11-06 09:29:10 -05:00
Piotr Mienkowski
4487c935fe drivers: gpio: deprecate GPIO_PIN_ENABLE, GPIO_PIN_DISABLE
GPIO_PIN_ENABLE, GPIO_PIN_DISABLE configuration constants overlap
functionality provided by pinmux driver. They usage makes the API
inconsistent. They are almost uniformly ignored by the existing device
drivers. Only few of them take these constants into account.

This commit deprecates usage of the two configuration constants.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2017-11-02 18:46:30 -04:00
Anas Nashif
780324b8ed cleanup: rename fiber/task -> thread
We still have many places talking about tasks and threads, replace those
with thread terminology.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-30 18:41:15 -04:00
Andrew Boie
d3ec6654f5 drivers: gpio: add system call handlers
Many APIs had two versions, by port and by pin, which called the same
API with different parameters. This has been reorganized to reduce
the number of system calls.

Callback registration API skipped.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-30 13:20:19 -07:00
Leandro Pereira
fa92bfe3c1 drivers: gpio: gecko: GPIO driver ignores pull-up/pull-down settings
Fixes #4395.

Coverity-ID: 178059
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-10-24 08:49:41 +02:00
Maciej Debski
38b5d3c17e drivers: gpio: provide support for stm32f0.
Fixes #3923

Signed-off-by: Maciej Debski <maciej.debski@rndity.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-10-23 12:31:47 +02:00
Christian Taedcke
158b635b57 drivers: gpio_gecko: Add gpio driver for Silabs EXX32 MCUs
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2017-10-10 11:56:47 -05:00
Leandro Pereira
5f22dab17a esp32: Prefix ROM routines with esp32_rom_
Also provide their prototypes in `soc.h`.  This should help
readability, since some ROM functions, with their names as provided by
Espressif, have sometimes the same prefix as Zephyr APIs.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-10-09 20:53:22 -04:00
Leandro Pereira
095424c416 drivers: gpio: esp32: Configure GPIO drive strength
Configuring an open drain driver is required by the I2C driver,
but the GPIO driver didn't support setting the drive strength.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-10-09 20:53:22 -04:00
Leandro Pereira
fd25931228 drivers: gpio: esp32: Use PIN_FUNC_GPIO definition from ESP-IDF
PINMUX_FUNC_A is set to 0, which coincides with the GPIO function in
many of the ESP32 pins.  Use PIN_FUNC_GPIO by default inside the
GPIO driver, however, so the correct function is always selected.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-10-09 20:53:22 -04:00
Anas Nashif
8920cf127a cleanup: Move #include directives
Move all #include directives at the very top of the file, before any
code.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 12:41:07 -04:00
Leandro Pereira
3d48ce8011 drivers: gpio: esp32: Properly convert interrupt triggering mode
Masks for level- and edge-triggering levels are 0, so the following
check will be always true:

    if ((flags & GPIO_INT_ACTIVE_LOW) == GPIO_INT_ACTIVE_LOW)

Invert the evaluation order, by checking the masks that are not 0
first.

Jira: ZEP-2557
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-08-23 10:28:59 -04:00
Leandro Pereira
b4bfdaa31b drivers: gpio: esp32: Declare data struct only for enabled ports
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-08-23 10:28:59 -04:00
Leandro Pereira
d52de29fba esp32: Fix redefinition of BIT() macro
Esp-idf defines the BIT macro that is also defined in Zephyr's
misc/util.h.  Fix the issue by including the esp-idf headers first, so
that a check in util.h won't redefine the macro if it's already
defined.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-08-19 07:50:18 -04:00
Gil Pitney
4f67a6c76d cc3200: Remove TI cc3200 SOC and LaunchXL board support
Per ZEP-1958, Phase 2 of adding CC3220sf LaunchXL support,
was to "deprecate the CC3200 launchxl support in Zephyr
(redundant to the CC3220)."

Effectively, the CC3220 SOC replaces the CC3200.

This patch removes the following:
* the imported CC3200 SDK
* CC3200 SOC, board, DTS files.
* adjusts other files where cc3200 was mentioned.

Also, it fixes explicit references to CC3200 in generic
CC32xx driver files.

Jira: ZEP-1958

Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2017-08-15 11:02:48 -05:00
Leandro Pereira
c0c79a8041 drivers: gpio: esp32: Add ESP32 GPIO driver
This provides basic GPIO support, with interrupts, and the ability to
read and write to ports on a pin-by-pin basis.

Jira: ZEP-2286
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-08-09 12:26:14 -07:00