Use gpio_pin_t uniformly when passing pin indexes to the driver. Use
gpio_flags_t uniformly when passing flags to the driver. Change name
of pin configuration function in API function table to be consistent
with other API functions.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The only remaining port operations have dedicated API function table
entries. Remove the defines for access op (mode), and remove support
for access op from all implementations.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The last external reference to these was removed when the pin
write/read functions were deprecated. Remove the syscall support, API
function table entries, and implementation from all drivers.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
As the mmio32 is more of a library than a proper driver, just implement
the new port functions and have pin_interrupt_configure marked pretty
much as not supported.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The build infrastructure should not be adding the drivers subdirectory
to the include path. Fix the legacy uses that depended on that
addition.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.
Jira: ZEP-2051
Change-Id: I08f51e2bfd475f6245771c1bd2df7ffc744c48c4
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fix doxygen comment typos used to generate API docs
Change-Id: I6fd5051c99bdcc731740c92001e525349c254d85
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
It is envisaged that this will be used by SoC or board code to make
available fixed purpose memory-mapped i/o registers to the rest of the
system which normally expects to use GPIO devices, e.g. for driving chip
select lines, LEDs or reading button states.
As such, the driver code doesn't provide a kconfig based configuration
mechanism, instead SoC/board code can hard-wire the devices it wants
with something simple like:
GPIO_MMIO32_INIT(misc_reg1, "MISC1", 0x12345678, 0xffffffffu)
Then, for example, if bit N of the register at 0x12345678 is wired up as
an SPI device chip select line, the SPI driver could be configured to
use pin N of the "MISC1" GPIO driver and not need any other board
specific code.
Change-Id: Ib02fcbab73fcf9637e25834db060fb3108626f47
Signed-off-by: Jon Medhurst <tixy@linaro.org>
