Commit graph

15 commits

Author SHA1 Message Date
Anas Nashif f42cddf083 boards: qemu_cortex_a53: do not run on net/bt tests
Those are covered by other qemu variants..

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-06-25 11:05:29 -04:00
Andrew Boie a9670ab5cf boards: centralize QEMU icount management
Instead of endlessly repeating the same command line args,
centralize this and tune the shift value on a per-board
basis.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-06-24 20:28:36 -04:00
Wentong Wu 559238a1f7 boards: qemu_cortex_a53: enable icount mode
Enable icount mode for qemu_cortex_a53 platform, The icount shift
value is selectd based on cpu clock frequency of this platform.
The virtual cpu will execute one instruction every 2^shift ns of
virtual time.

Signed-off-by: Wentong Wu <wentong.wu@intel.com>
2020-05-14 13:52:07 +02:00
Carlo Caione 99a8155914 arm: AArch64: Add support for nested exception handlers
In the current implementation both SPSR and ELR registers are saved with
the callee-saved registers and restored by the context-switch routine.
To support nested IRQs we have to save those on the stack when entering
and exiting from an ISR.

Since the values are now carried on the stack we can now add those to
the ESF and the initial stack and take care to restore them for new
threads using the new thread wrapper routine.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-03-31 19:24:48 +02:00
Kumar Gala 9ede3c9a97 drivers: serial: uart_pl011: remove shared irq support
The shared irq support isn't needed in this driver.  We just need to
deal with the fact that some SoCs have only a single interrupt line and
some have three interrupts.  We can just ifdef that based on
DT_NUM_IRQS.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-25 08:34:40 -05:00
Kumar Gala a288f07126 drivers: serial: uart_pl011: Unify uart clock from DT
Add a fixed clock to the qemu-virt-a53.dtsi to match how the musca dts
files work so we get the clock DT info in the same way in the driver.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-20 10:05:01 -05:00
Carlo Caione 5a7f073db6 board: qemu_cortex_a53: Enable default testing
QEMU Cortex-A53 is the default (and only) board for this architecture,
as such we should enable default testing.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-10 17:00:20 +01:00
Ulf Magnusson c5839f834b kconfig: Remove assignments to CONFIG_<arch> syms and hide them
All board defconfig files currently set the architecture in addition to
the board and the SoC, by setting e.g. CONFIG_ARM=y. This spams up
defconfig files.

CONFIG_<arch> symbols currently being set in configuration files also
means that they are configurable (can be changed in menuconfig and in
configuration files), even though changing the architecture won't work,
since other things get set from -DBOARD=<board>. Many boards also allow
changing the architecture symbols independently from the SoC symbols,
which doesn't make sense.

Get rid of all assignments to CONFIG_<arch> symbols and clean up the
relationships between symbols and the configuration interface, like
this:

1. Remove the choice with the CONFIG_<arch> symbols in arch/Kconfig and
   turn the CONFIG_<arch> symbols into invisible
   (promptless/nonconfigurable) symbols instead.

   Getting rid of the choice allows the symbols to be 'select'ed (choice
   symbols don't support 'select').

2. Select the right CONFIG_<arch> symbol from the SOC_SERIES_* symbols.
   This makes sense since you know the architecture if you know the SoC.

   Put the select on the SOC_* symbol instead for boards that don't have
   a SOC_SERIES_*.

3. Remove all assignments to CONFIG_<arch> symbols. The assignments
   would generate errors now, since the symbols are promptless.

The change was done by grepping for assignments to CONFIG_<arch>
symbols, finding the SOC_SERIES_* (or SOC_*) symbol being set in the
same defconfig file, and putting a 'select' on it instead.

See
https://github.com/ulfalizer/zephyr/commits/hide-arch-syms-unsquashed
for a split-up version of this commit, which will make it easier to see
how stuff was done. This needs to go in as one commit though.

This change is safer than it might seem re. outstanding PRs, because any
assignment to CONFIG_<arch> symbols generates an error now, making
outdated stuff easy to catch.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-02-08 00:50:08 -06:00
Kumar Gala 1dc4b1dd2f boards: shrink image sizes
Reduce images sizes of boards.  Get a roughly 3x reduction in size.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-07 13:52:45 -05:00
Carlo Caione 0958673ee1 arch: arm64: Enable shared IRQ line for UART
Enable the shared IRQ for the UART line and enable the remaining tasks
that depends on a separated declaration of the TX/RX/Err/... IRQs.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Carlo Caione 3cdead707d arch: arm64: Fix cmsis_rtos tests
The cmsis_rtos tests are failing because the stack size used by CMSIS is
too small. Customize the stack size for the aarch64 architecture and
re-enable the tests.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Carlo Caione 86a60475a4 arch: arm64: Fix logging test
We need a slightly bigger stack to be able to successfully pass the
logging test. Fix the stack size and enable back the test.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Carlo Caione 0d5e011be4 arch: arm64: Enable tracing
Enable the tracing hooks on the ARM64 platform and white-list the
tracing tests.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Carlo Caione 54acb7baf4 arch: arm64: Support zephyr toolchain
ARM64 is a valid target for the zephyr toolchain. Add support for it.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Carlo Caione a61290e1a3 arch: arm64: Add support for qemu_cortex_a53 board
This patch introduces support for the qemu_cortex_a53 board emulated
using QEMU (virt platform) adding SoC, board and DTS files.

| ./scripts/sanitycheck -p qemu_cortex_a53
|
| Total complete:  190/ 190  100%  skipped:   40, failed:    0
| 150 of 150 tests passed (100.00%), 0 failed,
|     40 skipped with 0 warnings in 580.93 seconds

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00