Add initial support for Decawave DW1000
IEEE 802.15.4-2011 UWB transceiver.
Driver has basic functionality. Additional functions such
as reading out timestamps and delayed TX were implemented
for test purposes, but also require support in the 802154
subsystem.
Register, sub-register, and defaults defines in the file
ieee802154_dw1000_regs.h are taken from the Decawave's
DW1000 driver for the Mynewt OS.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Binding used for LPC random number generator hardware.
Describes RNG device node in LPC5xxx SoCs device tree peripherals.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Convert i2s_sam_ssc driver to utilize devicetree. We replace Kconfig
options for specifying the DMA configuration (channel, DMA device name)
with getting that from devicetree. We also get pincfg from devicetree,
however we still have Kconfig sybmols to specify if the RF or RK pin is
enabled.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert sam_xdmac driver to utilize devicetree. As part of the
controller binding we specify that dmas should contain a channel and the
perid for the DMA transaction.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The DS3231 is an I2C real-time clock with internal temperature
compensated oscillator, maintaining civil time to 1 s precision with
nominal 2 ppm accuracy from 0-40 Cel.
The basic functionality is exposed as a counter that is always running
at 1 Hz. Much more functionality is exposed as driver-specific API,
including the ability to translate between the time scale of the DS3231
and the time scale of the Zephyr uptime clock. This allows correlation
of events in the system clock to UTC, TAI, or whatever time scale is
used to maintain the DS3231.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Add a driver that can handle several instances of AT45 family chips,
which are enabled by specifying DT nodes for them with the "compatible"
property set to "atmel,at45" and other required properties like JEDEC
ID, chip capacity, block and page size etc. configured accordingly.
The driver is only capable of using "power of 2" binary page sizes in
those chips and at initialization configures them to work in that mode
(unless it is already done).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This header is physically related to the Adafruit Feather, but uses a
different pin numbering and exposes a slightly different set of pins.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The TPM (Timer/PWM Module) is a 2- to 8-channel timer which supports
input capture, output compare, and the generation of PWM signals to
control electric motor and power management applications.
This patch adds the driver and the binding necessary for instantiating
the driver. The work is based on the RV32M1 driver for TPM done by
Henrik Brix Andersen. A later patch will enable this driver to be used
for the KW41Z SoC, if PWM support is requested.
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
This patch introduces the periph to/from memory dma transfer
using the dmamux feature and define new values
for dma cells on client side
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Reworked sam_gmac driver to get pin ctrl/mux configuration information
from the device tree instead of via Kconfig and defines in soc_pinmap.h
We remove defines from soc_pinmap.h that are no longer needed due to
getting all that information from devicetree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This includes the dma cells as client for the spi
An example of the client part is defined in the dma.yaml
Consequently, bindings for the dmas property becomes then 'not required'
Including dma.yaml is not needed as dma properties
are now part of base.yaml
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Do not assume in the SoC level device trees that NXP Kinetis FlexTimer
nodes will always be configured as PWM. Instead, configure FlexTimer
nodes for PWM at the board level for NXP Kinetis boards.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rework the devicetree to utilize new DT_INST macros and extract per
instance data for clocks from devicetree.
We add a property ('calib-offset') for the SAM{D,E}5x family of SoCs
that is the bit position offset from ADC0 BIASCOMP in the NVM Software
Calibration Area Mapping. For ADC0 this is typically 0 and for ADC1
this will be 14.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In STM32 can driver CAN2 instance need to know the base address
of CAN1 instance which is referenced as master can.
Add this information as an optional property to stm32 can binding.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert driver to use the new device tree macro's instead of
dts_fixup.h based macros. This moves us closer to removing both
dts_fixup.h and per instance Kconfig symbols.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add local-mac-address on DT and enable it on rf2xx driver. If user
define local-mac-address this value will be used as default mac address.
Otherwise driver automatically add a random mac address.
On application level user can change default mac address using net_mgmt
command with NET_REQUEST_IEEE802154_SET_EXT_ADDR parameter defined on
include/net/ieee802154_mgmt.h header.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Rework the devicetree to utilize new DT_INST macros and extract per
instance data for clocks from devicetree. Move the prescaler setting
from Kconfig to devicetree as well.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add clock references for ADC and TC devices. Update the bindings for
these devices to require clocks property and update the dtsi files to
have the clock info.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rework the devicetree to utilize new DT_INST macros and extract per
instance data for clocks and dma from devicetree. We update the
atmel,sam0-spi binding for dma to replace the rxdma and txdma
properties with proper 'dmas' property.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rework the devicetree to utilize new DT_INST macros and extract per
instance data for clocks and dma from devicetree. We update the
atmel,sam0-i2c binding for dma to replace the dma property with
proper 'dmas' property.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add pinctl support for the SAM SPI device. We update the SPI
binding to have pinctrl-0 bindings that are expected to have
at least phandles for MISO, MOSI, and SPCK, but might also have
various chip selects as well.
The pinctrl nodes will have an 'atmel,pins' property that describes the
GPIO port, pin and periphal configuration for that pin.
We update sam*-pinctrl.dtsi files with all the various pin ctrl
configuration operations supported by the given SoC family. These
files are based on data extracted from the Atmel ASF HAL
(in include/sam<FAMILY>/pio/*.h).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adding port information for uart tx and rx pins in dts, so that it can
be more systematically retrieved in the uart driver.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Reworked adc_sam_afec driver to utilize new DT_INST macros as part of
this rework we also now get pin ctrl/mux configuration information
from the device tree instead of via Kconfig and defines in soc_pinmap.h
We remove defines from dts_fixup.h and soc_pinmap.h and associated
Kconfig symbols that are no longer needed due to getting all that
information from devicetree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rework the devicetree to utilize new DT_INST macros and extract per
instance data for clocks and dma from devicetree. We update the
atmel,sam0-uart binding for dma to replace the rxdma and txdma
properties with proper 'dmas' property.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move the atmel,sam0-dmac binding under the dma binding dir and add
cell information for channel and trigger source. Update the associated
dtsi files to match these changes.
This is in prep of ATMEL SAM0 SERCOMM devices like UART, I2C, and SPI to
user proper 'dmas' property to specify the dma info to use.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for the GCLK, MCLK, and PM clock controllers. Add bindings
and devicetree nodes associated with these clock controllers. Also add
clock references for the SERCOM peripheral set to allow those drivers
(i2c, spi, uart) to utilize this information.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add pinctl support for the SAM TWI and TWIHS I2C devices. We update
the TWI and TWIHS I2C bindings to have pinctrl-0 bindings that are
expected to have 2 phandles to the TWCK & TWD pinctrl nodes.
The pinctrl nodes will have an 'atmel,pins' property that describes the
GPIO port, pin and periphal configuration for that pin.
We update sam*-pinctrl.dtsi files with all the various pin ctrl
configuration operations supported by the given SoC family. These
files are based on data extracted from the Atmel ASF HAL
(in include/sam<FAMILY>/pio/*.h).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We've had clocks in base.yaml but didn't have clock-names. Add it to
base.yaml with similar functionality to interrupt-names, reg-names, etc.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
enable the interrupt functionality for sx1509b gpio expander,
when the CONFIG_GPIO_SX1509B_INTERRUPT config is enabled.
The gpio pin used for interrupt should be configured in the
device tree sx1509b node before enabling the interrupt
configuration.
Signed-off-by: Viraaj Somayajula <sviraaj@zedblox.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
DAC (digital to analog converter) peripheral driver with a generic API
suitable for most MCUs (only basic DAC features considered).
Signed-off-by: Martin Jäger <martin@libre.solar>
Add pinctl support for the SAM UART and SAM USART devices. We update
the UART and USART bindings to have pinctrl-0 bindings that are expected
to have 2 phandles to the RX & TX pinctrl nodes.
The pinctrl nodes will have an 'atmel,pins' property that describes the
GPIO port, pin and periphal configuration for that pin.
We add sam*-pinctrl.dtsi files with all the various pin ctrl
configuration operations supported by the given SoC family. These
files are based on data extracted from the Atmel ASF HAL
(in include/sam<FAMILY>/pio/*.h).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The atmel,pins property will be utilized to describe pin mux
configuration. The property will be a phandle-array in which the
phandle points to the given GPIO port the pin is on, the pin number, and
the mux configuration.
This change updates the atmel,sam-gpio binding to support that
phandle-array and updates the associated SoC dtsi files as well.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add dts support for the headers on Adafruit Feather boards.
This will allow adding FeatherWing boards as shields.
Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
This add the following options to GMAC device tree bindings:
- max-frame-size
- max-speed
- phy-connection-type
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
dmas and dma-names properties could be used by a wide range
of potential dma client, hence put them in base.yaml, as
optional properties.
Since current stm32-i2s driver implementation only support
dma, set these properties as required.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add a property to the openisa,rv32m1-gpio binding that relates the GPIO
node to the pinmux PORT node.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver to use DT_INST macros and remove related board per
instance Kconfig symbol usage.
Updated the openisa,rv32m1_vega-pinmux binding to require the label
property and updated the rv32m1.dtsi to add label properties for the
pinmux nodes.
Also update gpio_basic_api test to use DT_NODELABEL.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The flexcomm peripheral on lpc socs can be configured into uart, spi,
i2c, or i2s mode. Introduce a shared device tree binding that gets
included by the more specific driver type bindings.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The st,stm32l0-flash-controller did not have a binding, add one for it.
Also made a comment in stm32l0.dtsi that the driver doesn't currently
support this controller.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Group all the GPIO controllers under a pinctl node so that we have a
container for pinmux configuration data.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds i2c device tree bindings and nodes for the lpc54xxx and lpc55s6x
socs in preparation for adding a new i2c driver.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
With the introduction of the new device-tree macros it is now possible
to use the settings for speed and flow-control from the bus node instead
of having the same properties on the esp node itself.
Signed-off-by: Tobias Svehagen <tobias.svehagen@gmail.com>
Make the label property required for "arm,cmsdk-gpio" compatible
nodes. Update binding to mark the 'label' property required and updated
associated .dts files to add a 'label' property if it didn't exist.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a YAML, DTS node and driver support to utilize data from devicetree
for register address and driver name.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
And implement DT_ANY_INST_ON_BUS() in terms of it.
This makes some error messages quite a bit shorter by avoiding
UTIL_LISTIFY(), which has a nasty temper and tends to explode if not
treated gently.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The label property of the fixed-partitions child binding was duplicated
with two different values. This is invalid yaml, but went unnoticed by
pyYAML. Removed first entry to preserve value produced by pyYAML
behavior of overwriting duplicates.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
Added properties to support the core interrupt controller on the NIOS2
cpu cores and enable that support for the NS16550 UART.
We rename some compatibles so that the cpu core compatibles is unique.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add device tree binding for the NXP Kinetis Low Power Timer (LPTMR)
module. This module can either act as a 16 bit counter or a 16 bit
pulse counter.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This adds the DTS binding for the CAVS Intra-DSP Communication (IDC)
driver for the DSP on Intel SoC.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Convert the driver to use DT_INST_ defines, update all dependent dts,
soc and board files.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This is joint work with Kumar Gala (see signed-off-by).
Add helper macros which abstract the "true names" of each of the four
types of node identifier we intend to support (e.g. DT_ALIAS(),
DT_INST()).
These can be passed to a new DT_PROP() macro which can be used to read
the value of a devicetree property given a node identifier from one of
these four other macros, and the as-a-c-token name of the property.
Add other accessor macros and tests as well.
Add some convenience APIs for writing device drivers based on instance
numbers as well. Drivers can "#define DT_DRV_COMPAT driver_compatible"
at the top of the file, then utilize these DT_INST_* macros to access
various property defines.
For example, the uart_sifive driver can do:
#define DT_DRV_COMPAT sifive_uart0
Then use DT_INST macros like:
.port = DT_INST_REG_ADDR(0),
.sys_clk_freq = DT_INST_PROP(0, clock_frequency),
For convenience working with specific hardware, also add:
<devicetree/gpio.h>
<devicetree/adc.h>
<devicetree/spi.h>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This is useful for devicetree documentation, examples, and tests,
where we need to put something for the vendor but we can't use an
actual piece of hardware for some reason.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The `xlnx,ttcps` binding, despite having the file name of
`xlnx,ttcps.yaml`, had the compatible property of `cdns,ttc`.
While it is true that the Xilinx ZynqMP platform embeds the Cadence
Triple Timer Counter (TTC) IP core, its TTC differs from the original
Cadence core in that it implements 32-bit counters, instead of the
16-bit counters defined in the original; hence, the Xilinx variant is
not compatible with the original Cadence version and should be treated
as a different device.
This commit changes the `xlnx,ttcps.yaml` compatible property to
`xlnx,ttcps` for the above reasons.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This adds support for the Espressif ESP8266 and ESP32 devices to be used
as peripherals on a UART.
There are two main AT command versions that can be selected, 1.7 and
2.0. Since they behave a bit different it is important to select the
one that matches the used in the firmware on your device.
When downloading large amounts of data it is highly recommended to
enable CONFIG_ESP_PASSIVE_TCP and flow control on the UART so that
data is not lost due to UART speed or receive buffer size.
Currently unsupported:
- Changing UDP endpoint with a sendto()
- Bind to a specific local port
- Server socket operations, ie listen() and accept()
Official AT firmware for ESP8266 and ESP32 can be found at:
https://github.com/espressif/esp-at
Signed-off-by: Tobias Svehagen <tobias.svehagen@gmail.com>
The IIS2MDC is a 3D digital magnetometer ultra-low power sensor
for industrial applications, which can be interfaced through
either I2C or SPI bus.
https://www.st.com/resource/en/datasheet/iis2mdc.pdf
This driver is based on stmemsc i/f v1.02.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Extended nrf_uart driver to support TX only.
When RX pin is not provided then RX is not started at all. This
allows to achieve low power with logging/console enabled.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add entropy driver based on GECKO TRNG module along with device
tree support for EFM32PG and EFR32MG SOCs.
Signed-off-by: Pooja Karanjekar <pooja.karanjekar@lemonbeat.com>
The ISM330DHCX is a ultra-low power IMU with a 3D digital accelerometer
and 3D digital gyroscope tailored for Industry 4.0 applications, which
can be interfaced through either I2C or SPI bus.
https://www.st.com/resource/en/datasheet/ism330dhcx.pdf
This driver is based on stmemsc i/f v1.02.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add a property to the nxp,kinetis-gpio binding that related the GPIO
node to the pinmux PORT node.
For the kl25z we add the pinmux nodes as well since they didn't exist.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The IIS2DLPC is a 3D digital accelerometer ultra-low power sensor
for industrial applications, which can be interfaced through either
I2C or SPI bus.
https://www.st.com/resource/en/datasheet/iis2dlpc.pdf
This driver is based on stmemsc i/f v1.02
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Introduction of tachometer device nodes for the Microchip
MEC1501 SOC. In addition, dts bindings for are also introduced.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
Add the girq and girq-bit fields to the binding. This allows
encoding GIRQ related information inside device tree.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add girq and girq-bit to encode per device information. This allows the
driver to get any device unique info from device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add girq and girq-bit to encode per device information. This allows the
driver to get any device unique info from device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The max-value should just be an int and not an array. Change the type
to 'int' in the binding and fixup the driver to match.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert pms7003 sensor driver to utilize device tree.
DTS would look something like the following for the pms7003:
uart {
pms7003: pms7003 {
status = "okay";
compatible = "plantower,pms7003";
label = "pms7003";
};
};
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert ak8975 sensor driver to utilize device tree.
This also supports the ak8975 embedded in a invensense MPU9150. In such
a case the device tree node should look something like, where the ak8975
is a child of the mpu9150.
mpu9150@68 {
compatible = "invensense,mpu9150";
reg = <0x68>;
label = "mpu9150";
#address-cells = <1>;
#size-cells = <0>;
ak8975@c {
compatible = "asahi-kasei,ak8975";
reg = <0xc>;
label = "ak8975";
};
};
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace Kconfig configuration data with devicetree bindings using
(ADC) io channels. Rework the sample to document expectations about
the relationship between the reference voltage and the divider input
voltage, and update the sensor configuration to support Nordic SAADC.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Replace Kconfig configuration data with devicetree bindings using
(ADC) io channels. Rework the sample to document expectations about
the relationship between the reference voltage and the divider input
voltage, and update the sensor configuration to support Nordic SAADC.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This adds a simple binding for the Cadence Tensilica Xtensa LX4
CPU. File originally from the LX6 binding.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Update to use new API for GPIO pin configuration and operation. Fix
invalid arithmetic on void pointer. Convert to support devicetree.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
