Note that the failure case can only be reached when PCI is enabled.
Otherwise, the if-block is always false, which reduces code size
for non-PCI platforms.
Change-Id: I1f9def66b2ce7f08fc13b8f03e675ce4cd469e6d
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The D2000 CRB is similar to the Arduino 101 (at least as GPIO is
concerned). Add support for using the GPIO controller without QMSI
libraries.
Change-Id: I001da05c9a9d5771b2ec678a9d4a91c44db05289
Signed-off-by: Vlad Dogaru <vlad.dogaru@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ib7e0b81b2df1a0225fc244fea3035416d0a4f282
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Current interrupt status tells which pins triggered this interrupt, thus
the handler should acknowledge only these and not all possible, since we
don't know if other gpio controller interrupts are being taken care of
at the same moment.
Change-Id: I7d3f1bb13bb293f7b7ce9b5a717a37bbdd4e4e42
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Vlad Lungu <vlad.lungu@windriver.com>
Added device power management hook infrastructure. Added
DEVICE_INIT_PM and SYS_INIT_PM macros that creates device
structures with the supplied device_ops structure containing
the hooks.
Added example support in gpio_dw driver. Updated the sample
app and tested using LPS and Device Suspend Only policies.
Change-Id: I2fe347f8d8fd1041d8318e02738990deb8c5d68e
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch replaces all occurences of the macro DEV_NOT_CONFIG by
-EPERM at the driver level. This patch is part of the effort to
transition from DEV_* codes to errno.h codes.
Change-Id: I3054c8aa76319a58a2eec089b8a72bf301c85391
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
It's not a function and requires all its arguments to be build-time
constants. Make this more obvious to the end user to ease confusion.
Change-Id: I64107cf4d9db9f0e853026ce78e477060570fe6f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This is the last step before obsoleting DEVICE_DEFINE() and
DEVICE_INIT_CONFIG_DEFINE().
Change-Id: Ica4257662969048083ab9839872b4b437b8b351b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename them to DEVICE_NAME_GET and DEVICE_GET to fit in the 'device'
namespace.
Change-Id: I407a7f284ed4d1c071961b46615eea859c2e825f
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename it to DEVICE_DEFINE() so that it fits in the 'device' namespace.
Change-Id: I3af3a39cf9154359b31d22729d0db9f710cd202b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename it to DEVICE_INIT_CONFIG_DEFINE(), because (a) it was not fitting
in any namespace and (b) it is not used to declare, but rather define a
object.
Change-Id: I1da5822f06b85a9fb024b5b184afd0ccc01012ec
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
There is no such thing as "IA" in Quark SE SS as it is an ARC core. Plus
for this very specific feature it does not require the ARC aux regs
instruction to read/write in the given mask address.
And fixing also the CONFIG_ option to check.
Change-Id: I1f63348ec85f6e006795f7641c912a30fc003709
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This is valid only for Quark SE and Quark SE SS, where it requires to
unmask the interrupt for each specific controller. Thus making the
function generic, using the parameter as the specific mask base address.
Change-Id: Iea0a412b8d94a1ab5e1f3e339eaf632eacee5797
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The interrupt API has been redesigned:
- irq_connect() for dynamic interrupts renamed to irq_connect_dynamic().
It will be used in situations where the new static irq_connect()
won't work, i.e. the value of arguments can't be computed at build time
- a new API for static interrupts replaces irq_connect(). it is used
exactly the same way as its dynamic counterpart. The old static irq
macros will be removed
- Separate stub assembly files are no longer needed as the stubs are now
generated inline with irq_connect()
ReST documentation updated for the changed API. Some detail about the
IDT in ROM added, and an oblique reference to the internal-only
_irq_handler_set() API removed; we don't talk about internal APIs in
the official documentation.
Change-Id: I280519993da0e0fe671eb537a876f67de33d3cd4
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Rename class in pci_dev_info struct to allow to use C++ compilers.
Updated drivers to use new struct.
Change-Id: I17b94cb7bc094bccd615c8389a28589bfa90cab8
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Fixes interruption connection parameters, ISR parameter is not null anymore.
Removes irq_connect call that is a dynamic irq api that should not be
used along static irq api: IRQ_CONNECT_STATIC and IRQ_CONFIG.
Change-Id: I232c8562d2dcda3229776b561e2c1f4608a31cdd
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
The current gpio_dw_initialize implementation masks the interruptions in the line
dw_write(base_addr, INTMASK, ~(0)) to assign api functions and initialize
interrupt vectors and handlers safely. Immediately after this, the driver expects
that gpio_dw_unmask_int(port) unmasks the interrupts. Without this patch that
implementation is empty for the quark se ss board.
Change-Id: Iac84c8807fcadad8c256c3fcaa4ff624b6337bf3
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Change terminology and use SoC instead of platform. An SoC provides
features and default configurations available with an SoC. A board
implements the SoC and adds more features and IP block specific to the
board to extend the SoC functionality such as sensors and debugging
features.
Change-Id: I15e8d78a6d4ecd5cfb3bc25ced9ba77e5ea1122f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
1. Need to unmask interrupts for the sensor subsystem.
2. The GPIO controllers need their clock enabled before they can
start sending out interrupts.
3. Setting up ISR on ARC requires usage of irq_connect().
Change-Id: I633b07292f11e5c5e768fc51fabb70769d407609
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Move the common #define for IOAPIC interrupt trigger flags out of
platform board.h and into the driver.
Change-Id: Ia0a069464392714f38037841de52e8d265fa4f49
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Removes the 'priority' parameter from the IRQ_CONFIG macro.
This parameter was not used anymore in any architecture.
The priority is handled in the IRQ_CONNECT macro.
The documentation is updated as well.
Change-Id: I24a293c5e41bd729d5e759113e0c4a8a6a61e0dd
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Adds io/aux register support for IP configuration.
x86 and ARM configure IP through MMIO register access.
ARC architecture configure IP through io/aux register access.
Change-Id: I4d07b91af09d88b7eb6ac1aa02e875dcd626bd26
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Static irq api expect to have an isr with signature
void isr(void *arg).
This fixes the warning messages due the difference on
the isr parameter.
Change-Id: I64099ce47ba481b40446d5fb7e35fce0e46a9624
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
BIT() is already defined as a generic utility macro in misc/util.h
Change-Id: Ie74bbfe657de5de980439e30b2dcbb9168b69257
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This is currently valid for quark_se platform. It's used internally to
suspend and/or resume the gpio controller.
Change-Id: I5147568ba6b0450363566b5f9fd2e8aa7e41df49
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Change-Id: Ie58e8611a8fe9edec9ebcb123532a97f396098f4
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
There is no such feature per-pin. LS_SYNC is set or unset for the whole
controller.
Change-Id: Ic67048e29a9cc25a19e6a7bcc11d21dd1e65be61
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This platform if actually a subsystem of the Quark SE SoC and is
not standalone. Use a more descriptive name and remove the architecture
from the platform name.
Change-Id: I16b1ab8dd668441683b07fc4512c219924463441
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Put initialization priorities as device driver Kconfig
parameter.
Initialization priority value for each platform is defined
in the platform Kconfig file.
Drivers and platform code use SYS_DEFINE_DEVICE to add
and initialization function.
Change-Id: I2f4f3c7370dac02408a1b50a0a1bade8b427a282
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
SYS_GET_DEVICE() needs the name set in DECLARE_DEVICE_INIT_CONFIG() not
the one in IRQ_CONNECT_STATIC().
Change-Id: Id1ed66953c863531411b34594ffed669ad524ef5
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
That fixes a build error. Platfom's board.h have to provide such flags
if they enable dw gpio 1 controller.
Take the opportunity to provide the right isr to IRQ_CONNECT_STATIC.
Change-Id: I16900ea04f7f7c5d3c99b93a92b00c1f651494de
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Adds the register definition for the DW GPIO hardware block.
This set of registers and offsets are specific for the SS
GPIO hardware block in the Quark SE platform.
In particular, the register BOTHEDGE (offset 0x68 in the
main GPIO block) does not exist on the SS GPIO block.
Change-Id: I4e16ec7c8e89015be1fc8bcdb1b7fa5377890b9d
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Flags allow passing IRQ triggering option for x86 architecture.
Each platform defines flags for a particular device and then
device driver uses them when registers the interrupt handler.
The change in API means that device drivers and sample
applications need to use the new API.
IRQ triggering configuration is now handled by device drivers
by using flags passed to interrupt registering API:
IRQ_CONNECT_STATIC() or irq_connect()
Change-Id: Ibc4312ea2b4032a2efc5b913c6389f780a2a11d1
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
A tiny fix where the pin is the bit position, not its mask.
Change-Id: I4ed8c4b2968ff28b407cab88903351bafe6501ba
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This patch updates the ISR initialization code to reflect recent
changes in the underlying Zephyr ISR infrastructure. It also adds
assertions to detect failures to lookup device bindings during
initialization.
Change-Id: I4bf1955da44a97f8c2652b96a390804c5cea73e3
Signed-off-by: Michael LeMay <michael.lemay@intel.com>
use gpio_dw instead of gpio_<function>_dw to be consistent in the
driver itself and with other drivers.
Change-Id: Ifb0e50c230f142197eb4b01c1bb4ce1c16e4753f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We now have BIT defined in a header file globally, so lets use it.
Change-Id: Ie7b87478cb5a9e977ec045efa072d28fab86e78b
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Allows to remove the both edges support from the DW GPIO driver.
Change-Id: I9e39cca320aeac5d10aafe7a83641917ad004fe6
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
This patch corrects gpio_dw_setup to use the MMIO base address
determined by PCI enumeration when that enumeration feature is enabled
instead of always using the default base address specified at compile
time.
Change-Id: If139c40ce30275694e01196a4a4aa529cd714f06
Signed-off-by: Michael LeMay <michael.lemay@intel.com>
In order to have drivers that are usable cross architecture the
signature for IRQ_CONFIG needs to be the same to avoid #ifdef hell in
the driver code based on architecture.
Update the macro and it usage for existing drivers
Change-Id: I22e142b21d4e984add231d1dbd97020e4823985f
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The naming convention used in the source is for there to be an
_ and not a - in the file. Fixing GPIO to be consistent with
the os naming conventions.
Change-Id: Ifc4356c14b52e2cc2411a7445b44c7cb57d2765c
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
