Commit graph

2258 commits

Author SHA1 Message Date
Ioannis Glaropoulos c028f88b37 arch: arm: remove redundant asm inline headers
This commit removes the unnecessary asm inline header for ARM.
It also adapts the stack.h and exc.h to use the ARM CMSIS inline
functions to access the IPSR and MSP registers.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-03-12 10:14:12 -05:00
Ioannis Glaropoulos 10b40ecaba arch: arm: conditionally select FP extension in cortex-m MCUs
This commit conditionally selects the ARMV7_M_ARMV8_M_FP option
in ARMv7-M/ARMv8-M Mainline processors, when the Floating Point
Extension is implemented (CPU_HAS_FPU is selected).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-03-11 21:53:50 -05:00
Ioannis Glaropoulos b75b01050d arch: arm: Stack Overflow Usage Fault log for ARMv8-M Mainline
This commit contributes the Stack Overflow UsageFault dumping
for ARMv8-M implementations that support the Main Extension.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-03-10 16:10:07 -06:00
Ioannis Glaropoulos cfab6e0806 arch: arm: define ARMv8-M Mainline K-option
This commit introduces the ARMV8_M_MAINLINE K-config option. The
option signifies the use of an ARMv8-M CPU supporting the Main
Extension. ARMv8-M Main Extension includes additional features
that are  not present in the ARMv7-M architecture.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-03-10 16:10:07 -06:00
Ioannis Glaropoulos d2e0d975f6 arch: arm: ARMv7-M/ARMv8-M Mainline dependency for programmable prios
This commit forces CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS to
depend on ARMV7_M_ARMV8_M_MAINLINE. This allows the user to get
a build warning if he manually selects
CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS for a CPU that does
not implement either ARMv7-M or ARMv8-M Mainline.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-03-10 16:10:07 -06:00
Kumar Gala 97331d1e98 arch: arm: mps2: Remove soc_irq.h
Move IRQ numbers into device tree so we can remove soc_irq.h.  We are
already using IRQ defines generated form the DTS so no point in having
soc_irq.h

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-10 11:42:25 -06:00
Kumar Gala fa0e8fd06d arch: arm: mps2: remove soc_memory_map.h
Further simplify the mps2 SoC code by removing soc_memory_map.h which
now only contains one define for the FPGAIO_BASE_ADDR.  We can just move
this to the once place its used.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-10 11:42:25 -06:00
Kumar Gala 40b7be5197 drivers: i2c: Add DTS support to ARM SBCon I2C controller
Added device tree support to the ARM SBCon I2C controller.  We utilize
the compatiable "arm,versatile-i2c" the binding from Linux for the some
peripheral block.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-10 11:42:25 -06:00
Kumar Gala 51db7b142c arch: arm: mps2: Remove unused defines and structs
Simplify the mps2 SoC code by removing defines and structs that aren't
used anywhere currently.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-10 11:42:25 -06:00
Kumar Gala ad18f84f50 arch: arm: Refactor CONFIG_CORTEX_M
Clean up Kconfig so each SoC just selects the specific Cortex-M
implementaiton rather than having to select both CORTEX_M and
CORTEX_{M0, M3, M4, etc.}.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-10 11:42:25 -06:00
Justin Watson aa7c91d0c2 driver: usart: Added support for interrupt driver USART on SAM E70.
Added interrupt support in the USART SAM serial driver.

Signed-off-by: Justin Watson <jwatson5@gmail.com>
2018-03-10 11:42:25 -06:00
Ioannis Glaropoulos 3b2f4b399d arch: arm: add missing floating-point fault logging
This commit adds the missing fault dumping for MemManage or Bus
fault occuring during floating-point lazy state preservation. In
addition, it introduces a Kconfig option for the ARMv7-M/ARMv8-M
Floating Point Extension.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-03-10 11:42:25 -06:00
Justin Watson b9c65e1882 drivers: GPIO Added GPIO for SAM family.
Added GPIO driver for SAM family of SoCs.

Signed-off-by: Justin Watson <jwatson5@gmail.com>
2018-03-10 11:42:25 -06:00
Ioannis Glaropoulos bd0ff3092a arch: arm: cmsis: cleanup cmsis.h and update error-code macros
This commit removes the macros for ARM fault flags from
include/arch/arm/cortex_m/cmsis.h header, since they are
defined in the respective core_cmXX.h header files. It also
modifies fault.c to use the updated fault macros taken directly
from ARM CMSIS headers.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-03-10 11:42:25 -06:00
Philémon Jaermann 8834a8d47b arm: stm32f446: Add support for stm32f446 SoC
Support for stm32f446xe SoC

Signed-off-by: Philémon Jaermann <p.jaermann@gmail.com>
2018-03-10 11:42:25 -06:00
Endre Karlson deeb74651b arm: stm32l0: Add support for stm32l0 soc
Add necessary kconfig and minimal device tree support for
the stm32l072xz variants.

Signed-off-by: Endre Karlson <endre.karlson@gmail.com>
2018-03-10 11:42:25 -06:00
Yannis Damigos efbb7c61a1 arch/arm/soc/stm32f4: Add STM32F412CG MCU support
Add STM32F412CG MCU support.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-03-10 11:42:25 -06:00
Michael Hope a8a36a23fc spi: sam0: use Device Tree for configuration.
Switch the SoC device tree to define a single entry per SERCOM instead
of one per mode.

Define a Device Tree binding for the SAM0 SPI and use it instead of
Kconfig for enabling / disabaling instances

Switch the Arduino Zero, Adafruit Feather M0 Basic Proto, and
Trinket M0 to use the new defintion.

Add the APA102 LED that's on the Trinket as a test.

Signed-off-by: Michael Hope <mlhx@google.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-10 11:42:25 -06:00
Nathan Tsoi 28758fe986 arch: arm: STM32F051X8 support
Add support for the STM32F051X8 processor on the STM32F0DISCOVERY board

Signed-off-by: Nathan Tsoi <nathan@vertile.com>
2018-03-10 11:42:25 -06:00
Michael Hope f2651d0cc7 usb: sam0: add a USB device driver.
Implements a USB device driver for the SAM0 series.

Signed-off-by: Michael Hope <mlhx@google.com>
2018-03-10 08:41:39 -05:00
Andy Gross cc69d373d1 arch: arm: Change method of __swap processing
This patch reworks the current ARM __swap() function into a C function.
Due to some issues with using svc calls withing fault handlers, we
needed to change the way we initiate a swap by removing the dependence
on svc #0.

Before __swap() is called, the system has already done an irq_lock().
Upon return from __swap(), the equivalent of an irq_lock() is done due
to restoration of the key value from the irq_lock preceeding the call.

For ARM V6M (M0/M0+), the pendsv bit is toggled and the irqs are
enabled.  There is no priority masking in v6m, so it's just a global
enable.  For ARM V7M, the priority mask has to be set to 0x0 to allow
for the pendsv IRQ to be taken.  This is done for both via a call to
irq_unlock(0).

After this unlock, a pendsv irq will be taken, either at the tail end
of the current irq handling if we are in handler mode, or immediately
due to the pendsv being asserted (no other outstanding irqs).  The next
thread will be scheduled.

Upon return from the context switch to the original
thread, the priority mask will already be correct due to the pendsv
processing.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-03-09 21:43:23 -05:00
Wayne Ren 2c577ff90e arch: arc: fix the bug of context switch in interrupt
* the bug comes out when a context switch happens in interrupt
* the bug only affects the em7d in emsk 2.3
* the bug is caused by
  * wrong operations of stack
  * wrong setting of SEC_STAT's IRM bit

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-03-08 11:01:11 +01:00
Wayne Ren 6612c9f683 arch: arc: bug fixes in arc mpu driver
fix the bug in _is_in_region
* RDB0 -> RDP0

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-03-08 11:01:11 +01:00
Andrzej Puzdrowski c788f84f25 drivers: flash: move FLASH_HAS_PAGE_LAYOUT Kconfig from arch
Keyword FLASH_HAS_PAGE_LAYOUT is related to flash and should
be declared in its Kconfig.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2018-03-08 10:18:57 +01:00
Andrew Boie c0771ea243 arch: x86: fix integer stub comments
The comment was obsolete; we simply do not allow use of the FPU or
vector math in ISRs. There is no desire to add such support, doing
this is properly offloaded to a worker thread.

Fixes #5283.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-03-06 17:16:03 -05:00
Andy Ross 285c5b26dd xtensa/asm2: Save shift/loop registers on exception entry
This was a little embarassing.  The swap code got this right, and the
interrupt exit path got it right, but on entry we weren't ever saving
the shift and loop registers for the interrupted context.

This almost always worked anyway as the loop registers aren't ever
used in any Zephyr code (gcc won't generate this style of loop AFAICT)
and the SAR shift amount register is generally used only in two pairs
of adjacent instructions making the chance of hitting that exact cycle
quite low in general.

But of course we have shift-happy crypto code in our tests, so this
got caught, thankfully.

See https://github.com/zephyrproject-rtos/zephyr/issues/6470

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2018-03-06 14:13:56 -08:00
Ioannis Glaropoulos 8c0c4be16a arch: arm: remove redundant dependence on ARM_CORE_MPU
MPU_STACK_GUARD option has a direct dependence on ARM_CORE_MPU.
Therefore, it is not required to have a conditional selection
of the option (if ARM_CORE_MPU) in ARM_STACK_PROTECTION.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-03-06 08:36:34 -05:00
Punit Vara a74725f1d3 kernel: Add posix API for semaphore
Add semaphore posix APIs.

Signed-off-by: Punit Vara <punit.vara@intel.com>
2018-03-05 20:51:36 -05:00
Leandro Pereira 02bc5fa8e0 soc: esp32: Enable building with newer ESP-IDF
ESP-IDF commit cb31222e added the dependency on a file named
"sdkconfig.h", which is equivalent to "autoconf.h" generated by kbuild
used in Zephyr.  It does not depend on anything from that file, though,
so just provide an empty file to keep the compiler from complaining.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2018-03-05 19:49:06 -05:00
Youvedeep Singh 216883ca82 kernel: POSIX: Compatibility layer for POSIX read-write lock APIs.
This patch provides POSIX read-write lock APIs for POSIX 1003.1
PSE52 standard.

Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
2018-03-05 19:27:37 -05:00
Andy Ross bdac8d070f xtensa/asm2: Fix stack pointer during preemption spills
When returning into a different thread than we interrupted, we
obviously need to spill all the existing register windows to make sure
all their values are in the old thread's stack.  But the code to do
this forgot to reset the current stack pointer to the value it had at
interrupt time (it was still pointing to the saved context below
that), so the caller of the interrupted function was spilling to the
wrong spot.

This wouldn't show up as an instant failure, it would only happen when
switching BACK to the improperly-spilled thread.  And even then it
would be a noop if the original interrupt handler was deep enough to
have spilled that function naturally.

In practice, this happened only in some instances on ESP-32 (which has
more windowed registers than qemu) when interrupting the idle thread
(which is very shallow) with a (very simple) timer interrupt.  Trivial
to see, hard to find.

See https://github.com/zephyrproject-rtos/zephyr/issues/6346 for more
detail.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2018-03-05 19:06:07 -05:00
Ioannis Glaropoulos 571069e986 arch: arm: correct fault address logging
In ARMv7-M (and ARMv8-M) architecture it is
implementation defined whether separate MMFAR and BFAR are
implemented. This commit ensures that we always get the true
faulting address displayed in case of MemManage- or BusFault.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-02-27 09:38:43 -06:00
Kumar Gala 83fa6c9554 dts: arm: Refactor SoC dts.fixup into arch/arm/soc
Move common SoC dts.fixup defines into arch/arm/soc/<SOC>/dts.fixup so
we remove duplication in the boards and only have board specific
defines in boards/arm/<FOO>/dts.fixup.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-02-26 10:55:36 -06:00
Kumar Gala dc6472f868 dts: x86/atom: Refactor SoC dts.fixup into arch/x86/soc/atom
Move common SoC dts.fixup defines into arch/x86/soc/atom/dts.fixup so we
remove duplication in the boards and only have board specific defines in
boards/x86/<FOO>/dts.fixup.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-02-26 10:55:36 -06:00
Kumar Gala d08661119e dts: ia32: Refactor SoC dts.fixup into arch/x86/soc/ia32
Move common SoC dts.fixup defines into arch/x86/soc/ia32/dts.fixup so we
remove duplication in the boards and only have board specific defines in
boards/x86/<FOO>/dts.fixup.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-02-26 10:55:36 -06:00
Kumar Gala 7e32b1d11f dts: quark_se: Refactor SoC dts.fixup into arch/x86/soc/intel_quark/<SOC>
Move common SoC dts.fixup defines into
arch/x86/soc/intel_quark/quark_se/dts.fixup so we remove duplication in
the boards and only have board specific defines in
boards/x86/<FOO>/dts.fixup.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-02-26 10:55:36 -06:00
Kumar Gala 6becb64dfc dts: quark_se_c1000_ss: Refactor dts.fixup into arch/arc/soc
Move common SoC dts.fixup defines into
arch/arc/soc/quark_se_c1000_ss/dts.fixup so we remove duplication in the
boards and only have board specific defines in
boards/arc/<FOO>/dts.fixup.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-02-26 10:55:36 -06:00
Alberto Escolar Piedras f004e0475e native: added more proper command line parameters parsing
Added a basic command line parameter parsing framework

Added the following options by now:
--stop-at=<time>: Auto-stop after <time> seconds
--seed=<seed>   : random seed for entropy device
--testargs      : any argument that follows is ignored in top level
                  and made available thru
                  native_get_test_cmd_line_args()

All command line parameters are still avaliable by calling
native_get_cmd_line_args(), but now you can also call
native_get_test_cmd_line_args() to get whatever was set after
--testargs

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2018-02-23 07:33:11 -05:00
David B. Kinder 3673698df1 doc: fix misspellings in XTENSA Kconfig
regular scan for spelling issues

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-02-22 15:28:04 -05:00
Youvedeep Singh 4d72e48d31 arch: POSIX: Add guard into posix_cheats file.
Some of APIs of POSIX implmentation layer has same name as
native_posix architecture. posix_cheats.h is used to handle this
duplication in API name. Adding a guard in posix_cheats.h based on
CONFIG_PTHREAD_API.

Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
2018-02-21 19:17:28 -05:00
Youvedeep Singh 8d040f1bcb kernel: POSIX: Compatibility layer for POSIX timer APIs.
This patch provides POSIX timer APIs for POSIX 1003.1 PSE52 standard.

Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
2018-02-21 19:17:28 -05:00
Youvedeep Singh d50b1fe981 kernel: POSIX: Compatibility layer for POSIX clock APIs.
This patch provides POSIX clock APIs for POSIX 1003.1 PSE52 standard.

Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
2018-02-21 19:17:28 -05:00
Youvedeep Singh 1f2e126d4d kernel: POSIX: Compatibility layer for POSIX sleep APIs.
This patch provides POSIX sleep APIs for POSIX 1003.1 PSE52 standard.
sleep(n) is implemented using Zephyr k_sleep API.
uleep(n) is implemented using Zephyr k_sleep/k_busy_Wait API.

Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
2018-02-21 19:17:28 -05:00
Youvedeep Singh 7eabf1025c kernel: POSIX: Compatibility layer for scheduler APIs.
This patch provides scheduler APIs for POSIX 1003.1 PSE52 standard.

Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
2018-02-21 19:17:28 -05:00
Youvedeep Singh c8aa6570c1 kernel: POSIX: Compatibility layer for pthread APIs.
This patch provides pthread APIs for POSIX 1003.1 PSE52 standard.

Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
2018-02-21 19:17:28 -05:00
Michael Hope 2e7146b7a6 arch: refactor the SAM0 SoC fixups into a SoC-level file.
This prepares the way for the Trinket M0.

Signed-off-by: Michael Hope <mlhx@google.com>
2018-02-21 16:03:10 -06:00
Kumar Gala 87a8d199d8 dts: atmel_sam: Refactor SoC dts.fixup into arch/arm/soc/atmel_sam
Move common SoC dts.fixup defines into
arch/arm/soc/atmel_sam/<BAR>/dts.fixup so we remove duplication in the
boards and only have board specific defines in
boards/arm/<FOO>/dts.fixup.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-02-21 16:02:12 -06:00
Kumar Gala a73e8fa083 dts: nxp: Refactor imx/rt dts.fixup into arch/arm/soc
Move common SoC dts.fixup defines into arch/arm/soc/nxp_imx/rt/dts.fixup
so we remove duplication in the boards and only have board specific
defines in boards/arm/<FOO>/dts.fixup.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-02-21 11:38:36 -06:00
Kumar Gala 4c50b1f199 dts: nxp: Refactor kwx dts.fixup into arch/arm/soc
Move common SoC dts.fixup defines into
arch/arm/soc/nxp_kinetis/kwx/dts.fixup so we remove duplication in
the boards and only have board specific defines in
boards/arm/<FOO>/dts.fixup.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-02-21 11:38:36 -06:00
Kumar Gala 8760edd6a5 dts: nxp: Refactor kl2x dts.fixup into arch/arm/soc
Move common SoC dts.fixup defines into
arch/arm/soc/nxp_kinetis/kl2x/dts.fixup so we remove duplication in
the boards and only have board specific defines in
boards/arm/<FOO>/dts.fixup.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-02-21 11:38:36 -06:00