Commit graph

18576 commits

Author SHA1 Message Date
Piotr Mienkowski
26ba99e972 drivers: Add Atmel SAM family I2C (TWI) driver
Added I2C bus (TWI) driver for Atmel SAM MCU family. Only
I2C Master Mode with 7 bit addressing is currently supported.

Tested on Arduino Due board.

Origin: Original

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2017-10-23 10:18:08 +02:00
Piotr Mienkowski
39e1497f1d dts: Add Peripheral ID field to Atmel SAM drivers
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2017-10-23 10:18:08 +02:00
Piotr Mienkowski
7e68430bcf dts: sam3x: fix incorrect usart2 IRQ number
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2017-10-23 10:18:08 +02:00
Adam Podogrocki
61467e019e iwdg: the sample of the use of STM32 Independent Watchdog
JIRA: ZEP-2347

Change-Id: I808e9f110681735cae45d14c5802636012f018cc
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-10-23 09:51:16 +02:00
Adam Podogrocki
6d4da19602 iwdg: make independent watchdog driver compliant with STM32Cube LL API
Appropriate inclusion done for F1/F3/F4/L4 families in SoC tree.

JIRA: ZEP-2347

Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-10-23 09:51:16 +02:00
Kumar Gala
46555f17e9 i2c: stm32f3: Cleanup how we enable the specific I2C driver
Match change we made to how I2C is enabled for other stm32 platforms:

Right now we allow for the I2C subsystem to be built without any drivers
enabled that utilize it.  When we added support for the new STM32 I2C
driver we forced the I2C driver to be enabled if the I2C subsystem was
enabled.  While this makes a reasonable amount of sense, it breaks
current assumptions for various testcases that we need to cleanup.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-10-22 22:05:37 -05:00
Jukka Rissanen
4fe8d17bca net: ieee802154: Add more information when hexdumping the pkt
When hexdumping the packet, print also information if we
received / transmitted packet. Also print information if the
hexdump is before compression or not.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-10-21 18:14:56 -04:00
David B. Kinder
9017a8451b doc: eliminate many "expected" doc gen warnings
Adding NET_MGMT_DEFINE_REQUEST_HANDLER to the doxygen configuration
list of pre-defined macros eliminates 800 lines of "expected" warning
messages from the document generation output.  Generated API docs
are unchanged. Cool.

Remember this if/when other macros pop up as a problem for the
doxygen/breathe/sphinx API generation tools.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-10-20 19:34:45 -04:00
Anas Nashif
f35002c04d ci: fix encoding of documentation warning file
The file was opened as text, to avoid issues with UTF-8 in the future,
make it all binary and encode to UTF-8 correctly.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-20 15:53:17 -04:00
David B. Kinder
3d2e1dc431 doc: fix doxygen handling of __attribute__(x)
The predefined macro list for doxygen processing had a typo error
causing __attribute__(x) to not be handled correctly.

kernel.h was recently updated to include use of
 __attribute__((sentinel)) and doxygen wasn't happy about
processing the API doc comments for the affected function.

Also added a couple of other predefined macros used in Zephyr.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-10-20 15:29:10 -04:00
Andrew Boie
98bf5234dc Revert "kernel: arch interface for memory domain"
This reverts commit 9bbe7bd61e.
2017-10-20 15:02:59 -04:00
Andrew Boie
48af600a7a Revert "ARM: MPU: Arch specific memory domain APIs"
This reverts commit 7add3cdd82.
2017-10-20 15:02:59 -04:00
Andrew Boie
d7631ec7e4 Revert "x86: MMU: Memory domain implementation for x86"
This reverts commit d0f6ce2d98.
2017-10-20 15:02:59 -04:00
Andrew Boie
de777adf7b Revert "x86: MMU: Configure page tables entries for memory domain in swap."
This reverts commit a8b9353421.
2017-10-20 15:02:59 -04:00
Andrew Boie
fd2927609d Revert "kernel: Arch specific memory domain APIs added"
This reverts commit 8d910b36a3.
2017-10-20 15:02:59 -04:00
Andrew Boie
21a7a0f576 Revert "samples: MPU: updated the memory domain test for x86."
This reverts commit 35a4c679b4.
2017-10-20 15:02:59 -04:00
Adithya Baglody
35a4c679b4 samples: MPU: updated the memory domain test for x86.
GH-3852

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-10-20 10:39:51 -07:00
Adithya Baglody
8d910b36a3 kernel: Arch specific memory domain APIs added
Added arch specific calls to handle memory domain destroy
and removal of partition.

GH-3852

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-10-20 10:39:51 -07:00
Adithya Baglody
a8b9353421 x86: MMU: Configure page tables entries for memory domain in swap.
During swap the required page tables are configured. The outgoing
thread's memory domain pages are reset and the incoming thread's
memory domain is loaded. The pages are configured if userspace
is enabled and if memory domain has been initialized before
calling swap.

GH-3852

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-10-20 10:39:51 -07:00
Adithya Baglody
d0f6ce2d98 x86: MMU: Memory domain implementation for x86
Added support for memory domain implementation.

GH-3852

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-10-20 10:39:51 -07:00
Adithya Baglody
7add3cdd82 ARM: MPU: Arch specific memory domain APIs
Added architecture specific support for memory domain destroy
and remove partition for arm and nxp. An optimized version of
remove partition was also added.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-10-20 10:39:51 -07:00
Adithya Baglody
9bbe7bd61e kernel: arch interface for memory domain
Additional arch specific interfaces to handle memory domain
destroy and single partition removal.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-10-20 10:39:51 -07:00
Erwan Gouriou
de770f56b4 stm32cube: clean kbuild after removing usage of HAL in serial driver
Since STM32 serial driver is no more using HAL, update kbuild for all
STM32 series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-10-20 12:28:11 -05:00
Erwan Gouriou
da210ba0ba driver: serial: Move STM32 UART driver to LL API
STM32 UART driver was using a mix of LL/HAL APIs.  This commit removes
calls to HAL API and replaces them with LL APIs.  No functional change
have been seen during non regression testing.

But we could note a direct gain of 1Kb of ROM

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-10-20 12:28:11 -05:00
Yannis Damigos
a172f72d84 boards: stm32f3_disco: Add I2C support
Add I2C support to STM32F3DISCOVERY board

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-10-20 12:28:11 -05:00
Yannis Damigos
1a85a80200 drivers: i2c_ll_stm32: STM32F0/3 set I2C clock source
STM32F0/3 I2C's independent clock source supports only
HSI and SYSCLK, not APB1. We force I2C clock source to SYSCLK.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-10-20 12:28:11 -05:00
Yannis Damigos
b248b85c76 ext: stm32cube: Define USE_FULL_LL_DRIVER
This patch enables the LL API get funtions for system and
peripherals clocks frequency.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-10-20 12:28:11 -05:00
Maureen Helm
e0954d3118 serial: Refactor mcux lpsci shim driver to use clock control interface
Refactors the mcux lpsci shim driver to use the clock control interface
instead of calling CLOCK_GetFreq() directly. This will allow SoCs with
different clock architectures to reuse this driver.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-10-20 12:28:11 -05:00
Maureen Helm
17a6d29f67 serial: Refactor mcux lpuart shim driver to use clock control interface
Refactors the mcux lpuart shim driver to use the clock control interface
instead of calling CLOCK_GetFreq() directly. This will allow SoCs with
different clock architectures to reuse this driver.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-10-20 12:28:11 -05:00
Maureen Helm
e042e249b1 serial: Refactor mcux uart shim driver to use clock control interface
Use the clock control interface instead of calling CLOCK_GetFreq()
directly. This will allow SoCs with different clock architectures to
reuse this driver.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-10-20 12:28:11 -05:00
Maureen Helm
6312b0e6a1 arm: Enable the mcux sim clock control driver on Kinetis SoCs
Because the mcux shim drivers will soon depend on a clock control
interface, enable the mcux sim clock control driver by default on all
Kinetis SoCs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-10-20 12:28:11 -05:00
Maureen Helm
7a60782f67 clock_control: Introduce mcux sim driver
Adds a new clock control driver for Kinetis SoCs that have the system
integration (SIM) module. This will allow mcux shim drivers, such as
uart and i2c, to abstract the call to CLOCK_GetFreq() behind the
clock_control interface and thus be reused for SoCs with different clock
architectures.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-10-20 12:28:11 -05:00
Maureen Helm
3291735d11 dts: Add Kinetis SIM clock bindings
Adds device tree bindings for the Kinetis System Integration Module
(SIM), and defines peripheral source clocks (e.g., system clock or bus
clock) and clock gates for all Kinetis SoCs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-10-20 12:28:11 -05:00
Yannis Damigos
213df22c99 ext: hal: stm32cube: Fix LSI_VALUE for F1, F3 families
This patch sets the correct LSI_VALUE, according to
STM32F3 reference manual's (RM0316) section 9.2.5 and
STM32F1 reference manual's (RM0008) section 7.2.5.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-10-20 12:28:11 -05:00
Anas Nashif
321e6c2701 samples: echo client/server: test more configurations
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-20 13:22:25 -04:00
Anas Nashif
1c60c00504 samples: echo_server: remove unrelated CONFIG_ARC_INIT
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-20 13:22:25 -04:00
Ravi kumar Veeramally
b2d3656c1d i2c: twihs_sam: fix mode config variable usage
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-20 13:22:25 -04:00
Jukka Rissanen
6a0c5dede7 samples: net: ieee802154: Update config to sane values
The IEEE 802.15.4 UART pipe config files in
echo_server/prj_qemu_802154.conf and echo_client/prj_qemu_802154.conf
did not had proper configuration options set. This prevents
qemu<->qemu communication between the echo-server and echo-client.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-10-20 12:55:55 -04:00
Johan Hedberg
afc9b5098b Bluetooth: Mesh: Update TODO with current status
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2017-10-20 17:53:31 +03:00
Jukka Rissanen
2fba7024af net: app: Fix compilation if TCP is not enabled
If building a server that does not support TCP, then the
get_server_ctx() is not needed and thus needs to be compiled out.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-10-20 10:11:46 -04:00
Paul Sokolovsky
a3eb4fcd3e net: pkt: net_pkt_tcp/udp_data: Better document caveats
Explicitly note that while these functions return pointers to
headers, the headers themselves may be fragmented into different
data fragments. 1a2f24f920 is an example where this might have
been overlooked.

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2017-10-20 11:01:48 +03:00
Michael Scott
545db8b482 net: lwm2m: remove unused last_value_len from lwm2m_input_context
Signed-off-by: Michael Scott <michael.scott@linaro.org>
2017-10-20 10:40:55 +03:00
Michael Scott
fcd37eb79d net: lwm2m: use isdigit in JSON formatter
Signed-off-by: Michael Scott <michael.scott@linaro.org>
2017-10-20 10:40:55 +03:00
Michael Scott
078288b2be net: lwm2m: move non-public data out of shared TLV include
Signed-off-by: Michael Scott <michael.scott@linaro.org>
2017-10-20 10:40:55 +03:00
Michael Scott
1fb61d21ac net: lwm2m: move non-public data out of shared JSON include
Signed-off-by: Michael Scott <michael.scott@linaro.org>
2017-10-20 10:40:55 +03:00
Michael Scott
7f7e203334 net: lwm2m: remove unused JSON parser types
Signed-off-by: Michael Scott <michael.scott@linaro.org>
2017-10-20 10:40:55 +03:00
Michael Scott
12072a378f net: lwm2m: cleanup function parameter naming
Don't use names like "strlen" for parameters.  Try and name buffer
parameters consistently.

NOTE: For several functions I removed "const" flag.  This is
intentional and will be needed in upcoming patches.

Signed-off-by: Michael Scott <michael.scott@linaro.org>
2017-10-20 10:40:55 +03:00
Michael Scott
9b643e2be7 net: lwm2m: cleanup TODOs in firmware obj.
Remove some left over TODOs and also fix a TODO where we need to return
the appropriate error code to generate a 4.05 response.

Signed-off-by: Michael Scott <michael.scott@linaro.org>
2017-10-20 10:39:00 +03:00
Michael Scott
9a8597399d net: coap: fix coap packet length calculation
This calculation reads the length portion of the COAP header to determine
the length of the coap packet.  However, when encrypted via DTLS this
value seems to be getting corrupted.  Let's change this calculation so
that it will work for when DTLS is both enabled and disabled.  Use the
total length of the fragment data and substract back out the headers
to get a correct value.

Signed-off-by: Michael Scott <michael.scott@linaro.org>
2017-10-20 10:37:55 +03:00
Ravi kumar Veeramally
ca642fbf62 net: tests: Add more testcases to 6lo tests
Add more testcases of SAC 1 and SAM 00 combinations to 6lo tests.

Signed-off-by: Ravi kumar Veeramally <ravikumar.veeramally@linux.intel.com>
2017-10-20 10:33:28 +03:00