If we were trying to send max MTU size data, then the temporary
frame_buf was overflowing because it only allocated 1500 bytes
for the buffer but then copied 1514 bytes into it (max mtu +
ethernet header).
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
SoCs outside the Kinetis family can have the TRNG module, so move the
HAS_TRNG config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
SoCs outside the Kinetis family can have the RNGA module, so move the
HAS_RNGA config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
SoCs outside the Kinetis family can have the FTM module, so move the
HAS_FTM config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux
Note that 'select HAS_FTM' was previously missing from Kconfig.soc and
is now fixed.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
SoCs outside the Kinetis family can have the ADC16 module, so move the
HAS_ADC16 config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
SoCs outside the Kinetis family can have the LPSCI module, so move the
HAS_LPSCI config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
SoCs outside the Kinetis family can have the LPUART module, so move the
HAS_LPUART config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch removes deprecated API functions and data types from
dma.h file as well as device drivers.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
- place all sensor Kconfig options in submenu
- separate device drivers and common options with a comment line
- align help text
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Composite multifunction USB devices should be able to know about
configuration change, implement it through existing callback.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Cleanup I2C drivers to not use bitfield access for config information
and instead use accessor macros that use shifts & masks. This is
cleanup towards removing the bitfield access in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
With logging enabled, this leads to type mismatch warning, which is
promoted to error when building under CI.
Also, reomove extra "\n" from the logging messages.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Removing internal boolean in order to use the proper error code hold in
spi_context which was relevantly added in commit 6c717095b8.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
RCC_HCLK_DIV1 translates to 0x0 while apb_psc uses the value defined
by CONFIG_CLOCK_STM32_APB1/2_PRESCALER (range from 1 to 16).
Manually check if the defined prescaler is 1 or not and use that to
calculate the correct timer clock.
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Add support for TIM3 as it is widely available and pins available via
headers on several devices.
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Previous approach allowed only single word update for single
function call. Updating context in ISR was inefficient for
controllers supporting automatic multiple data packets transaction.
Signed-off-by: Michał Kruszewski <michal.kruszewski@nordicsemi.no>
I2C device drivers which support DTS have their default boot
configuration provided by DTS. The legacy I2C_x_DEFAULT_CFG
option in Kconfig is no longer required. This patch hides
this option from the Kconfig menu for I2C device drivers which
support DTS.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Default configuration for USART1 (Console output) on board
stm32f3_disco was set on PA9/PA10, which matches Rev-A/B
configuration. Though, on more recent configuration of the
board (Rev-C onward). USART1 is mapped to PC4/PC5.
This configuration has the benefit to support VCP, hence it
is chosen to be set by default.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add SPI3 pin definitions for PC10, PC11, PC12.
This is required to use SPI3 on disco_l475_iot1 board
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move all STM32 based board pinmux files into the board dirs so we are
consistent across all the STM32 platforms/boards.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
TEMT is Transmitter Empty bit which is set only when the full FIFO
is empty. It makes sense to poll for THRE (Transmitter Holding
Register Empty) which is set when UART can buffer new character
for transmission (there is room in FIFO). This allows using the
FIFO in full.
Signed-off-by: Timo Teräs <timo.teras@iki.fi>
The LCR register specifies the format of the asynchronous data
communication exchange. Keep the data/stop bit and parity settings
intact during baud rate change.
Signed-off-by: Timo Teräs <timo.teras@iki.fi>
Indenting preprocessor directives reduces the code readability, because
it make preprocessor directives harder to spot.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
L4 parts have a constant page size, so just rely on the HAL defines
that provide it, along with a read to the register which contains this
SoC's total size.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Add flash page layout support for STM32F4 SoCs.
This almost eliminates the need for flash_map.h, except for
STM32F4X_SECTOR_MASK, so delete the file and move the define into the
F4 implementation, to keep things simple.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
This is a prep work commit for adding flash page layout support.
The internal flash APIs for STM32 on L4 and F4 are a bit
inconsistent. Some routines take a pointer to the private data, others
don't. Those that do take it as a last argument instead of a
first. Additionally, some APIs are declared in flash_stm32.h that
aren't ever used by the family-specific files.
Clean this up by making everything take a struct device*, and marking
routines static in the common driver code when possible.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Added an internal function to obtain the flash page layout in
run-length encoded format. The API is simple and allows the actual
public API implementations to be simple and maintainable.
This feature can be enabled by using the FLASH_PAGE_LAYOUT Kconfig
option. This API is required for the implementation of flash file
system.
Added a public API to get flash page information (size and start offset)
by offset within the flash and by index of the page.
Added a generic implementation of the internal flash_get_page_info API.
Added an additional public API call to get the total count of pages in
the flash memory and its generic implementation.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
This patch implements BMM150 driver with polling mode and its tested
with original BMM150 sensor hardware. Driver works on I2C
interface as of now.
Following datasheet is taken as reference while developing driver.
http://www.mouser.com/ds/2/783/BST-BMM150-DS001-01-786480.pdf
Signed-off-by: Punit Vara <punit.vara@intel.com>
nrf SOC uses nrf rtc timer (not sys tick), which is 32kHz,
whereas CPU runs at higher speed (nrf52 runs at 64MHz).
So 32Khz is too slow to measure critical kernel parameters.
This patch does :-
1. Add support for nrf SOC for timing_info benchmarking.
2. Uses SOC timer to measure kernel parameters.
Jira: ZEP-2314
Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
The API/Variable names in timing_info looks very speicific to
platform (like systick etc), whereas these variabled are used
across platforms (nrf/arm/quark).
So this patch :-
1. changing API/Variable names to generic one.
2. Creating some of Macros whose implimentation is platform
depenent.
Jira: ZEP-2314
Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
The stack address was incorrectly specified when stack usage
was being debugged. This caused compiler to emit this warning
drivers/ieee802154/ieee802154_cc2520.c:1136:16: warning:
dereferencing type-punned pointer will break strict-aliasing
rules [-Wstrict-aliasing]
((struct cc2520_context *)(&__device_cc2520))->
^
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
If the interrupt isn't acknowledged, the callback will continue to be
called.
Jira: ZEP-2556
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Masks for level- and edge-triggering levels are 0, so the following
check will be always true:
if ((flags & GPIO_INT_ACTIVE_LOW) == GPIO_INT_ACTIVE_LOW)
Invert the evaluation order, by checking the masks that are not 0
first.
Jira: ZEP-2557
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
The compilation of the i2c_ll_stm32 fails when we
enable the interrupt mode. The struct i2c_stm32_data
is needed to initialize the semaphore. This patch adds
the missing struct for interrupt mode.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
When transmitting to the UART interface using polled mode, the ESP32
driver would return 0 regardless of the success state. Return the
character that has been transmitted to comply with the API.
Jira: ZEP-2552
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Esp-idf defines the BIT macro that is also defined in Zephyr's
misc/util.h. Fix the issue by including the esp-idf headers first, so
that a check in util.h won't redefine the macro if it's already
defined.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This exposes the CCM operations through generic Crypto API.
Change-Id: I09346e77bf8821c208305a7aa2805cf49cb42d71
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
'pad' parameter controls whether crc16() should add padding at the end
of input bytes or not. This allows to compute CRC16 for data stored in
non-contiguous buffers where CRC value is calculated using subsequent
calls to crc16() with padding added only for last chunk.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
data_addr is not guaranteed to be word-aligned so we need to read it in
a safe way, otherwise this can trigger hardfault on nRF51.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Stop using CONFIG_I2C_x_DEFAULT_CFG to get the initial value. Since we
only support master mode we always default to it for initial config and
we get the bitrate from the device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Stop using CONFIG_I2C_x_DEFAULT_CFG to get the initial value. Since we
only support master mode we always default to it for initial config and
we get the bitrate from the device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add _i2c_map_dt_bitrate() that maps from a bitrate to the I2C zephyr
cfg bit fields used in i2c_configure().
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Some targets (e.g. STM32-based boards) only have SPI drivers using the
new API. To support both these and existing, legacy SPI drivers in the
SPI HCI driver, abstract out the SPI API into shim routines.
There are no behavioral differences due to this patch. The next patch
will add support for the new API.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Per ZEP-1958, Phase 2 of adding CC3220sf LaunchXL support,
was to "deprecate the CC3200 launchxl support in Zephyr
(redundant to the CC3220)."
Effectively, the CC3220 SOC replaces the CC3200.
This patch removes the following:
* the imported CC3200 SDK
* CC3200 SOC, board, DTS files.
* adjusts other files where cc3200 was mentioned.
Also, it fixes explicit references to CC3200 in generic
CC32xx driver files.
Jira: ZEP-1958
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
ll_radio_state_is_idle() returns bool, not an error value - this means
it is non-zero on success.
Jira: ZEP-2445
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Rename the BT_CONTROLLER prefix used in all of the Kconfig variables
related to the Bluetooth controller to BT_CTLR.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Add support for TICKLESS KERNEL in nrf_rtc_timer for Nordic family of
processors. This patch includes :-
1. Programming RTC based on "next timer" value from timeout queue while
A. exiting idle_exit.
B. on RTC interrupt.
2. Impliments some of functions which will be required by sys_clock and
scheduler.
ZEP-1819
Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
This patch fixes the read operation of the I2C driver
for all the receptions (1-byte, 2-bytes, N-bytes when
N > 2)
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Tested-by: Yannis Damigos <giannis.damigos@gmail.com>
Tested-by: Martin Iñaki Malerba <inakimmalerba@gmail.com>
In interrupt mode, the drivers entered a forever loop if the
I2C_MSG_RESTART flag was set. This patch fix this issue.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
The EVENT interrupt is generated when:
– SB = 1
– ADDR = 1
– ADD10= 1
– BTF = 1 with no TxE or RxNE event
– TxE event to 1 if Buffer interrupt enabled
– RxNE event to 1 if Buffer interrupt enabled
We need to disable and enable the Buffer TxE and RxNE interrupt
inside the EVENT ISR. The LL_I2C_{Enable,Disable}IT_TX and
LL_I2C_{Enable,Disable}IT_RX functions, used now, enable and
disable both Buffer and Event interrupt. This patch uses the
LL_I2C_EnableIT_BUF and LL_I2C_DisableIT_BUF functions to
enable and disable the Buffer interrupt (TxE, RxNE).
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
* add nested interrupt support for interrupts
+ use a varibale exc_nest_count to trace nest interrupt and exception
+ regular interrupts can be nested by regular interrupts and fast
interrupts
+ fast interrupt's priority is the highest, cannot be nested
* remove the firq stack and exception stack
+ remove the coressponding kconfig option
+ all interrupts (normal and fast) and exceptions will be handled
in the same stack (_interrupt stack)
+ the pros are, smaller memory footprint (no firq stack), simpler
stack management, simpler codes, etc.. The cons are, possible
10-15 instructions overhead for the case where fast irq nests
regular irq
* add the case of ARC in test/kernel/gen_isr_table
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Now that we have an mcux shim driver, remove the old k64-specific
driver. Also remove include/drivers/k20_sim.h, since the old
k64-specific driver was the only thing left using it.
Jira: ZEP-2025
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a shim layer around the mcux ftm driver to adapt it to the Zephyr
pwm interface.
Jira: ZEP-2025
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The random number generator from ESP32 uses noise from Wi-Fi and
Bluetooth radios. If these are off, a pseudo-random number is
generated instead; this is currently the case, but even though it's a
black box, it's arguably better than returning a timestamp as a
pseudo-random number generator.
According to the ESP32 Technical Reference manual, the RNG passed the
Dieharder Random Number Test suite (version 3.31.1)[1], but nothing has
been said about the quality of the PRNG.
The RNG register is read directly; no effort is made to use its
contents to feed an entropy pool in a way that's similar to /dev/random
on POSIX systems, as no such subsystem exists on Zephyr at the moment.
[1] http://webhome.phy.duke.edu/~rgb/General/dieharder.php
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Zephyr's watchdog API is badly designed in the sense that it's a 1:1
abstraction on top of whatever Quark D2000 expects for its watchdog,
instead of expecting a generic timeout value.
This implementation tries as much as possible to calculate the watchdog
timeout in a way that's compatible with a Quark D2000 running at 32MHz;
a comment in adjust_timeout() explains this in more detail.
Jira: ZEP-2296
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This provides basic GPIO support, with interrupts, and the ability to
read and write to ports on a pin-by-pin basis.
Jira: ZEP-2286
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This implements a driver for the pin multiplexer as present in the ESP32
SoCs.
All APIs are supported.
Jira: ZEP-2297
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
The alignment went off because of the move to use internal fixed-size
integer types (instead of standard int types).
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
It used to be that there was a fairly empty "Bluetooth Drivers" menu
entry in the drivers menu. This entry was present even though there
was no drivers/bluetooth code being compiled in.
With this patch "Bluetooth Drivers" will no longer be present when
BT_CONTROLLER is enabled.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
The CONFIG_BT_WAIT_NOP define is used only by
zephyr/subsys/bluetooth/host/hci_core.c.
It is also the only config in drivers/bluetooth that is in use when
BT_CONTROLLER is enabled. Moving it into the bluetooth subsystem
allows us to restructure the drivers/kconfig code such that the entire
Bluetooth driver menu option is omitted when the BT_CONTROLLER is
enabled.
Moving it will also mean that all configs in drivers/bluetooth will
now be related to configuring the source code in drivers/bluetooth.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Added function helps setting the longest possible rx and tx buffers for
single SPI transfer. Each of these buffers is a continuous memory
region. It is useful for example when peripheral supports easyDMA.
Signed-off-by: Michał Kruszewski <michal.kruszewski@nordicsemi.no>
The API name space for Bluetooth is bt_* and BT_* so it makes sense to
align the Kconfig name space with this. The additional benefit is that
this also makes the names shorter. It is also in line with what Linux
uses for Bluetooth Kconfig entries.
Some Bluetooth-related Networking Kconfig defines are renamed as well
in order to be consistent, such as NET_L2_BLUETOOTH.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
There are two kinds of HCI implementations. Bluetooth drivers in
drivers/bluetooth that implement HCI by using a wired serial
transport layer to talk to an external controller chip. And a
bluetooth controller in subsys/bluetooth/controller that directly
talks to an internal on-chip controller node.
Currently, when the the subsys/bluetooth/controller is used there
still exists exposed to the user a bluetooth driver configuration
menu, even though no external bluetooth driver is in use. This is due
to a dependency on certain configs in driver/bluetooth that are needed
even though no external controller is used.
This patch moves one of these configs, BLUETOOTH_HCI_RESERVE, from
drivers/bluetooth/hci/Kconfig to subsys/bluetooth/host/Kconfig such
that eventually we can omit the entire Bluetooth driver menu option.
This re-organization does not change when the config can be enabled.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
The output state of the CS GPIO must be configured with a pull-up while
setting the GPIO as output. Otherwise the GPIO will be forced low,
before being set high by the call to spim_nrf52_csn(). This results in a
glitch of 1us on the CS line, which may confuse some ICs in the worst
case.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
When setting the SPIM speed to 8 MHz, the driver will return an error
due to a missing "break" causing the execution flow to reach the default
case.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
patch fix the dead code issue reported by coverity static scan
for gpio driver of cc2650 TI SOC. CC2650_IOC_NO_PULL macro
is defined Zero, bitwise and with any value would result to
zero,because of which only false condition of if is evaluated
but not the true condition.
Jira ZEP-2469.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
In Tickeless kernel Platform timekeeping is having error because
"_sys_clock_tick_count" is not getting updated correctly.
Currently "OVERFLOW" Flag (bit 16 in timer control register)
is reset before it is taken into account into _sys_clock_tick_count.
This patch sets a flag as soon as Timer Overflow occues and clears
it when time is accounted into _sys_clock_tick_count.
Jira : ZEP-2217
Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
The transmit and receive procedure used in the STM32 SPI driver is not
correct.
On STM32F4, this is causing OVR errors (per the logged error mask) and
transmission of undesired 0x00 bytes (verified with a logic analyzer).
The root cause is that the receive register is not read (via DR, when
RXNE is set) each time the transmit register is written (also via DR,
when TXE is set). This clearly causes OVR errors when there is no
FIFO, as the receive register needs to be read each time a frame is
transceived, or the IP block has no way of knowing that the
overwritten data were not important.
Adapt the I/O procedure so that every DR write is matched by a DR
read, blocking until the relevant flags are set if necessary.
This behavior is suboptimal for targets such as STM32L4, where there
is a SPI FIFO. However, SPI I/O is broken on those targets, and this
patch fixes them as well. Further optimizations for targets with FIFOs
is left to future work.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
With some other issues in polled mode now resolved, add error handling
and report a valid error status when releasing the context.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Byte access is always naturally aligned; there's no need to use
UNALIGNED_GET or UNALIGNED_PUT. Those would only be needed when
supporting 16-bit data frames.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The current implementation unconditionally enables the SPI (sets
SPI_CR1_SPE) in transceive(), but disables it only in master mode.
The peripheral should only be enabled while the user has specifically
requested I/O. Fix this by always disabling the peripheral when I/O is
complete.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Polled and IRQ-driven SPI I/O share code for cleanup and completion,
which can now be factored into its own routine.
This keeps a single point of truth for common paths, which will allow
a subsequent bug fix to happen in one place, and help avoid future
regressions.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
In polled mode, the STM32 SPI driver is signaling completion when
there are no waiters:
- the only spi_context_wait_for_completion() caller in this driver is
in the IRQ-driven portion of transceive() itself, which isn't
compiled in polled mode.
- the "asynchronous completion + polled I/O" combination is not
supported by the driver, so there are no other threads polling on
this I/O we need to signal completion to.
What should be happening instead of signaling completion is releasing
the chip select pin, which polled I/O currently doesn't do.
Fix these issues.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The LL_SPI_NSS_* macros used in spi_stm32_configure() when
hardware-based NSS management is requested are incorrect; fix them.
In master mode, this seems like a copy/paste error. The slave mode
case is likely due to following incorrect documentation in the ST LL
headers.
Note that in my testing on STM32F4, NSS appears to be open drain when
managed by hardware, making that configuration harder to test (and
probably less useful).
Details for the curious:
The ST LL headers (for example stm32f4xx_ll_spi.h) claim
LL_SPI_NSS_HARD_INPUT is to be used only in master mode, and
LL_SPI_NSS_HARD_OUTPUT is to be used in slave mode.
The opposite is true: when NSS is not handled by software, the SPI
peripheral is responsible for driving NSS as an output, and the
slave peripheral is responsible for reading it as an input.
This is an error in the LL header files; the reference manuals and
the other LL code make this clear.
- The ST reference manuals specify that LL_SPI_HARD_OUTPUT (which
corresponds to SSM unset, SSOE set) is a master-only
configuration. For example, STM32 RM0368 says:
"NSS output enabled (SSM = 0, SSOE = 1)
This configuration is used only when the device operates in
master mode."
- LL_SPI_HARD_INPUT (SSM unset, SSOE unset) is either a master or
a slave configuration; in the slave case (which is what we're
interested in here), it corresponds to the "usual" NSS
input. RM0368, again:
"NSS output disabled (SSM = 0, SSOE = 0)
This configuration allows multimaster capability for devices
operating in master mode. For devices set as slave, the NSS
pin acts as a classical NSS input: the slave is selected when
NSS is low and deselected when NSS high."
The LL_SPI_StructInit() implementations similarly combine
LL_SPI_MODE_SLAVE with LL_SPI_NSS_HARD_INPUT.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Now that struct spi_context supports passing errors from
interrupt-driven I/O handlers to waiting threads, we can enable error
interrupts and propagate errors to spi_transceive() callers.
To make it easier for users to debug SPI-related issues, log any error
bits set in SR when failures occur.
A subsequent patch will add error checking to polled mode as well, but
other cleanups and fixes will go in first to make this easier.
Note that this breaks the spi_loopback test on some targets, but it's
not a regression, as it wasn't working properly anyway. Subsequent
patches the bugs that this error checking has exposed.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The SPI API allows waiters to block until SPI I/O has completed. The
asynchronous subset of the API allows waiters to learn a status value
for the result of the I/O. However, the synchronous API does not allow
this.
Due to this limitation, synchronous API users cannot learn when
interrupt-driven I/O fails, which precludes proper error handling.
Resolve this limitation by adding a sync_status field to struct
spi_context, and using it to return operation results to the waiter.
Since there is only one status field, reduce the maximum number of
supported waiters from UINT_MAX to 1. This is not a problem for
current users, which all wait with the entire context locked.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Void pointer arithmetic is undefined behavior (UB).
It's OK for struct spi_buf to contain a void *, because those values
are only ever stored, read, and compared. However, pointer arithmetic
is done on the tx_buf and rx_buf fields in struct spi_context, so
those need to be u8_t * to avoid UB.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Add SPI pin mux tables for 96b_carbon. Note that SPI1 is for
internal use on the board connecting to the 96b_carbon_nrf51, while
SPI2 is broken out to an expansion header.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The ESP32 UART driver can only be used on the ESP32 SoC AFAICT. But it
did not have a depend clause so it was polluting the options of other
platforms.
With this patch the ESP32 driver will no longer be exposed to users of
non-ESP32 devices.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
This patch implements following functionality in polling mode.
Ambient light
RGB light
proximity sensor
Following datasheet has been used to develop driver
https://docs.broadcom.com/docs/AV02-4191EN
Jira: ZEP-1552
Signed-off-by: Punit Vara <punit.vara@intel.com>
Fix clock polarity and phase configuration by using correct
bit shifted configuration values.
Also, fixed SPIM1 config struct initialization that referred
to wrong SPI0 value.
Signed-off-by: Nathan Loretan <nathan.loretan@nordicsemi.no>
As SLIP TAP is now the default after the commit ca0ad13a61
("net: enable SLIP only on QEMU targets"), clarify the comments
and settings in various Kconfig files that talk about slip.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Change the common "init with 0" + "give" idiom to "init with 1". This
won't change the behavior or performance, but should decrease the size
ever so slightly.
This change has been performed mechanically with the following
Coccinelle script:
@@
expression SEM;
expression LIMIT;
expression TIMEOUT;
@@
- k_sem_init(SEM, 0, LIMIT);
- k_sem_give(SEM);
+ k_sem_init(SEM, 1, LIMIT);
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Move to using the generated IRQ defines from the DTS instead of soc.h.
This change also fixes a minor bug in that the error irq priority wasn't
getting correctly picked up from device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch allows the use of the MCR20A driver with KW2xD devices.
The clock output of the transceiver can be used as an input clock
for the PLL of the SoC. The hardware reset and CLK_OUT setup of
the transceiver should then be performed during the initialization
of the SoC. The driver is not allowed to do it again.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Some patches have been lost during rebase before the initial commit,
this path fixes it.
- correct copyright in registers definition header file
- fix undefined macro inside CLK_OUT configuration
- use the return value of k_sem_take if there is a timeout
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Following rework of pinmux driver for whole stm32 family,
remove call to stm32_get_pin_config which is no more
used.
Include dt-bindings stm32-pinctrl.h file to ensure coherency
between dts files and pinmux driver.
Due to change of "port" from enum to a series of define
(enum not accepted as dt binding), rework gpio_stm32_config
declaration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32F3 pinmux handler is reworked to support future pinmux dts
generation.
Preliminary change is done to move pin configuration
informations in a {pin, conf} structure closer to dts fields
"pins" array is removed as information is transfered to
"pinconf" array
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32F4 pinmux handler is reworked to support future pinmux dts
generation.
Preliminary change is done to move pin configuration
informations in a {pin, conf} structure closer to dts fields
"pins" array is removed as information is transfered to
"pinconf" array
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Rework stm32f1 pinmux code for future dts based pinmux code
generation.
Pin configuration is now done directly thanks to gpio port
configuration. Reference to pseudo alternate functions are
now removed same as the use of pins[] array.
Pins function (uart tx for instance) is set implicitly by
defining gpio mode and configuration.
This behavior is specific to stm32f10x series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32L4 pinmux handler is reworked to support future pinmux dts
generation.
Preliminary change is done to move pin configuration
informations in a {pin, conf} structure closer to dts fields
"pins" array is removed and information is transferred to
"pinconf" array
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The ethernet HAL has a different uint32_t typedef than Zephyr's u32_t:
uint32_t in the HAL is long unsigned int, while in Zephyr it's
unsigned int. This is causing a build warning on GCC ("warning:
passing argument 2 of ‘ENET_GetRxFrameSize’ from incompatible pointer
type") when passing a u32_t* where ENET_GetRxFrameSize expects a
uint32_t*.
Add a cast to silence the warning.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The net_stack_analyze function wants to look at the stack buffer,
but it is making assumptions on where this data is that are no
longer valid. Change to use the proper APIs for referencing this.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
patch fix the dead code issue reported by coverity static scan
for gpio driver of cc2650 TI SOC. GPIO_DS_DFLT_LOW macro
is defined Zero, bitwise and with any value would result to
zero,because of which only false condition of if is evaluated
but not the true condition.This is a fix for jira ZEP-2355.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Update the MCUX I2C driver and related platforms to get their I2C
information from the device tree. We also updated a few of the sensor
drivers found on the FRDM & Hexiwear boards to get their I2C bus name
from the device tree instead of directly from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds a shim layer around the mcux adc16 driver to adapt it to the Zephyr
adc interface.
Jira: ZEP-1396
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds common and Kinetis-specific adc device tree properties, and updates
all Kinetis SoC and board dts files to include adc nodes.
Jira: ZEP-1396
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The Kconfig assumed that there would only ever be one instance of an
adc, but some Kinetis devices have multiple adc instances.
Jira: ZEP-1396
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
As I2C_0 (port 0) isn't used on the STM32 platforms we didn't exclude
the related Kconfig options if DTS was enabled. However other SoCs
(like NXP) do use I2C_0 so we need to fixup the Kconfig dependencies
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
patch uses chosen property zephyr,bt-uart, zephyr,uart-pipe
and zephyr,bt-mon-uart to determine the uart instance to be
used for bluetooth,uart_pipe and bluetooth_monitor and generate
appropriate configs.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
It is incorrect to call spi_context_release() on a
spi_dw_data object's ctx field before data->ctx->config is first
set in spi_dw_configure(). This is because spi_context_release()
reads ctx->config->operation. In particular, during spi_dw_init(),
calling spi_context_release() reads the uninitialized memory in
spi->ctx->config->operation.
Call spi_context_unlock_unconditionally() instead to properly increase
the semaphore count.
Without this patch, the first call to spi_transceive() can block
forever depending on the value of the uninitialized memory holding
spi->ctx->config->operation.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
It is incorrect to call spi_context_release() on an STM32
spi_stm32_data object's ctx field before data->ctx->config is first
set in spi_stm32_configure(). This is because spi_context_release()
reads ctx->config->operation. In particular, during spi_stm32_init(),
calling spi_context_release() reads the uninitialized memory in
data->ctx->config->operation.
Call spi_context_unlock_unconditionally() instead to properly increase
the semaphore count.
Without this patch, the first call to spi_transceive() can block
forever depending on the value of the uninitialized memory holding
data->ctx->config->operation.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Added BUILD_ASSERT check for Tx and Rx thread priorities.
The Tx thread priority shall be higher than Rx thread
priority in order to correctly detect transaction violations
in ATT and SMP protocols. The Number of Completed Packets
for a connection shall be processed before any new data is
received and processed for that connection.
The Controller's priority receive thread priority shall be
higher than the Host's Tx and the Controller's Rx thread
priority.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Until Zephyr has infrastructure to enable/disable the
reception of multicast frames we disable the hardware
multicast frame filter completly and pass all multicast
frames to the upper layer and let that deal with them.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
We can use the chosen property "zephyr,console" to determine what uart
should be used as the console and find its name to generate a define for
CONFIG_UART_CONSOLE_ON_DEV_NAME.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Frequency tolerance for LFRC after calibration for nRF5x
Series ICs is between 251 and 500 ppm as per Product
Specification. For more details refer to:
http://infocenter.nordicsemi.com/
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
By the time we get to POST_KERNEL, kernel services and kernel objects
should be available for use. This should include timers and the random
number generator, but we don't init the system clock until sometime
during the POST_KERNEL phase. Initialize it earlier.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Upcoming memory protection features will be placing some additional
constraints on kernel objects:
- They need to reside in memory owned by the kernel and not the
application
- Certain kernel object validation schemes will require some run-time
initialization of all kernel objects before they can be used.
Per Ben these initializer macros were never intended to be public. It is
not forbidden to use them, but doing so requires care: the memory being
initialized must reside in kernel space, and extra runtime
initialization steps may need to be peformed before they are fully
usable as kernel objects. In particular, kernel subsystems or drivers
whose objects are already in kernel memory may still need to use these
macros if they define kernel objects as members of a larger data
structure.
It is intended that application developers instead use the
K_<object>_DEFINE macros, which will automatically put the object in the
right memory and add them to a section which can be iterated over at
boot to complete initiailization.
There was no K_WORK_DEFINE() macro for creating struct k_work objects,
this is now added.
k_poll_event and k_poll_signal are intended to be instatiated from
application memory and have not been changed.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The controller and host-side RX threads recently had their priorities
lowered to 8. Make the driver RX threads consistent with this.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Configure I2C using DT for the following STM32 boards:
disco_l475_iot1
nucleo_f401re
96b_carbon
olimexino_stm32
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
The SAM4S, SAM3X, SAME70 all use the uart_sam.c serial
driver. This patch puts the configuration in DTS and
out of Kconfig. The SAME70 uses the USART as well.
USART DTS support for the SAME70 is also in this patch.
Signed-off-by: Justin Watson <jwatson5@gmail.com>
The I2C Slave Read support isn't well defined and not actually supported
by any i2c driver at this point. We can add this back when slave mode
is more thought out.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a STM32 LL based driver for the RNG processor. The RNG processor
is a random number generator, based on a continuous analog noise, that
provides a random 32-bit value to the host when read. The RNG passed
the FIPS PUB 140-2 (2001 October 10) tests with a success ratio of 99%.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Add support for KW40Z in the KW41Z IEEE 802.15.4 driver as both chips
expose almost the same radio registers.
Signed-off-by: Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
The chip seems to require a wait time before reading packet
data after the RX sequence done interrupt, as imidiate reading
of it will indicate a packet size of zero and cause the RX
sequence done to be continually retriggered.
In addition, the extra clearing of the interrupt flags can be
removed, as this is already done at the beginning of the isr.
Jira: ZEP-2278
Signed-off-by: Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
When building tests/kernel/test_build/test_debug on disco_l475_iot1 we
get the following build error:
drivers/i2c/i2c_ll_stm32_v2.c: In function ‘stm32_i2c_configure_timing’:
ext/hal/st/stm32cube/stm32l4xx/soc/stm32l4xx.h:207:38: error: ‘timing’ may be used uninitialized in this function [-Werror=maybe-uninitialized]
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
^
drivers/i2c/i2c_ll_stm32_v2.c:265:8: note: ‘timing’ was declared here
u32_t timing;
^~~~~~
Fix by initializing timing to 0.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Following implementation of LL based SPI driver,
add SPI support on nucleo_f334r8 board of STM32F3 series.
Change-Id: Ifbe39b1f2cecdd7db23be9c6943a914a155ebd77
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add SPI pin for the nucleo_f401re pinmux.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add a SPI master and slave driver for the L4, F4 and F3 STM32
SoCs families.
Change-Id: I1faf5c97f992c91eba852fd126e7d3b83158993d
Origin: Original
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Tested-by: Lee Jones <lee.jones@linaro.org>
As not all drivers support interrupts we don't have a means to know if
we can allow UART_INTERRUPT_DRIVEN to be enabled and thus various
Kconfig options that select UART_INTERRUPT_DRIVEN. Some drivers have a
interrupts, however not all do. So introduce a Kconfig option to let us
know what the driver actually supports.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In added mode flash operation are performed in timeslice
(in radio idle time).
Kconfig for mode enabling CONFIG_SOC_FLASH_NRF5_RADIO_SYNC.
Erase and write API implementations were rewritten and preserved against
concurrent execution.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Add configuration, documentation, pinmux, fixup and dts support for
STM32F103x8 based Minimum System Development board.
Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
as config SPI_CS_GPIO was selecting GPIO instead it
should just depend on it. This patch is a fix for
ZEP-2071 jira.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
patch enables qmsi serial driver to pick baudrate and name
from device tree instead of Kconfig for UART0 and UART1
instance
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
The esp-idf package contains on the BSP a definition of the BIT macro
unconditionally #defined when rom/uart.h is #included. When Zephyr's
uart.h (which pulls in include/misc/util.h) that conditionally
This generates a compile warning on the re-definiton of BIT by the
esp-idf package.
Thus include uart.h after esp-idf's rom/uart.h to have BIT not
re-defined thanks to Zephyr's conditional definition.
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
This is a minimal driver enabling console output during the port
bringup. While the driver works, only one of the three UART devices
are supported, and there isn't any way to change any parameters or
use interrupts. This will most likely be superceded by a proper
driver after the port has matured.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Update driver to use DTS-generated #defines for port names,
and not obsolete Kconfig variables.
Signed-off-by: Geoffrey Le Gourriérec <geoffrey.legourrierec@smile.fr>
L4 write access requires 64 bits alignment
while L4 read access does not require any alignment.
To support specific check according to read/write,erase
a parameter is added to stm32_valid_range.
Signed-off-by: Michel Jaouen <michel.jaouen@st.com>
L4 have 64 bits write access.
The cast to 64 bits data address in write_dword
requires 3 right shifts on i (byte index) else the
data taken are wrong for i different from 0
Signed-off-by: Michel Jaouen <michel.jaouen@st.com>
We always have UART_IRQ_FLAGS set to 0, so just call IRQ_CONNECT with a
0 argument for the flags, and remove the UART_IRQ_FLAGS. This is
towards support for using the driver on the TI CC2650. (we add a
comment about that as well).
Signed-off-by: Geoffrey Le Gourriérec <geoffrey.legourrierec@smile.fr>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit fixes the compilation error that occurs if both UART
ports on the FE310 SoC are enabled. The error occurs due to the
missing function definition of uart_fe310_irq_cfg_func_1 .
Signed-off-by: Jens Peter Schroer <jens@manetos.com>
Refactor internals of IPM driver removing bitfields and byte access of
32 bit registers.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The current method of accessing 32-bit data and control registers does
not work for all quark architectures. Sometimes writing to those
registers byte-by-byte results in last byte occupying whole 32 bit
register.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Add necessary board files, pinmux and device tree in order to have a
usable debug console.
Origin: Original
Change-Id: I43a9d278c3f2c936a714263626722f630367b663
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Following migration of stm32f1xx series clock control driver to
STM32Cube LL API, cleanup stm32 code base in order to take into
account that this is the only clock driver available for stm32
family.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following introduction of stm32cube LL based clock control driver,
remove references to former native driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Before introduction of LL based clock control for stm32f1xx series,
prepare gpio driver to provide useful definition for new API
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Align stm32f1xx series clock driver to other parts of stm32 family.
Driver support both Connectivity and Density lines of stm32f1 series,
that are based on different Reset and Clock Control architectures.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The Nucleo STM32F413 board is missing the default pinmux for PWM2 on
PA0, as stated in the doc. The same pinmux is also done for other
similar Nucleo board. So add it!
Change-Id: I2086c0a4ce65d68455a0978570f118e965f4c6ca
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Atmel SAM3X series has been recently converted to use ASF
and should now use common SAM family drivers. The atmel_sam3
serial driver will be removed in the future.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Fix nRF RTC timer from returning more than actual cycles
in _timer_cycle_get_32, under race condition when ISR
announces to kernel.
Jira: ZEP-2229
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Instead of NULL terminated buffer arrays, let's add a parameter for each
that tells the number of spi_buf in it.
It adds a little bit more complexity in driver's side (spi_context.h)
but not on user side (bufer one has to take care of providing the NULL
pointer at the end of the array, now he requires to give the count).
This will saves a significant amount of bytes in more complex setup than
the current dumb spi driver sample.
Fix and Use size_t everywhere (spi_context.h was using u32_t).
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The code was so far requesting 5 ms refresh timer, however with a
default TICKS_PER_SECOND=100 this was always rounded up to 10 ms,
causing some flickering. The closest TICKS_PER_SECOND that will give
flicker-less display but also give optimal ms-to-ticks calculations is
250, so change the timer to match that. After this change any code
using the display is recommended to set 250 as ticks per second.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
atmel_sam watchdog driver was temporarily limited to SAME70
series only. Now that all SAM series are using ASF the
change can be reverted.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Until we have better solution, we enable promiscuous mode as a
workaround to get IPv6 neighbour discovery going. Kconfig had
typos/thinkos preventing that to work however.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Source had CONFIG_ETH_MCUX_PHY_DETAILED_DEBUG, while Kconfig had
CONFIG_ETH_MCUX_PHY_EXTRA_DEBUG. Use the shorter name consistently.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Documentation doesn't specify if this function may return 0, so add an
inexpensive check to account for this.
Jira: ZEP-2135
CID: 160954
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
If CS is controlled over GPIO, it will be possible to keep the slave up
and running (though no transaction will be going on) using this
configuration bit.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
SPI_HOLD_ON_CS can be used to ask the SPI device to keep CS on, after
the transaction. And this undefinitely, until another config is used.
This will inhibate the gpio cs delay, if any. This might be useful when
doing consecutive calls on one slave without releasing the CS.
SPI_LOCK_ON is to be used with caution as it will keep the SPI device
locked for the current config being used after each transaction. This
can be necessary if one needs to do consecutive calls on a slave without
any olher caller to interfere.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
All is done through the generic spi_context driver's API as it will be
generic to all SPI drivers.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Adding a struct k_poll_signal parameter to driver's API unique
exposed function.
If not NULL, the call will be handled as asynchronous and will
return right after the transaction has started, on the contrary
of current logic where is waits for the transaction to finish
(= synchronous).
In order to save stack, let's move the device pointer to struct
spi_config. So the call is still at a maximum of 4 parameters.
Adapting spi_dw.c and spi driver sample to the change so it still
builts.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
All SPI drivers have this same way to handle synchronous call, thus
let's generalize it in struct spi_context, with a relevant API and apply
the change into SPI DW driver.
spi_context API will prove to be useful once asynchronous call will be
handled as well, through the same completion functions used now only for
synchronous call. It will be transparent for the driver.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Let's improve common SPI driver context by adding a lock and generic
function to get/release it.
It's statically initialized to save a bit of ROM.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Introducing as well a generic driver helper for CS gpio control and
buffer management.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Such API improves many aspects of the former API by reducing the number
of function, allowing more buffer flexibility etc... This leads in
better memory usag and performance as well.
However, as this will take sometime to get into use, the former API is
still present and is the one enabled by default.
Jira: ZEP-852
Jira: ZEP-287
Jira: ZEP-1725
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
One liners if/for/while statements still need {}
(and line break are cheap for clarity).
Aligning parameters properly.
Also, removing __func__ usage from SYS_LOG_* as these macros already put
it internally.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Removed the old PWM APIs usage and added support for the new PWM API.
JIRA: ZEP-2018
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The data fragments were stored in reversed order when the RX
data was saved into network buffers. This was caused by net_pkt
changes in commit db11fcd "net/net_pkt: Fully separate struct
net_pkt from struct net_buf".
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
The STM32L4x SoCs embeds a slightly different embedded flash controller
from the STM32F4x SoCs.
This particular controller has the following properties :
- Up to 2 512KiB banks divided in 2KiB pages
- Flash can be accessed in any sizes
- Flash must be written in 64bit aligned 64bit double-words
The drivers/flash/flash_stm32f4x.c is refactored into a new common
drivers/flash/flash_stm32.c and drivers/flash/flash_stm32l4x.c is
created with the STM32L4x specific functions.
To ease the refactoring and keep common functions, the STM32L4x flash
headers are slightly modified to match the hardware reference naming
and solve compilation issues.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
A typo was present ion the erase and write function were bit were
uncorrectly unset but all other bit except the mask were unset.
The code still worked because the two typos fixed themselves.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Limit visibility of configurable TX pins to SAME70 series only.
Previously visibility of configurable SAME70 TX pins extended
to the full SAM family.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This patch converts Atmel sam3x MCU series to use register
header files from Atmel Software Framework (ASF) library.
By using ASF different Atmel SAM MCU series can use common
device drivers.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Now that we can utilize label in the device tree we can convert to
getting the device name for the Atmel SAM3 UART out of the device
tree instead of from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that we can utilize label in the device tree we can convert to
getting the device name for the TI Stellaris UART out of the device
tree instead of from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that we can utilize label in the device tree we can convert to
getting the device name for the TI CC32xx UART out of the device
tree instead of from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that we can utilize label in the device tree we can convert to
getting the device name for the ARM CMSDK APB UART out of the device
tree instead of from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that we can utilize label in the device tree we can convert to
getting the device name for the NXP Kinetis UART out of the device tree
instead of from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that we can utilize label in the device tree we can convert to
getting the device name for the NRF UART out of the device tree
instead of from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that we can utilize label in the device tree we can convert to
getting the device name for the STM32 UART out of the device tree
instead of from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add configuration, pinmux, dts and documentation for the STM32L496G
Discovery board based on the STM32L496AG SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
As we now only support DTS for ARM based SoCs we can remove any
associated !HAS_DTS bits in Kconfig. The Nordic NRF5 serial driver and
the ARM CMSDK APB serial drivers had Kconfig bits related to !HAS_DTS
builds.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Support for LSM6DSL accelerometer and gyroscpe sensor
with bare minimum features.
For more info on this sensor:
http://www.st.com/en/mems-and-sensors/lsm6dsl.html
Change-Id: I9b100a3e030faa8a70a5015a881025c876b81be4
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
i2c_burst_write API implementation in some driver
and generate a sequence of messages that does not allow to
communicate with LIS3MDL sensor. This commit replaces use
of i2c_burst_write with a call to i2c_write, which enables
sensor configuration.
Meanwhile, description of LIS3MDL is completed in sensor
header file.
Change-Id: Ib1b4643365f3c70b31fbfc4b0c30cff294b475a3
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Support for LPS22HB Pressure and temperature sensor provided
with bare minimum features.
For more info on this sensor:
http://www.st.com/en/mems-and-sensors/lps22hb.html
Change-Id: I14992b954053094beb054d0dba7581f6e29a3e68
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add defines and pinmux arrays to support more UARTs on STM32F4.
Change-Id: Ib06c549bdb2b3d7065554a0a6d1a3d15441b29c9
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Add support for U(S)ART 4 to 10 that can be found at least on some
members of the STM32F4 family.
Change-Id: Ie870492511f885005cf023040e498bd4d800e807
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The registration of each serial port differs only by a few details.
These differences can be factorized in order to create a generic
registration macro.
This has several advantages:
- Less code
- Easier to add new ports
- Less work to add support for new STM32 families
Change-Id: I6e62a96ccbbf03c9d51bc2617db6a851ff0d83c7
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Add necessary board files, pinmux and device tree in order to have a
usable debug console.
Origin: Original
Change-Id: I280320700352fd36a544c03f4e57d2eeec2449e5
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The RX pin should be PA15 to use the Virtual COM port of the ST-LINK.
Also adds the missing entry in pinmux_stm32l4x.h.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
During introduction of LL clock_control driver on stm32f4 series,
AHB2 clock activation/deactivation case was let under stm32l4 condition
preventing activation of this clock with F4 series.
This patch fixes the issue.
Change-Id: I5e488e990d33252f491f8960fc7a798ca3416be2
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
uart_irq_tx_empty() function proved to be problematic: its semantics
was not documented properly, and many hardware uses terminology like
"TX register empty" to signify condition of TX register being ready
to accept another character (what in Zephyr is tested with
uart_irq_tx_ready()). To avoid confusion, uart_irq_tx_empty() was
renamed to uart_irq_tx_complete(), propagating to drivers/serial
device methods.
The semantics and usage model of all of uart_irq_rx_ready(),
uart_irq_tx_ready(), uart_irq_tx_complete() is now described in
detail.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Since more and more code is going to be reused by both the Host and the
Controller, this commit introduces a common/ folder that will contain
everything that is not tied to one of the two components but shared by
them.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
XT_* macros are defined in xtensa HAL headers as xcc intrinsics. gcc
does not have any of these intrinsics. Replace XT_* macros with inline
assembly or provide gcc-compatible definitions.
Change-Id: If823ea8a7898a11a3a8363b17efdba27dee4c6a4
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Commit 58c8d15 ("clock control:stm32: provide STM32Cube LL based
driver") added PLL initialization which disables the PLL before
configuring it.
This works if the system clock source is not the PLL (which is the
usual case for Zephyr booting out of chip reset). However, if the
SYSCLK source *is* the PLL, this halts execution.
To support this use case, switch the SYSCLK source to the
always-present HSI before disabling the PLL.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Factor out a subroutine used to switch SYSCLK to HSI. This code will
be used again in a subsequent patch.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Since the HCI driver debug option applies to both files in
drivers/bluetooth and subsys/bluetooth, the configuration option itself
now lives in the top-level Kconfig file for consistency.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
fix misspelling in Kconfig files that would show up in configuration
documentation and screens.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
There is no need to unmask/mask the global transceiver interrupt
in kw41z_start/stop as the radio interrupt line is enabled/disabled
anyway with irq_enable/disable calls.
Signed-off-by: Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
- set state to IDLE if TMR1 expires, but CCA reports channel as free
- no need to check for CCABFRTX, as the hardware isn't setup to do
CCA before TX
Signed-off-by: Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
Sequence timeouts should be scaled to 16us, as TMR_PRESCALE was set
to 62.5kHz.
Also, radio warmup times and TX packet length need to be taken into
account.
Signed-off-by: Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
The main difference to how the previous driver operates, is that this
version has zero-copy transmission. The transmit DMA descriptor is
updated for every fragment that is transmitted from the driver.
Another difference in the transmission path is that this version won't
spin indefinitely while waiting for the DMA transfer to complete; an
arbitrary number of busy checks (20) will be performed, and then
the transmission thread will yield for as long as necessary to finish
the transfer.
These two changes should fix ZEP-472; since that issue was opened for
an older version of Zephyr with uIP, I did not bother going all the way
back to test.
This has been only tested with a Galileo board, using Shared IRQ.
Jira: ZEP-1652
Jira: ZEP-472
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
The purpose of irq_update() is to cache value of UART IRQ status
register for devices which needs such caching. No other driver
performs any other side effects in this call. For STM32, clearing
TC (tx complete) bit was introduced in 8c079e91c9
which is otherwise titled as a conversion to STM32Cube HAL. Thus,
there does not seem to be specific reasons why this code was added.
On the other hand, it leads to behaviorial artifacts when dealing
with interrup-driven UART code (specific issue seen was delaying
of transmitting every other character).
Change-Id: Id20bf214b36eeb6c09e29cc2e6bfca4f7221a1a4
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
* lis2dh 3 axis accelerometer support on SPI and I2C bus
* data ready and anymotion type of trigger support
Tested on Dynastream module D52QD2M4IA-A using SPI
Origin: based on Zephyr lis3dh driver
Change-Id: I2c4e9418b87f09c957bba8f73522bd78830bc809
Signed-off-by: Roger Lendenmann <roger.lendenmann@intel.com>
The files for the Arduino Due needed to be updated to use the new
configuration when the SoC moved from the atmel_sam3 directory to
the atmel_sam/sam3x directory.
Jira: ZEP-2067
Signed-off-by: Justin Watson <jwatson5@gmail.com>
SBCon is a simple device which allows directly setting and getting the
hardware state of two-bit serial interfaces like I2C. Therefore to be
useable we need to drive the lines with the appropriate protocol under
software control.
Change-Id: If9000bb75f7b0ad7bbb256b1cb38cc70fa6ca8ea
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Several minor changes to clean up I2C Kconfig file
- align help text
- remove duplicate dependencies
- use unified naming for I2C port options
- replace outdated references to datasheet in help text
- add comments at the end of 'endif'
Change-Id: I452083feb29f40909e6e38324ff9d9961fc6bd07
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
The switch from C99 integer types to u16_t, etc. caused misalignment
in structs and function definitions with multi-line parameter lists.
Change-Id: Ic0e33dc199f834ad7772417bca4c0b2d2f779d15
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
With recent changes we now have both SAME70 and SAM3X under
SOC_FAMILY_SAM so we need to limit the watchdog driver only to SAME70 as
it only builds there right now.
Change-Id: I4a7c90247ad22532b2384ca536cfb0cbd65186f9
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Converted Stellaris UART driver over to utilize device tree generated
defines. Added a yaml description for the uart, and converted over the
ti_lm3s6965 SoC & qemu_cortex_m3 board port over to utilize it.
Change-Id: Ie20844eb63d2c68eb59ad4160f7f5b5a35e2943b
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There isn't any reason to export the uart_stellaris_isr function, so
lets make it static and remove the associated header file.
Change-Id: I3a131b584d9d6fb6279a1503512668a71510dd4d
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This driver implements an I2C interface by driving two GPIO lines under
software control.
Change-Id: Ie49cc67aed6acb30086ee851041fe2470da241cf
Signed-off-by: Jon Medhurst <tixy@linaro.org>
This library implements the I2C single master protocol in software.
It supports the Standard-mode and Fast-mode speeds and doesn't support
optional protocol feature like 10-bit addresses or clock stretching.
Change-Id: I375d572a83714522421f2967dc414b3bec169e95
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Clean-up the pinmux header as a preparatory work before adding more
pinmuxes.
This is achieved by the following two actions:
- Reorder the defines by increasing GPIO order to make it
easier to add more pinmux over time while avoiding a huge mess
- Use tabs to align
Change-Id: I07d9ae28f61287748d33dcf638dcbf2e6865517b
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
This commit provides support for disco_l475_iot1 board
Pinmux driver is provided with initial support definitions
Change-Id: I17b637a8ba0b033014969eca8fffe76319c47c52
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Adds a shim layer around the mcux lpsci driver to adapt it to the Zephyr
serial interface.
Change-Id: I024f1605e3194f34bb57e8a121900e05b3085a82
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commits align CONFIG_ factor names between stm32f4 and stm32l4
series to enable code factorization such as use of Q_DIVISOR.
Though, it does not concatenate kconfig sections as we might use
a bit of time to see what is needed in this regard
Change-Id: Ia603406d53949abf5675b801a5448397d5ab8462
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Small code refactorisation in order to ease up coming
support of stm32f1 series by stm32 commom clock control
driver
Change-Id: I486cfba137cd048d65f0732e10aa29d877bb03e5
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following activation of stm32 common clock driver for stm32f4 series
remove references to stm32f4 specific driver.
Change-Id: I372a0ea046007bcb34944d6b2b8880077583b1d3
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following update of LL clock driver to suport F4 series,
update dma driver to support LL clock driver API.
Change-Id: Ic8ecfe4f33109204f3b5f8c22bcb9c41de81531d
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit enables STM32Cube LL based driver for stm32f4 series.
This generic driver provides a unified API to clock driver for all
stm32 series.
LL API allows driver to be lightweight and to keep genericity across
stm32 family to ease further devlopment and maintenance.
Change-Id: Ie31ae8f433313787f9c9eda77de41925721d54dd
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
