The CMSIS layer doesn't like large stacks, and x86 in long mode
requires large stacks, so we disable these tests for now (as was
previously done on the x86_64 port for the same reasons).
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
In long mode, x86 does not support static IDTs or OpenOCD,
so disable the tests related to these features.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
These inline-assembly functions are identical between IA32 and
Intel64 arches, so move them to the common arch.h file.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Add qemu_x86_long board (with CONFIG_X86_LONGMODE=y) for testing.
This requires adding support to soc/ia32 for long mode (trivial),
and adding a quick 64- to 32-bit ELF conversion before invoking
QEMU, which apparently doesn't like 64-bit kernel files.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This function, like its cousin z_tsc_read(), can be shared between
subarches. Note: it's unclear to me if we actually need these to be
two separate functions (do we need serialization?) or if they can
be combined into one function. Add that to the to-do list.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The previous linker script was barebones and non-standard. It is
replaced with a script conforms to the rest of the Zephyr arches,
utilizing include/linker headers and standard macros.
link-tool-gcc.h is updated to account for the "i386:x86-64" arch and
the generation of 64-bit ELF binaries.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Fleshed out z_arch_esf_t and added code to build this frame when
exceptions occur. Created a separate small stack for exceptions and
shifted the initialization code to use this instead of the IRQ stack.
Moved IRQ stack(s) to irq.c.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The IRQ_OFFLOAD_VECTOR config option is also moved to the arch level,
as it is shared between both 32- and 64-bit subarches.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Using the arch Kconfig here, instead of kernel/Kconfig. Intel64 with
the SysV ABI requires some pretty big stacks. These 4K-8K defaults
are arguably a bit small, but the Zephyr defaults are REALLY too small.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
First "complete" version of Intel64 support for x86. Compilation of
apps for supported boards (read: up_squared) with CONFIG_X86_LONGMODE=y
is now working. Booting, device drivers, interrupts, scheduling, etc.
appear to be functioning properly. Beware that this is ALHPA quality,
not ready for production use, but the port has advanced far enough that
it's time to start working through the test suite and samples, fleshing
out any missing features, and squashing bugs.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Simplified these two inline functions somewhat, and refactored them:
unlocking can be shared between subarches, but locking cannot.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Widen the integer to pointer size before conversion, to make
explicit the intent (and silence the compiler warning). Also
fix a minor bug involving a duplicate (and thus dead) store.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The sys_inXX() and sys_read/writeXX() I/O primitives can be shared
between subarches of x86 with minor modifications, so move them.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This patch adds basic build infrastructure, definitions, a linker
script, etc. to use the Zephyr and 0.10.1 SDK to build a 64-bit
ELF binary suitable for use with GRUB to minimally bootstrap an
Apollo Lake (e.g., UpSquared) board. The resulting binary can hardly
be called a Zephyr kernel as it is lacking most of the glue logic,
but it is a starting point to flesh those out in the x86 tree.
The "kernel" builds with a few harmless warnings, both with GCC from
the Zephyr SDK and with ICC (which is currently being worked on in
a separate branch). These warnings are either related to pointer size
differences (since this is an LP64 build) and/or dummy functions
that will be replaced with working versions shortly.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Use different headers for kernel_arch_{func,thread}.h when in
CONFIG_X86_LONGMODE, and add placeholders for Intel64 versions.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Some definitions may be shared between subarchitectures, so refactor
accordingly. The definitions are also modified to separate bits. A
placeholder is created for the Intel64 definitions.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Some of the elements of arch.h can be shared between subarches,
so put them in a common file and factor out the rest. Placeholder
left for the Intel64 definitions to be added later.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The IA32 and Intel64 subarchitectures will generate different offset
symbols, so they are refactored. No functional change.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The _irq_to_interrupt_vector[] array shouldn't be accessed directly,
as there is a macro for this.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Update the -march flag passed to the compiler to reflect the
underlying microarchitecture is 'goldmont'.
Fixes: #17104
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
We now more throroughly discuss memory domains, thread
resource pools, and automatic memory domains.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Commit db48d3e22a ("sys_sem: add build time definition macros")
recently introduced SYS_SEM_DEFINE() and defined it in terms of
Z_DECL_ALIGN() and __in_section() to force the _k_sem linker section.
It is however cleaner and less obscur to use Z_STRUCT_SECTION_ITERABLE()
and list the _sys_sem linker section alongside the _k_sem one.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The commit provides default SWO frequency value for efr32_slwstk6061a
board. The SWO frequency is limited by board hardware to 875 kHz.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
- Remove unused variables and an unused 'sys' import
- Simplify 'if len(foo) != 0' to 'if foo'. Non-empty lists/dicts/etc.
are truthy in Python.
- Use a raw string to fix this warning:
scripts/footprint/size_report:270:0: W1401: Anomalous backslash
in string: '\.'. String constant might be missing an r prefix.
(anomalous-backslash-in-string)
The issue is that '\.' just happens to work due to not being
recognized as an escape sequence.
Escape sequences are not interpreted in raw strings, so they're safer
for regexes.
- Replace 'is 0' with '== 0'. 'is' is for testing object identity, and
0 isn't guaranteed to be a unique object (but always is in practice).
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
There are 2 other timers that could be selected, let's just take the
first 32bits one. This should be sufficient to verify the driver.
Enabling the timer in relevant board's dts file as well.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Such basic timer is found on MEC150x for instance.
Since instances have dedicated data, let's define specifice instance
based on unique DT base address definition.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
4 are found: 2 with a counter of 16bits and 2 with a counter of 32 bits.
However, first 32bits instance will not be exposed as it will be used by
rtos timer driver directly to implement k_busy_wait()
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The latest ci-tools reports the shippable job number in the status
check. This is useful if we have an error or something to be able
to find the logs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Refactors the kinetis flash configuration field so it can be shared
across all kinetis SoCs. Defaults are overridden for the k8x and ke1xf
series to preserve values used prior to this refactoring.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Kinetis SoCs have a 16-byte flash configuration field that must be
loaded at a specific address in flash. This field is not needed if we
are building an image to be chainloaded by MCUboot or a RAM-only image,
so we can exlude it in these cases and recover some wasted flash.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
As we work on removing the .conf file that is generated by the dt
scripts, mark dt_{int,hex,str}_val functions as deprecated.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert use of dt_int_val/dt_hex_val to dt_node_reg_{addr,size}. As
we want to remove dt_int_val/dt_hex_val.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert how we get the various chosen properties like "zephyr,console"
to use the new kconfig functions like dt_chosen_to_label.
Because of how kconfig parses things we define a set of variables of the
form DT_CHOSEN_Z_<PROP> since comma's are parsed as field seperators in
macros.
This conversion allows us to remove code in gen_defines.py for the
following chosen properties:
zephyr,console
zephyr,shell-uart
zephyr,bt-uart
zephyr,uart-pipe
zephyr,bt-mon-uart
zephyr,uart-mcumgr
zephyr,bt-c2h-uart
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We don't allow an ifdef in ztest_test_suite because its a macro. We
usually handle this by defining multiple blocks and ifdef around them.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update to CI image 0.9.1 to have pylint installed. Bump ci-tools sha
that re-enables running the pylint test.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The mcux CAN controller uses frame ID and position to calculate the
priority, but the driver expects chronological ordering.
This PR mimics this behavior by only using the last free message box.
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
